ARM: dts: aspeed: Add LPC clock phandles

The LPC device uses LCLK.
Tested-by: Lei YU <mine260309@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>

arch/arm/boot/dts/aspeed-g4.dtsi

@@ -233,6 +233,7 @@ lpc_host: lpc-host@80 {
 					lpc_ctrl: lpc-ctrl@0 {
 						compatible = "aspeed,ast2400-lpc-ctrl";
 						reg = <0x0 0x80>;
+						clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
 						status = "disabled";
 					};
 

arch/arm/boot/dts/aspeed-g5.dtsi

@@ -283,6 +283,7 @@ lpc_host: lpc-host@80 {
 					lpc_ctrl: lpc-ctrl@0 {
 						compatible = "aspeed,ast2500-lpc-ctrl";
 						reg = <0x0 0x80>;
+						clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
 						status = "disabled";
 					};