Commit 77c8e835 authored by David Woodhouse's avatar David Woodhouse

MTD: Fix timing setup for NAND flash on Samsung S3C2410.

Spotted by Shannon Holland.
Signed-off-by: default avatarBen Dooks <ben@simtec.co.uk>
Signed-off-by: default avatarDavid Woodhouse <dwmw2@infradead.org>
parent 0e2cf4ce
...@@ -11,7 +11,7 @@ ...@@ -11,7 +11,7 @@
* 28-Sep-2004 BJD Fixed ECC placement for Hardware mode * 28-Sep-2004 BJD Fixed ECC placement for Hardware mode
* 12-Oct-2004 BJD Fixed errors in use of platform data * 12-Oct-2004 BJD Fixed errors in use of platform data
* *
* $Id: s3c2410.c,v 1.5 2004/10/12 10:10:15 bjd Exp $ * $Id: s3c2410.c,v 1.6 2004/11/24 12:25:48 bjd Exp $
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
...@@ -167,7 +167,7 @@ static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, ...@@ -167,7 +167,7 @@ static int s3c2410_nand_inithw(struct s3c2410_nand_info *info,
if (plat != NULL) { if (plat != NULL) {
tacls = s3c2410_nand_calc_rate(plat->tacls, clkrate, 8); tacls = s3c2410_nand_calc_rate(plat->tacls, clkrate, 8);
twrph0 = s3c2410_nand_calc_rate(plat->twrph0, clkrate, 8); twrph0 = s3c2410_nand_calc_rate(plat->twrph0, clkrate, 8);
twrph1 = s3c2410_nand_calc_rate(plat->twrph0, clkrate, 8); twrph1 = s3c2410_nand_calc_rate(plat->twrph1, clkrate, 8);
} else { } else {
/* default timings */ /* default timings */
tacls = 8; tacls = 8;
......
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