Commit 784359b8 authored by Caesar Wang's avatar Caesar Wang Committed by Heiko Stuebner

ARM: dts: rockchip: Add OTP gpio pinctrl to rk3288 tsadc node

Add the "init" anf "sleep" pinctrl as the OTP gpio state.
We need the OTP pin is gpio state before resetting the TSADC controller,
since the tshut polarity will generate a high signal.

"init" pinctrl property is defined by Doug's Patch[0].

Patch[0]:
https://patchwork.kernel.org/patch/7454311/Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 98492678
...@@ -452,8 +452,10 @@ tsadc: tsadc@ff280000 { ...@@ -452,8 +452,10 @@ tsadc: tsadc@ff280000 {
clock-names = "tsadc", "apb_pclk"; clock-names = "tsadc", "apb_pclk";
resets = <&cru SRST_TSADC>; resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb"; reset-names = "tsadc-apb";
pinctrl-names = "default"; pinctrl-names = "init", "default", "sleep";
pinctrl-0 = <&otp_out>; pinctrl-0 = <&otp_gpio>;
pinctrl-1 = <&otp_out>;
pinctrl-2 = <&otp_gpio>;
#thermal-sensor-cells = <1>; #thermal-sensor-cells = <1>;
rockchip,hw-tshut-temp = <95000>; rockchip,hw-tshut-temp = <95000>;
status = "disabled"; status = "disabled";
...@@ -1395,6 +1397,10 @@ uart4_rts: uart4-rts { ...@@ -1395,6 +1397,10 @@ uart4_rts: uart4-rts {
}; };
tsadc { tsadc {
otp_gpio: otp-gpio {
rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
};
otp_out: otp-out { otp_out: otp-out {
rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>; rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
}; };
......
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