Commit 78f60603 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin Committed by Chris Wilson

drm/i915: Pass intel_gt to intel_engines_setup

Engines belong to the GT so make it indicative in the API.
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191022094726.3001-5-tvrtko.ursulin@linux.intel.com
parent b0258bf2
...@@ -325,7 +325,7 @@ __intel_ring_space(unsigned int head, unsigned int tail, unsigned int size) ...@@ -325,7 +325,7 @@ __intel_ring_space(unsigned int head, unsigned int tail, unsigned int size)
} }
int intel_engines_init_mmio(struct intel_gt *gt); int intel_engines_init_mmio(struct intel_gt *gt);
int intel_engines_setup(struct drm_i915_private *i915); int intel_engines_setup(struct intel_gt *gt);
int intel_engines_init(struct drm_i915_private *i915); int intel_engines_init(struct drm_i915_private *i915);
void intel_engines_cleanup(struct intel_gt *gt); void intel_engines_cleanup(struct intel_gt *gt);
......
...@@ -623,26 +623,26 @@ static int intel_engine_setup_common(struct intel_engine_cs *engine) ...@@ -623,26 +623,26 @@ static int intel_engine_setup_common(struct intel_engine_cs *engine)
/** /**
* intel_engines_setup- setup engine state not requiring hw access * intel_engines_setup- setup engine state not requiring hw access
* @i915: Device to setup. * @gt: pointer to struct intel_gt
* *
* Initializes engine structure members shared between legacy and execlists * Initializes engine structure members shared between legacy and execlists
* submission modes which do not require hardware access. * submission modes which do not require hardware access.
* *
* Typically done early in the submission mode specific engine setup stage. * Typically done early in the submission mode specific engine setup stage.
*/ */
int intel_engines_setup(struct drm_i915_private *i915) int intel_engines_setup(struct intel_gt *gt)
{ {
int (*setup)(struct intel_engine_cs *engine); int (*setup)(struct intel_engine_cs *engine);
struct intel_engine_cs *engine; struct intel_engine_cs *engine;
enum intel_engine_id id; enum intel_engine_id id;
int err; int err;
if (HAS_EXECLISTS(i915)) if (HAS_EXECLISTS(gt->i915))
setup = intel_execlists_submission_setup; setup = intel_execlists_submission_setup;
else else
setup = intel_ring_submission_setup; setup = intel_ring_submission_setup;
for_each_engine(engine, i915, id) { for_each_engine(engine, gt, id) {
err = intel_engine_setup_common(engine); err = intel_engine_setup_common(engine);
if (err) if (err)
goto cleanup; goto cleanup;
...@@ -660,7 +660,7 @@ int intel_engines_setup(struct drm_i915_private *i915) ...@@ -660,7 +660,7 @@ int intel_engines_setup(struct drm_i915_private *i915)
return 0; return 0;
cleanup: cleanup:
intel_engines_cleanup(&i915->gt); intel_engines_cleanup(gt);
return err; return err;
} }
......
...@@ -1249,7 +1249,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) ...@@ -1249,7 +1249,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
intel_gt_init(&dev_priv->gt); intel_gt_init(&dev_priv->gt);
ret = intel_engines_setup(dev_priv); ret = intel_engines_setup(&dev_priv->gt);
if (ret) { if (ret) {
GEM_BUG_ON(ret == -EIO); GEM_BUG_ON(ret == -EIO);
goto err_unlock; goto err_unlock;
......
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