Commit 79b73ff9 authored by Andrew F. Davis's avatar Andrew F. Davis Committed by Linus Walleij

gpio: davinci: Move driver local definitions to driver

These defines, structs and inline functions are used only internally by
the driver, they do not belong in platform_data. Move them.
Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
Tested-by: default avatarKeerthy <j-keerthy@ti.com>
Acked-by: default avatarKeerthy <j-keerthy@ti.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent c36219d9
......@@ -9,6 +9,7 @@
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/gpio/driver.h>
#include <linux/errno.h>
#include <linux/kernel.h>
......@@ -24,6 +25,12 @@
#include <linux/platform_device.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/spinlock.h>
#include <asm-generic/gpio.h>
#define MAX_REGS_BANKS 5
#define MAX_INT_PER_BANK 32
struct davinci_gpio_regs {
u32 dir;
......@@ -45,6 +52,27 @@ typedef struct irq_chip *(*gpio_get_irq_chip_cb_t)(unsigned int irq);
static void __iomem *gpio_base;
static unsigned int offset_array[5] = {0x10, 0x38, 0x60, 0x88, 0xb0};
struct davinci_gpio_irq_data {
void __iomem *regs;
struct davinci_gpio_controller *chip;
int bank_num;
};
struct davinci_gpio_controller {
struct gpio_chip chip;
struct irq_domain *irq_domain;
/* Serialize access to GPIO registers */
spinlock_t lock;
void __iomem *regs[MAX_REGS_BANKS];
int gpio_unbanked;
int irqs[MAX_INT_PER_BANK];
};
static inline u32 __gpio_mask(unsigned gpio)
{
return 1 << (gpio % 32);
}
static inline struct davinci_gpio_regs __iomem *irq2regs(struct irq_data *d)
{
struct davinci_gpio_regs __iomem *g;
......
......@@ -16,40 +16,12 @@
#ifndef __DAVINCI_GPIO_PLATFORM_H
#define __DAVINCI_GPIO_PLATFORM_H
#include <linux/io.h>
#include <linux/spinlock.h>
#include <asm-generic/gpio.h>
#define MAX_REGS_BANKS 5
#define MAX_INT_PER_BANK 32
struct davinci_gpio_platform_data {
u32 ngpio;
u32 gpio_unbanked;
};
struct davinci_gpio_irq_data {
void __iomem *regs;
struct davinci_gpio_controller *chip;
int bank_num;
};
struct davinci_gpio_controller {
struct gpio_chip chip;
struct irq_domain *irq_domain;
/* Serialize access to GPIO registers */
spinlock_t lock;
void __iomem *regs[MAX_REGS_BANKS];
int gpio_unbanked;
int irqs[MAX_INT_PER_BANK];
};
/* Convert GPIO signal to GPIO pin number */
#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
static inline u32 __gpio_mask(unsigned gpio)
{
return 1 << (gpio % 32);
}
#endif
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