Commit 7d580545 authored by Yingjoe Chen's avatar Yingjoe Chen Committed by Matthias Brugger

ARM: dts: mt8127: correct uart instance address

The instance address for uart nodes are incorrect. Correct them.
Signed-off-by: default avatarYingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent cfb11671
......@@ -107,7 +107,7 @@ gic: interrupt-controller@10211000 {
<0 0x10216000 0 0x2000>;
};
uart0: serial@11006000 {
uart0: serial@11002000 {
compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
reg = <0 0x11002000 0 0x400>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
......@@ -115,7 +115,7 @@ uart0: serial@11006000 {
status = "disabled";
};
uart1: serial@11007000 {
uart1: serial@11003000 {
compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
reg = <0 0x11003000 0 0x400>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
......@@ -123,7 +123,7 @@ uart1: serial@11007000 {
status = "disabled";
};
uart2: serial@11008000 {
uart2: serial@11004000 {
compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
reg = <0 0x11004000 0 0x400>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
......@@ -131,7 +131,7 @@ uart2: serial@11008000 {
status = "disabled";
};
uart3: serial@11009000 {
uart3: serial@11005000 {
compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
reg = <0 0x11005000 0 0x400>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
......
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