Commit 7e2a9035 authored by Andy Yan's avatar Andy Yan Committed by Heiko Stuebner

clk: rockchip: rename RK1108 to RV1108

Rockchip finally named the SOC as RV1108, so change it.
Signed-off-by: default avatarAndy Yan <andy.yan@rock-chips.com>

[include rename in rk1108.dtsi to prevent compile errors]
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent b61753a4
...@@ -41,7 +41,7 @@ ...@@ -41,7 +41,7 @@
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/rk1108-cru.h> #include <dt-bindings/clock/rv1108-cru.h>
#include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/pinctrl/rockchip.h>
/ { / {
#address-cells = <1>; #address-cells = <1>;
......
...@@ -12,7 +12,7 @@ obj-y += clk-muxgrf.o ...@@ -12,7 +12,7 @@ obj-y += clk-muxgrf.o
obj-y += clk-ddr.o obj-y += clk-ddr.o
obj-$(CONFIG_RESET_CONTROLLER) += softrst.o obj-$(CONFIG_RESET_CONTROLLER) += softrst.o
obj-y += clk-rk1108.o obj-y += clk-rv1108.o
obj-y += clk-rk3036.o obj-y += clk-rk3036.o
obj-y += clk-rk3188.o obj-y += clk-rk3188.o
obj-y += clk-rk3228.o obj-y += clk-rk3228.o
......
...@@ -34,20 +34,20 @@ struct clk; ...@@ -34,20 +34,20 @@ struct clk;
#define HIWORD_UPDATE(val, mask, shift) \ #define HIWORD_UPDATE(val, mask, shift) \
((val) << (shift) | (mask) << ((shift) + 16)) ((val) << (shift) | (mask) << ((shift) + 16))
/* register positions shared by RK1108, RK2928, RK3036, RK3066, RK3188 and RK3228 */ /* register positions shared by RV1108, RK2928, RK3036, RK3066, RK3188 and RK3228 */
#define RK1108_PLL_CON(x) ((x) * 0x4) #define RV1108_PLL_CON(x) ((x) * 0x4)
#define RK1108_CLKSEL_CON(x) ((x) * 0x4 + 0x60) #define RV1108_CLKSEL_CON(x) ((x) * 0x4 + 0x60)
#define RK1108_CLKGATE_CON(x) ((x) * 0x4 + 0x120) #define RV1108_CLKGATE_CON(x) ((x) * 0x4 + 0x120)
#define RK1108_SOFTRST_CON(x) ((x) * 0x4 + 0x180) #define RV1108_SOFTRST_CON(x) ((x) * 0x4 + 0x180)
#define RK1108_GLB_SRST_FST 0x1c0 #define RV1108_GLB_SRST_FST 0x1c0
#define RK1108_GLB_SRST_SND 0x1c4 #define RV1108_GLB_SRST_SND 0x1c4
#define RK1108_MISC_CON 0x1cc #define RV1108_MISC_CON 0x1cc
#define RK1108_SDMMC_CON0 0x1d8 #define RV1108_SDMMC_CON0 0x1d8
#define RK1108_SDMMC_CON1 0x1dc #define RV1108_SDMMC_CON1 0x1dc
#define RK1108_SDIO_CON0 0x1e0 #define RV1108_SDIO_CON0 0x1e0
#define RK1108_SDIO_CON1 0x1e4 #define RV1108_SDIO_CON1 0x1e4
#define RK1108_EMMC_CON0 0x1e8 #define RV1108_EMMC_CON0 0x1e8
#define RK1108_EMMC_CON1 0x1ec #define RV1108_EMMC_CON1 0x1ec
#define RK2928_PLL_CON(x) ((x) * 0x4) #define RK2928_PLL_CON(x) ((x) * 0x4)
#define RK2928_MODE_CON 0x40 #define RK2928_MODE_CON 0x40
......
...@@ -13,8 +13,8 @@ ...@@ -13,8 +13,8 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK1108_H #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H
#define _DT_BINDINGS_CLK_ROCKCHIP_RK1108_H #define _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H
/* pll id */ /* pll id */
#define PLL_APLL 0 #define PLL_APLL 0
...@@ -266,4 +266,4 @@ ...@@ -266,4 +266,4 @@
#define ARST_DSP_EDP_PERF 184 #define ARST_DSP_EDP_PERF 184
#define ARST_DSP_EPP_PERF 185 #define ARST_DSP_EPP_PERF 185
#endif /* _DT_BINDINGS_CLK_ROCKCHIP_RK1108_H */ #endif /* _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H */
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