Commit 7fb5f5d3 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'pinctrl-v4.20-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:
 "Three pin control fixes for the v4.20 series. Just odd drivers, so
  nothing particularly interesting:

   - Set the tile property on Qualcomm SDM60.

   - Fix up enable register calculation for the Meson

   - Fix an IRQ offset on the Sunxi (Allwinner)"

* tag 'pinctrl-v4.20-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: sunxi: a83t: Fix IRQ offset typo for PH11
  pinctrl: meson: fix pull enable register calculation
  pinctrl: sdm660: Set tile property for pingroups
parents 92de1de5 478b6767
......@@ -191,7 +191,8 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
case PIN_CONFIG_BIAS_DISABLE:
dev_dbg(pc->dev, "pin %u: disable bias\n", pin);
meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
meson_calc_reg_and_bit(bank, pin, REG_PULLEN, &reg,
&bit);
ret = regmap_update_bits(pc->reg_pullen, reg,
BIT(bit), 0);
if (ret)
......
......@@ -33,7 +33,7 @@ enum {
}
#define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
{ \
.name = "gpio" #id, \
.pins = gpio##id##_pins, \
......@@ -51,11 +51,12 @@ enum {
msm_mux_##f9 \
}, \
.nfuncs = 10, \
.ctl_reg = base + REG_SIZE * id, \
.io_reg = base + 0x4 + REG_SIZE * id, \
.intr_cfg_reg = base + 0x8 + REG_SIZE * id, \
.intr_status_reg = base + 0xc + REG_SIZE * id, \
.intr_target_reg = base + 0x8 + REG_SIZE * id, \
.ctl_reg = REG_SIZE * id, \
.io_reg = 0x4 + REG_SIZE * id, \
.intr_cfg_reg = 0x8 + REG_SIZE * id, \
.intr_status_reg = 0xc + REG_SIZE * id, \
.intr_target_reg = 0x8 + REG_SIZE * id, \
.tile = _tile, \
.mux_bit = 2, \
.pull_bit = 0, \
.drv_bit = 6, \
......@@ -82,6 +83,7 @@ enum {
.intr_cfg_reg = 0, \
.intr_status_reg = 0, \
.intr_target_reg = 0, \
.tile = NORTH, \
.mux_bit = -1, \
.pull_bit = pull, \
.drv_bit = drv, \
......@@ -1397,13 +1399,13 @@ static const struct msm_pingroup sdm660_groups[] = {
PINGROUP(111, SOUTH, _, _, _, _, _, _, _, _, _),
PINGROUP(112, SOUTH, _, _, _, _, _, _, _, _, _),
PINGROUP(113, SOUTH, _, _, _, _, _, _, _, _, _),
SDC_QDSD_PINGROUP(sdc1_clk, 0x99a000, 13, 6),
SDC_QDSD_PINGROUP(sdc1_cmd, 0x99a000, 11, 3),
SDC_QDSD_PINGROUP(sdc1_data, 0x99a000, 9, 0),
SDC_QDSD_PINGROUP(sdc2_clk, 0x99b000, 14, 6),
SDC_QDSD_PINGROUP(sdc2_cmd, 0x99b000, 11, 3),
SDC_QDSD_PINGROUP(sdc2_data, 0x99b000, 9, 0),
SDC_QDSD_PINGROUP(sdc1_rclk, 0x99a000, 15, 0),
SDC_QDSD_PINGROUP(sdc1_clk, 0x9a000, 13, 6),
SDC_QDSD_PINGROUP(sdc1_cmd, 0x9a000, 11, 3),
SDC_QDSD_PINGROUP(sdc1_data, 0x9a000, 9, 0),
SDC_QDSD_PINGROUP(sdc2_clk, 0x9b000, 14, 6),
SDC_QDSD_PINGROUP(sdc2_cmd, 0x9b000, 11, 3),
SDC_QDSD_PINGROUP(sdc2_data, 0x9b000, 9, 0),
SDC_QDSD_PINGROUP(sdc1_rclk, 0x9a000, 15, 0),
};
static const struct msm_pinctrl_soc_data sdm660_pinctrl = {
......
......@@ -568,7 +568,7 @@ static const struct sunxi_desc_pin sun8i_a83t_pins[] = {
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
SUNXI_FUNCTION(0x0, "gpio_in"),
SUNXI_FUNCTION(0x1, "gpio_out"),
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* PH_EINT11 */
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* PH_EINT11 */
};
static const struct sunxi_pinctrl_desc sun8i_a83t_pinctrl_data = {
......
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