Commit 81059697 authored by Russell King's avatar Russell King

[SERIAL] Add HP Diva PCI serial port support.

parent 6a3c9612
...@@ -137,7 +137,29 @@ get_pci_port(struct pci_dev *dev, struct pci_board *board, ...@@ -137,7 +137,29 @@ get_pci_port(struct pci_dev *dev, struct pci_board *board,
offset = 8 * (idx - 2); offset = 8 * (idx - 2);
} }
} }
/* HP's Diva chip puts the 4th/5th serial port further out, and
* some serial ports are supposed to be hidden on certain models.
*/
if (dev->vendor == PCI_VENDOR_ID_HP &&
dev->device == PCI_DEVICE_ID_HP_DIVA) {
switch (dev->subsystem_device) {
case PCI_DEVICE_ID_HP_DIVA_MAESTRO:
if (idx == 3)
idx++;
break;
case PCI_DEVICE_ID_HP_DIVA_EVEREST:
if (idx > 0)
idx++;
if (idx > 2)
idx++;
break;
}
if (idx > 2) {
offset = 0x18;
}
}
port = pci_resource_start(dev, base_idx) + offset; port = pci_resource_start(dev, base_idx) + offset;
if ((board->flags & SPCI_FL_BASE_TABLE) == 0) if ((board->flags & SPCI_FL_BASE_TABLE) == 0)
...@@ -379,6 +401,41 @@ pci_timedia_fn(struct pci_dev *dev, struct pci_board *board, int enable) ...@@ -379,6 +401,41 @@ pci_timedia_fn(struct pci_dev *dev, struct pci_board *board, int enable)
return 0; return 0;
} }
/*
* HP's Remote Management Console. The Diva chip came in several
* different versions. N-class, L2000 and A500 have two Diva chips, each
* with 3 UARTs (the third UART on the second chip is unused). Superdome
* and Keystone have one Diva chip with 3 UARTs. Some later machines have
* one Diva chip, but it has been expanded to 5 UARTs.
*/
static int __devinit
pci_hp_diva(struct pci_dev *dev, struct pci_board *board, int enable)
{
if (!enable)
return 0;
switch (dev->subsystem_device) {
case PCI_DEVICE_ID_HP_DIVA_TOSCA1:
case PCI_DEVICE_ID_HP_DIVA_HALFDOME:
case PCI_DEVICE_ID_HP_DIVA_KEYSTONE:
case PCI_DEVICE_ID_HP_DIVA_EVEREST:
board->num_ports = 3;
break;
case PCI_DEVICE_ID_HP_DIVA_TOSCA2:
board->num_ports = 2;
break;
case PCI_DEVICE_ID_HP_DIVA_MAESTRO:
board->num_ports = 4;
break;
case PCI_DEVICE_ID_HP_DIVA_POWERBAR:
board->num_ports = 1;
break;
}
return 0;
}
static int __devinit static int __devinit
pci_xircom_fn(struct pci_dev *dev, struct pci_board *board, int enable) pci_xircom_fn(struct pci_dev *dev, struct pci_board *board, int enable)
{ {
...@@ -423,6 +480,7 @@ enum pci_board_num_t { ...@@ -423,6 +480,7 @@ enum pci_board_num_t {
pbn_b1_4_1382400, pbn_b1_4_1382400,
pbn_b1_8_1382400, pbn_b1_8_1382400,
pbn_b2_1_115200,
pbn_b2_8_115200, pbn_b2_8_115200,
pbn_b2_4_460800, pbn_b2_4_460800,
pbn_b2_8_460800, pbn_b2_8_460800,
...@@ -443,6 +501,7 @@ enum pci_board_num_t { ...@@ -443,6 +501,7 @@ enum pci_board_num_t {
pbn_timedia, pbn_timedia,
pbn_intel_i960, pbn_intel_i960,
pbn_sgi_ioc3, pbn_sgi_ioc3,
pbn_hp_diva,
pbn_nec_nile4, pbn_nec_nile4,
pbn_dci_pccom4, pbn_dci_pccom4,
...@@ -501,6 +560,7 @@ static struct pci_board pci_boards[] __devinitdata = { ...@@ -501,6 +560,7 @@ static struct pci_board pci_boards[] __devinitdata = {
{ SPCI_FL_BASE1, 4, 1382400 }, /* pbn_b1_4_1382400 */ { SPCI_FL_BASE1, 4, 1382400 }, /* pbn_b1_4_1382400 */
{ SPCI_FL_BASE1, 8, 1382400 }, /* pbn_b1_8_1382400 */ { SPCI_FL_BASE1, 8, 1382400 }, /* pbn_b1_8_1382400 */
{ SPCI_FL_BASE2, 1, 115200 }, /* pbn_b2_1_115200 */
{ SPCI_FL_BASE2, 8, 115200 }, /* pbn_b2_8_115200 */ { SPCI_FL_BASE2, 8, 115200 }, /* pbn_b2_8_115200 */
{ SPCI_FL_BASE2, 4, 460800 }, /* pbn_b2_4_460800 */ { SPCI_FL_BASE2, 4, 460800 }, /* pbn_b2_4_460800 */
{ SPCI_FL_BASE2, 8, 460800 }, /* pbn_b2_8_460800 */ { SPCI_FL_BASE2, 8, 460800 }, /* pbn_b2_8_460800 */
...@@ -531,6 +591,7 @@ static struct pci_board pci_boards[] __devinitdata = { ...@@ -531,6 +591,7 @@ static struct pci_board pci_boards[] __devinitdata = {
8<<2, 2, pci_inteli960ni_fn, 0x10000}, 8<<2, 2, pci_inteli960ni_fn, 0x10000},
{ SPCI_FL_BASE0 | SPCI_FL_IRQRESOURCE, /* pbn_sgi_ioc3 */ { SPCI_FL_BASE0 | SPCI_FL_IRQRESOURCE, /* pbn_sgi_ioc3 */
1, 458333, 0, 0, 0, 0x20178 }, 1, 458333, 0, 0, 0, 0x20178 },
{ SPCI_FL_BASE0, 5, 115200, 8, 0, pci_hp_diva, 0 },/* pbn_hp_diva */
/* /*
* NEC Vrc-5074 (Nile 4) builtin UART. * NEC Vrc-5074 (Nile 4) builtin UART.
...@@ -1078,6 +1139,14 @@ static struct pci_device_id serial_pci_tbl[] __devinitdata = { ...@@ -1078,6 +1139,14 @@ static struct pci_device_id serial_pci_tbl[] __devinitdata = {
0xFF00, 0, 0, 0, 0xFF00, 0, 0, 0,
pbn_sgi_ioc3 }, pbn_sgi_ioc3 },
/* HP Diva card */
{ PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_DIVA,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_hp_diva },
{ PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_DIVA_AUX,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_1_115200 },
/* /*
* NEC Vrc-5074 (Nile 4) builtin UART. * NEC Vrc-5074 (Nile 4) builtin UART.
*/ */
......
...@@ -506,13 +506,18 @@ ...@@ -506,13 +506,18 @@
#define PCI_DEVICE_ID_HP_TACHLITE 0x1029 #define PCI_DEVICE_ID_HP_TACHLITE 0x1029
#define PCI_DEVICE_ID_HP_J2585A 0x1030 #define PCI_DEVICE_ID_HP_J2585A 0x1030
#define PCI_DEVICE_ID_HP_J2585B 0x1031 #define PCI_DEVICE_ID_HP_J2585B 0x1031
#define PCI_DEVICE_ID_HP_SAS 0x1048 #define PCI_DEVICE_ID_HP_DIVA 0x1048
#define PCI_DEVICE_ID_HP_DIVA1 0x1049 #define PCI_DEVICE_ID_HP_DIVA_TOSCA1 0x1049
#define PCI_DEVICE_ID_HP_DIVA2 0x104A #define PCI_DEVICE_ID_HP_DIVA_TOSCA2 0x104A
#define PCI_DEVICE_ID_HP_SP2_0 0x104B #define PCI_DEVICE_ID_HP_DIVA_MAESTRO 0x104B
#define PCI_DEVICE_ID_HP_DIVA_HALFDOME 0x1223
#define PCI_DEVICE_ID_HP_DIVA_KEYSTONE 0x1226
#define PCI_DEVICE_ID_HP_DIVA_POWERBAR 0x1227
#define PCI_DEVICE_ID_HP_ZX1_SBA 0x1229 #define PCI_DEVICE_ID_HP_ZX1_SBA 0x1229
#define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a #define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a
#define PCI_DEVICE_ID_HP_ZX1_LBA 0x122e #define PCI_DEVICE_ID_HP_ZX1_LBA 0x122e
#define PCI_DEVICE_ID_HP_DIVA_EVEREST 0x1282
#define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290
#define PCI_VENDOR_ID_PCTECH 0x1042 #define PCI_VENDOR_ID_PCTECH 0x1042
#define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000 #define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000
......
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