Merge master.kernel.org:/home/davem/BK/sparc-2.5

into home.transmeta.com:/home/torvalds/v2.5/linux

Documentation/sparc/README-2.5

+BTFIXUP
+-------
+
+To build new kernels you have to issue "make image". The ready kernel
+in ELF format is placed in arch/sparc/boot/image. Explanation is below.
+
+BTFIXUP is a unique feature of Linux/sparc among other architectures,
+developed by Jakub Jelinek (I think... Obviously David S. Miller took
+part, too). It allows to boot the same kernel at different 
+sub-architectures, such as sun4c, sun4m, sun4d, where SunOS uses
+different kernels. This feature is convinient for people who you move
+disks between boxes and for distrution builders.
+
+To function, BTFIXUP must link the kernel "in the draft" first,
+analyze the result, write a special stub code based on that, and
+build the final kernel with the stub (btfix.o).
+
+Kai Germaschewski improved the build system of the kernel in the 2.5 series
+significantly. Unfortunately, the traditional way of running the draft
+linking from architecture specific Makefile before the actual linking
+by generic Makefile is nearly impossible to support properly in the
+new build system. Therefore, the way we integrate BTFIXUP with the
+build system was changed in 2.5.40. Now, generic Makefile performs
+the draft linking and stores the result in file vmlinux. Architecture
+specific post-processing invokes BTFIXUP machinery and final linking
+in the same way as other architectures do bootstraps.
+
+Implications of that change are as follows.
+
+1. Hackers must type "make image" now, instead of just "make", in the same
+   way as s390 people do now. It is analogous to "make bzImage" on i386.
+   This does NOT affect sparc64, you continue to use "make" to build sparc64
+   kernels.
+
+2. vmlinux is not the final kernel, so RPM builders have to adjust
+   their spec files (if they delivered vmlinux for debugging).
+   System.map generated for vmlinux is still valid.
+
+3. Scripts that produce a.out images have to be changed. First, if they
+   invoke make, they have to use "make image". Second, they have to pick up
+   the new kernel in arch/sparc/boot/image instead of vmlinux.
+
+4. Since we are compliant with Kai's build system now, make -j is permitted.
+
+-- Pete Zaitcev
+zaitcev@yahoo.com

arch/sparc/Makefile

@@ -31,21 +31,22 @@ CFLAGS := $(CFLAGS) -m32 -pipe -mno-fpu -fcall-used-g5 -fcall-used-g7
 endif
 
 #LDFLAGS_vmlinux = -N -Ttext 0xf0004000
+#  Since 2.5.40, the first stage is left not btfix-ed.
+#  Actual linking is done with "make image".
+LDFLAGS_vmlinux = -r
 
 HEAD := arch/sparc/kernel/head.o arch/sparc/kernel/init_task.o
 
 core-y += arch/sparc/kernel/ arch/sparc/mm/ arch/sparc/math-emu/
 libs-y += arch/sparc/prom/ arch/sparc/lib/
 
-# This one has to come last
-SUBDIRS += arch/sparc/boot
-CORE_FILES_NO_BTFIX := $(addsuffix built-in.o,$(core-y))
-CORE_FILES += arch/sparc/boot/btfix.o
-
 # Export what is needed by arch/sparc/boot/Makefile
-export	CORE_FILES_NO_BTFIX
+export CORE_FILES
 export INIT
 
+image: vmlinux
+	$(MAKE) -C arch/sparc/boot image
+
 archclean:
 	rm -f $(TOPDIR)/vmlinux.aout
 	-$(MAKE) -C arch/sparc/boot clean

arch/sparc/boot/Makefile

@@ -20,25 +20,23 @@ btfixupprep: btfixupprep.c
 	$(HOSTCC) $(HOSTCFLAGS) -o btfixupprep btfixupprep.c
 
 clean:
-	rm -f btfixupprep piggyback tftpboot.img btfix.o btfix.s
+	rm -f btfixupprep piggyback tftpboot.img btfix.o btfix.s image
 
-#BTOBJS := $(HEAD) init/main.o init/version.o
 BTOBJS := $(HEAD) $(INIT)
-BTLIBS := $(CORE_FILES_NO_BTFIX) $(LIBS) \
+BTLIBS := $(CORE_FILES) $(LIBS) \
 	$(DRIVERS) $(NETWORKS)
 
-# I wanted to make this depend upon BTOBJS so that a parallel
-# build would work, but this fails because $(HEAD) cannot work
-# properly as it will cause head.o to be built with the implicit
-# rules not the ones in kernel/Makefile.  Someone please fix. --DaveM
-vmlinux.o: FORCE
-	$(LD) $(LDFLAGS) -r $(patsubst %,$(TOPDIR)/%,$(BTOBJS)) \
+# Actual linking
+image: btfix.o
+	$(LD) $(LDFLAGS) -T ../vmlinux.lds.s \
+		$(patsubst %,$(TOPDIR)/%,$(BTOBJS)) \
 		--start-group \
 		$(patsubst %,$(TOPDIR)/%,$(BTLIBS)) \
-		--end-group -o vmlinux.o
+		btfix.o \
+		--end-group -o image
 
-btfix.s: btfixupprep vmlinux.o
-	$(OBJDUMP) -x vmlinux.o | ./btfixupprep > btfix.s
+btfix.s: btfixupprep $(TOPDIR)/vmlinux
+	$(OBJDUMP) -x $(TOPDIR)/vmlinux | ./btfixupprep > btfix.s
 
 btfix.o: btfix.s
 	$(CC) -c -o btfix.o btfix.s

arch/sparc/config.in

@@ -70,7 +70,6 @@ source drivers/mtd/Config.in
 source drivers/serial/Config.in
 if [ "$CONFIG_SUN4" != "y" ]; then
    source drivers/sbus/char/Config.in
-   source drivers/sbus/audio/Config.in
 fi
 
 mainmenu_option next_comment
@@ -223,9 +222,15 @@ source drivers/input/Config.in
 
 source fs/Config.in
 
-if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
-   source net/bluetooth/Config.in
+tristate 'Sound card support' CONFIG_SOUND
+if [ "$CONFIG_SOUND" != "n" ]; then
+   source sound/Config.in
 fi
+endmenu
+
+source drivers/usb/Config.in
+
+source net/bluetooth/Config.in
 
 mainmenu_option next_comment
 comment 'Watchdog'

arch/sparc/defconfig

@@ -105,14 +105,14 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # Misc Linux/SPARC drivers
 #
 CONFIG_SUN_OPENPROMIO=m
-CONFIG_SUN_MOSTEK_RTC=y
+CONFIG_SUN_MOSTEK_RTC=m
 # CONFIG_SUN_BPP is not set
 # CONFIG_SUN_VIDEOPIX is not set
 # CONFIG_SUN_AURORA is not set
 # CONFIG_TADPOLE_TS102_UCTRL is not set
 # CONFIG_SUN_JSFLASH is not set
 CONFIG_APM_RTC_IS_GMT=y
-# CONFIG_RTC is not set
+CONFIG_RTC=m
 
 #
 # Linux/SPARC audio subsystem (EXPERIMENTAL)
@@ -244,6 +244,84 @@ CONFIG_VORTEX=m
 CONFIG_UNIX98_PTYS=y
 CONFIG_UNIX98_PTY_COUNT=256
 
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=m
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+CONFIG_INPUT_JOYDEV=m
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=m
+CONFIG_INPUT_EVBUG=m
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+# CONFIG_GAMEPORT_NS558 is not set
+# CONFIG_GAMEPORT_L4 is not set
+# CONFIG_GAMEPORT_EMU10K1 is not set
+# CONFIG_GAMEPORT_VORTEX is not set
+# CONFIG_GAMEPORT_FM801 is not set
+# CONFIG_GAMEPORT_CS461x is not set
+CONFIG_SERIO=m
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=m
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PARKBD is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=m
+CONFIG_KEYBOARD_SUNKBD=m
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_SERIAL=m
+# CONFIG_MOUSE_INPORT is not set
+# CONFIG_MOUSE_LOGIBM is not set
+# CONFIG_MOUSE_PC110PAD is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_JOYSTICK_ANALOG is not set
+# CONFIG_JOYSTICK_A3D is not set
+# CONFIG_JOYSTICK_ADI is not set
+# CONFIG_JOYSTICK_COBRA is not set
+# CONFIG_JOYSTICK_GF2K is not set
+# CONFIG_JOYSTICK_GRIP is not set
+# CONFIG_JOYSTICK_GRIP_MP is not set
+# CONFIG_JOYSTICK_GUILLEMOT is not set
+# CONFIG_JOYSTICK_INTERACT is not set
+# CONFIG_JOYSTICK_SIDEWINDER is not set
+# CONFIG_JOYSTICK_TMDC is not set
+# CONFIG_JOYSTICK_IFORCE is not set
+# CONFIG_JOYSTICK_WARRIOR is not set
+# CONFIG_JOYSTICK_MAGELLAN is not set
+# CONFIG_JOYSTICK_SPACEORB is not set
+# CONFIG_JOYSTICK_SPACEBALL is not set
+# CONFIG_JOYSTICK_STINGER is not set
+# CONFIG_JOYSTICK_TWIDDLER is not set
+# CONFIG_JOYSTICK_DB9 is not set
+# CONFIG_JOYSTICK_GAMECON is not set
+# CONFIG_JOYSTICK_TURBOGRAFX is not set
+# CONFIG_INPUT_JOYDUMP is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_INPUT_MISC is not set
+# CONFIG_INPUT_PCSPKR is not set
+# CONFIG_INPUT_SPARCSPKR is not set
+# CONFIG_INPUT_UINPUT is not set
+
 #
 # File systems
 #

arch/sparc/kernel/irq.c

@@ -75,7 +75,7 @@ static void irq_panic(void)
     prom_halt();
 }
 
-void (*init_timers)(void (*)(int, void *,struct pt_regs *)) =
+void (*sparc_init_timers)(void (*)(int, void *,struct pt_regs *)) =
     (void (*)(void (*)(int, void *,struct pt_regs *))) irq_panic;
 
 /*

arch/sparc/kernel/signal.c

@@ -136,11 +136,11 @@ asmlinkage void _sigpause_common(old_sigset_t set, struct pt_regs *regs)
 	sigset_t saveset;
 
 	set &= _BLOCKABLE;
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	saveset = current->blocked;
 	siginitset(&current->blocked, set);
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 
 	regs->pc = regs->npc;
 	regs->npc += 4;
@@ -193,11 +193,11 @@ asmlinkage void do_rt_sigsuspend(sigset_t *uset, size_t sigsetsize,
 	}
 
 	sigdelsetmask(&set, ~_BLOCKABLE);
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	oldset = current->blocked;
 	current->blocked = set;
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 
 	regs->pc = regs->npc;
 	regs->npc += 4;
@@ -299,10 +299,10 @@ static inline void do_new_sigreturn (struct pt_regs *regs)
 		goto segv_and_exit;
 
 	sigdelsetmask(&set, ~_BLOCKABLE);
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	current->blocked = set;
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	return;
 
 segv_and_exit:
@@ -346,10 +346,10 @@ asmlinkage void do_sigreturn(struct pt_regs *regs)
 		goto segv_and_exit;
 
 	sigdelsetmask(&set, ~_BLOCKABLE);
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	current->blocked = set;
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 
 	regs->pc = pc;
 	regs->npc = npc;
@@ -416,10 +416,10 @@ asmlinkage void do_rt_sigreturn(struct pt_regs *regs)
 	do_sigaltstack(&st, NULL, (unsigned long)sf);
 
 	sigdelsetmask(&set, ~_BLOCKABLE);
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	current->blocked = set;
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	return;
 segv:
 	send_sig(SIGSEGV, current, 1);
@@ -999,10 +999,10 @@ asmlinkage int svr4_setcontext (svr4_ucontext_t *c, struct pt_regs *regs)
 		set.sig[3] = setv.sigbits[3];
 	}
 	sigdelsetmask(&set, ~_BLOCKABLE);
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	current->blocked = set;
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	regs->pc = pc;
 	regs->npc = npc | 1;
 	err |= __get_user(regs->y, &((*gr) [SVR4_Y]));
@@ -1039,11 +1039,11 @@ handle_signal(unsigned long signr, struct k_sigaction *ka,
 	if(ka->sa.sa_flags & SA_ONESHOT)
 		ka->sa.sa_handler = SIG_DFL;
 	if(!(ka->sa.sa_flags & SA_NOMASK)) {
-		spin_lock_irq(&current->sigmask_lock);
+		spin_lock_irq(&current->sig->siglock);
 		sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
 		sigaddset(&current->blocked, signr);
 		recalc_sigpending();
-		spin_unlock_irq(&current->sigmask_lock);
+		spin_unlock_irq(&current->sig->siglock);
 	}
 }
 
@@ -1102,9 +1102,9 @@ asmlinkage int do_signal(sigset_t *oldset, struct pt_regs * regs,
 			spin_unlock(&current->sig->siglock);
 		}
 		if (!signr) {
-			spin_lock(&current->sigmask_lock);
+			spin_lock(&current->sig->siglock);
 			signr = dequeue_signal(&current->pending, mask, &info);
-			spin_unlock(&current->sigmask_lock);
+			spin_unlock(&current->sig->siglock);
 		}
 		local_irq_enable();
 

arch/sparc/kernel/sun4c_irq.c

@@ -221,7 +221,7 @@ void __init sun4c_init_IRQ(void)
 	BTFIXUPSET_CALL(clear_profile_irq, sun4c_clear_profile_irq, BTFIXUPCALL_NOP);
 	BTFIXUPSET_CALL(load_profile_irq, sun4c_load_profile_irq, BTFIXUPCALL_NOP);
 	BTFIXUPSET_CALL(__irq_itoa, sun4m_irq_itoa, BTFIXUPCALL_NORM);
-	init_timers = sun4c_init_timers;
+	sparc_init_timers = sun4c_init_timers;
 #ifdef CONFIG_SMP
 	BTFIXUPSET_CALL(set_cpu_int, sun4c_nop, BTFIXUPCALL_NOP);
 	BTFIXUPSET_CALL(clear_cpu_int, sun4c_nop, BTFIXUPCALL_NOP);

arch/sparc/kernel/sun4m_irq.c

@@ -374,7 +374,7 @@ void __init sun4m_init_IRQ(void)
 	BTFIXUPSET_CALL(clear_profile_irq, sun4m_clear_profile_irq, BTFIXUPCALL_NORM);
 	BTFIXUPSET_CALL(load_profile_irq, sun4m_load_profile_irq, BTFIXUPCALL_NORM);
 	BTFIXUPSET_CALL(__irq_itoa, sun4m_irq_itoa, BTFIXUPCALL_NORM);
-	init_timers = sun4m_init_timers;
+	sparc_init_timers = sun4m_init_timers;
 #ifdef CONFIG_SMP
 	BTFIXUPSET_CALL(set_cpu_int, sun4m_send_ipi, BTFIXUPCALL_NORM);
 	BTFIXUPSET_CALL(clear_cpu_int, sun4m_clear_ipi, BTFIXUPCALL_NORM);

arch/sparc/kernel/sys_sunos.c

@@ -279,11 +279,11 @@ asmlinkage unsigned long sunos_sigblock(unsigned long blk_mask)
 {
 	unsigned long old;
 
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	old = current->blocked.sig[0];
 	current->blocked.sig[0] |= (blk_mask & _BLOCKABLE);
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	return old;
 }
 
@@ -291,11 +291,11 @@ asmlinkage unsigned long sunos_sigsetmask(unsigned long newmask)
 {
 	unsigned long retval;
 
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	retval = current->blocked.sig[0];
 	current->blocked.sig[0] = (newmask & _BLOCKABLE);
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	return retval;
 }
 

arch/sparc/kernel/time.c

@@ -386,7 +386,7 @@ void __init sbus_time_init(void)
 	else
 		clock_probe();
 
-	init_timers(timer_interrupt);
+	sparc_init_timers(timer_interrupt);
 	
 #ifdef CONFIG_SUN4
 	if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) {

arch/sparc/mm/srmmu.c

@@ -387,13 +387,13 @@ void srmmu_free_nocache(unsigned long vaddr, int size)
 	int offset;
 
 	if (vaddr < SRMMU_NOCACHE_VADDR) {
-		printk("Vaddr %x is smaller than nocache base 0x%x\n",
-		    vaddr, SRMMU_NOCACHE_VADDR);
+		printk("Vaddr %lx is smaller than nocache base 0x%lx\n",
+		    vaddr, (unsigned long)SRMMU_NOCACHE_VADDR);
 		BUG();
 	}
 	if (vaddr >= SRMMU_NOCACHE_END) {
-		printk("Vaddr %x is bigger than nocache end 0x%x\n",
-		    vaddr, SRMMU_NOCACHE_END);
+		printk("Vaddr %lx is bigger than nocache end 0x%lx\n",
+		    vaddr, (unsigned long)SRMMU_NOCACHE_END);
 		BUG();
 	}
 	if (size & (size-1)) {
@@ -405,7 +405,7 @@ void srmmu_free_nocache(unsigned long vaddr, int size)
 		BUG();
 	}
 	if (vaddr & (size-1)) {
-		printk("Vaddr 0x%x is not aligned to size 0x%x\n", vaddr, size);
+		printk("Vaddr %lx is not aligned to size 0x%x\n", vaddr, size);
 		BUG();
 	}
 
@@ -1173,7 +1173,7 @@ void __init srmmu_inherit_prom_mappings(unsigned long start,unsigned long end)
 			 */
 			unsigned int x;	/* Index of HW PMD in soft cluster */
 			x = (start >> SRMMU_PMD_SHIFT) & 15;
-			*(ulong *)__nocache_fix(&pmdp->pmdv[x]) = prompte;
+			*(unsigned long *)__nocache_fix(&pmdp->pmdv[x]) = prompte;
 			start += SRMMU_PMD_SIZE;
 			continue;
 		}

arch/sparc64/config.in

@@ -78,7 +78,6 @@ endmenu
 
 source drivers/serial/Config.in
 source drivers/sbus/char/Config.in
-source drivers/sbus/audio/Config.in
 source drivers/mtd/Config.in
 mainmenu_option next_comment
 comment 'Block devices'

arch/sparc64/defconfig

@@ -159,13 +159,6 @@ CONFIG_OBP_FLASH=m
 # CONFIG_SUN_VIDEOPIX is not set
 CONFIG_SUN_AURORA=m
 
-#
-# Linux/SPARC audio subsystem (EXPERIMENTAL)
-#
-CONFIG_SPARCAUDIO=m
-CONFIG_SPARCAUDIO_CS4231=m
-# CONFIG_SPARCAUDIO_DUMMY is not set
-
 #
 # Memory Technology Devices (MTD)
 #
@@ -497,6 +490,7 @@ CONFIG_8139TOO=m
 CONFIG_SIS900=m
 CONFIG_EPIC100=m
 CONFIG_SUNDANCE=m
+CONFIG_SUNDANCE_MMIO=y
 # CONFIG_TLAN is not set
 CONFIG_VIA_RHINE=m
 # CONFIG_VIA_RHINE_MMIO is not set
@@ -842,7 +836,64 @@ CONFIG_SOUND=m
 #
 # Advanced Linux Sound Architecture
 #
-# CONFIG_SND is not set
+CONFIG_SND=m
+CONFIG_SND_BIT32_EMUL=m
+CONFIG_SND_SEQUENCER=m
+CONFIG_SND_SEQ_DUMMY=m
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_SEQUENCER_OSS=y
+# CONFIG_SND_RTCTIMER is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_DEBUG_MEMORY is not set
+# CONFIG_SND_DEBUG_DETECT is not set
+
+#
+# Generic devices
+#
+CONFIG_SND_DUMMY=m
+CONFIG_SND_VIRMIDI=m
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# PCI devices
+#
+CONFIG_SND_ALI5451=m
+CONFIG_SND_CS46XX=m
+CONFIG_SND_CS46XX_ACCEPT_VALID=y
+CONFIG_SND_CS4281=m
+CONFIG_SND_EMU10K1=m
+CONFIG_SND_KORG1212=m
+CONFIG_SND_NM256=m
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_HDSP is not set
+CONFIG_SND_TRIDENT=m
+CONFIG_SND_YMFPCI=m
+CONFIG_SND_ALS4000=m
+CONFIG_SND_CMIPCI=m
+CONFIG_SND_ENS1370=m
+CONFIG_SND_ENS1371=m
+CONFIG_SND_ES1938=m
+CONFIG_SND_ES1968=m
+CONFIG_SND_MAESTRO3=m
+CONFIG_SND_FM801=m
+CONFIG_SND_ICE1712=m
+CONFIG_SND_INTEL8X0=m
+CONFIG_SND_SONICVIBES=m
+CONFIG_SND_VIA686=m
+CONFIG_SND_VIA8233=m
+
+#
+# ALSA Sparc devices
+#
+CONFIG_SND_SUN_AMD7930=m
+CONFIG_SND_SUN_CS4231=m
 
 #
 # USB support

arch/sparc64/kernel/Makefile

@@ -8,7 +8,7 @@ EXTRA_AFLAGS := -ansi
 
 EXTRA_TARGETS	:= head.o init_task.o
 
-export-objs	:= sparc64_ksyms.o
+export-objs	:= sparc64_ksyms.o ebus.o
 obj-y		:= process.o setup.o cpu.o idprom.o \
 		   traps.o devices.o auxio.o \
 		   irq.o ptrace.o time.o sys_sparc.o signal.o \

arch/sparc64/kernel/ebus.c

@@ -6,6 +6,7 @@
  */
 
 #include <linux/config.h>
+#include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/init.h>
@@ -20,6 +21,220 @@
 #include <asm/bpp.h>
 #include <asm/irq.h>
 
+/* EBUS dma library. */
+
+#define EBDMA_CSR	0x00UL	/* Control/Status */
+#define EBDMA_ADDR	0x04UL	/* DMA Address */
+#define EBDMA_COUNT	0x08UL	/* DMA Count */
+
+#define EBDMA_CSR_INT_PEND	0x00000001
+#define EBDMA_CSR_ERR_PEND	0x00000002
+#define EBDMA_CSR_DRAIN		0x00000004
+#define EBDMA_CSR_INT_EN	0x00000010
+#define EBDMA_CSR_RESET		0x00000080
+#define EBDMA_CSR_WRITE		0x00000100
+#define EBDMA_CSR_EN_DMA	0x00000200
+#define EBDMA_CSR_CYC_PEND	0x00000400
+#define EBDMA_CSR_DIAG_RD_DONE	0x00000800
+#define EBDMA_CSR_DIAG_WR_DONE	0x00001000
+#define EBDMA_CSR_EN_CNT	0x00002000
+#define EBDMA_CSR_TC		0x00004000
+#define EBDMA_CSR_DIS_CSR_DRN	0x00010000
+#define EBDMA_CSR_BURST_SZ_MASK	0x000c0000
+#define EBDMA_CSR_BURST_SZ_1	0x00080000
+#define EBDMA_CSR_BURST_SZ_4	0x00000000
+#define EBDMA_CSR_BURST_SZ_8	0x00040000
+#define EBDMA_CSR_BURST_SZ_16	0x000c0000
+#define EBDMA_CSR_DIAG_EN	0x00100000
+#define EBDMA_CSR_DIS_ERR_PEND	0x00400000
+#define EBDMA_CSR_TCI_DIS	0x00800000
+#define EBDMA_CSR_EN_NEXT	0x01000000
+#define EBDMA_CSR_DMA_ON	0x02000000
+#define EBDMA_CSR_A_LOADED	0x04000000
+#define EBDMA_CSR_NA_LOADED	0x08000000
+#define EBDMA_CSR_DEV_ID_MASK	0xf0000000
+
+#define EBUS_DMA_RESET_TIMEOUT	10000
+
+static void __ebus_dma_reset(struct ebus_dma_info *p)
+{
+	int i;
+	u32 val = 0;
+
+	writel(EBDMA_CSR_RESET, p->regs + EBDMA_CSR);
+
+	for (i = EBUS_DMA_RESET_TIMEOUT; i > 0; i--) {
+		val = readl(p->regs + EBDMA_CSR);
+
+		if (!(val & (EBDMA_CSR_DRAIN | EBDMA_CSR_CYC_PEND)))
+			break;
+		udelay(10);
+	}
+}
+
+static void ebus_dma_irq(int irq, void *dev_id, struct pt_regs *regs)
+{
+	struct ebus_dma_info *p = dev_id;
+	unsigned long flags;
+	u32 csr;
+
+	spin_lock_irqsave(&p->lock, flags);
+	csr = readl(p->regs + EBDMA_CSR);
+	writel(csr, p->regs + EBDMA_CSR);
+	spin_unlock_irqrestore(&p->lock, flags);
+
+	if (csr & EBDMA_CSR_ERR_PEND) {
+		printk(KERN_CRIT "ebus_dma(%s): DMA error!\n", p->name);
+		p->callback(p, EBUS_DMA_EVENT_ERROR, p->client_cookie);
+	} else if (csr & EBDMA_CSR_INT_PEND) {
+		p->callback(p,
+			    (csr & EBDMA_CSR_TC) ?
+			    EBUS_DMA_EVENT_DMA : EBUS_DMA_EVENT_DEVICE,
+			    p->client_cookie);
+	}
+}
+
+int ebus_dma_register(struct ebus_dma_info *p)
+{
+	if (!p->regs)
+		return -EINVAL;
+	if (p->flags & ~(EBUS_DMA_FLAG_USE_EBDMA_HANDLER))
+		return -EINVAL;
+	if ((p->flags & EBUS_DMA_FLAG_USE_EBDMA_HANDLER) && !p->callback)
+		return -EINVAL;
+	if (!strlen(p->name))
+		return -EINVAL;
+
+	__ebus_dma_reset(p);
+
+	return 0;
+}
+EXPORT_SYMBOL(ebus_dma_register);
+
+int ebus_dma_irq_enable(struct ebus_dma_info *p, int on)
+{
+	unsigned long flags;
+	u32 csr;
+
+	if (on) {
+		if (p->flags & EBUS_DMA_FLAG_USE_EBDMA_HANDLER) {
+			if (request_irq(p->irq, ebus_dma_irq, SA_SHIRQ, p->name, p))
+				return -EBUSY;
+		}
+
+		spin_lock_irqsave(&p->lock, flags);
+		csr = readl(p->regs + EBDMA_CSR);
+		csr |= EBDMA_CSR_INT_EN;
+		writel(csr, p->regs + EBDMA_CSR);
+		spin_unlock_irqrestore(&p->lock, flags);
+	} else {
+		spin_lock_irqsave(&p->lock, flags);
+		csr = readl(p->regs + EBDMA_CSR);
+		csr &= ~EBDMA_CSR_INT_EN;
+		writel(csr, p->regs + EBDMA_CSR);
+		spin_unlock_irqrestore(&p->lock, flags);
+
+		if (p->flags & EBUS_DMA_FLAG_USE_EBDMA_HANDLER) {
+			free_irq(p->irq, p);
+		}
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(ebus_dma_irq_enable);
+
+void ebus_dma_unregister(struct ebus_dma_info *p)
+{
+	unsigned long flags;
+	u32 csr;
+	int irq_on = 0;
+
+	spin_lock_irqsave(&p->lock, flags);
+	csr = readl(p->regs + EBDMA_CSR);
+	if (csr & EBDMA_CSR_INT_EN) {
+		csr &= ~EBDMA_CSR_INT_EN;
+		writel(csr, p->regs + EBDMA_CSR);
+		irq_on = 1;
+	}
+	spin_unlock_irqrestore(&p->lock, flags);
+
+	if (irq_on)
+		free_irq(p->irq, p);
+}
+EXPORT_SYMBOL(ebus_dma_unregister);
+
+int ebus_dma_request(struct ebus_dma_info *p, dma_addr_t bus_addr, size_t len)
+{
+	unsigned long flags;
+	u32 csr;
+	int err;
+
+	if (len >= (1 << 24))
+		return -EINVAL;
+
+	spin_lock_irqsave(&p->lock, flags);
+	csr = readl(p->regs + EBDMA_CSR);
+	err = -EINVAL;
+	if (!(csr & EBDMA_CSR_EN_DMA))
+		goto out;
+	err = -EBUSY;
+	if (csr & EBDMA_CSR_NA_LOADED)
+		goto out;
+
+	writel(len,      p->regs + EBDMA_COUNT);
+	writel(bus_addr, p->regs + EBDMA_ADDR);
+	err = 0;
+
+out:
+	spin_unlock_irqrestore(&p->lock, flags);
+
+	return err;
+}
+EXPORT_SYMBOL(ebus_dma_request);
+
+void ebus_dma_prepare(struct ebus_dma_info *p, int write)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&p->lock, flags);
+	__ebus_dma_reset(p);
+	writel(EBDMA_CSR_INT_EN |
+	       ((write) ? EBDMA_CSR_WRITE : 0) |
+	       EBDMA_CSR_EN_CNT |
+	       EBDMA_CSR_BURST_SZ_16 |
+	       EBDMA_CSR_EN_NEXT, p->regs + EBDMA_CSR);
+	spin_unlock_irqrestore(&p->lock, flags);
+}
+EXPORT_SYMBOL(ebus_dma_prepare);
+
+unsigned int ebus_dma_residue(struct ebus_dma_info *p)
+{
+	return readl(p->regs + EBDMA_COUNT);
+}
+EXPORT_SYMBOL(ebus_dma_residue);
+
+unsigned int ebus_dma_addr(struct ebus_dma_info *p)
+{
+	return readl(p->regs + EBDMA_ADDR);
+}
+EXPORT_SYMBOL(ebus_dma_addr);
+
+void ebus_dma_enable(struct ebus_dma_info *p, int on)
+{
+	unsigned long flags;
+	u32 csr;
+
+	spin_lock_irqsave(&p->lock, flags);
+	csr = readl(p->regs + EBDMA_CSR);
+	if (on)
+		csr |= EBDMA_CSR_EN_DMA;
+	else
+		csr &= ~EBDMA_CSR_EN_DMA;
+	writel(csr, p->regs + EBDMA_CSR);
+	spin_unlock_irqrestore(&p->lock, flags);
+}
+EXPORT_SYMBOL(ebus_dma_enable);
+
 struct linux_ebus *ebus_chain = 0;
 
 #ifdef CONFIG_SUN_AUXIO

arch/sparc64/kernel/irq.c

@@ -950,8 +950,8 @@ int probe_irq_off(unsigned long mask)
 }
 
 /* This is gets the master TICK_INT timer going. */
-void init_timers(void (*cfunc)(int, void *, struct pt_regs *),
-		 unsigned long *clock)
+void sparc64_init_timers(void (*cfunc)(int, void *, struct pt_regs *),
+			 unsigned long *clock)
 {
 	unsigned long pstate;
 	extern unsigned long timer_tick_offset;

arch/sparc64/kernel/pci_schizo.c

@@ -1071,7 +1071,7 @@ static void __init schizo_register_error_handlers(struct pci_controller_info *p)
 	u64 tmp;
 
 	/* Build IRQs and register handlers. */
-	irq = schizo_irq_build(pbm_a, NULL, (portid << 6) | SCHIZO_UE_INO);
+	irq = schizo_irq_build(pbm_b, NULL, (portid << 6) | SCHIZO_UE_INO);
 	if (request_irq(irq, schizo_ue_intr,
 			SA_SHIRQ, "SCHIZO UE", p) < 0) {
 		prom_printf("SCHIZO%d: Cannot register UE interrupt.\n",
@@ -1082,7 +1082,7 @@ static void __init schizo_register_error_handlers(struct pci_controller_info *p)
 	tmp = readl(bucket->imap);
 	upa_writel(tmp, (base + SCHIZO_PBM_B_REGS_OFF + schizo_imap_offset(SCHIZO_UE_INO) + 4));
 
-	irq = schizo_irq_build(pbm_a, NULL, (portid << 6) | SCHIZO_CE_INO);
+	irq = schizo_irq_build(pbm_b, NULL, (portid << 6) | SCHIZO_CE_INO);
 	if (request_irq(irq, schizo_ce_intr,
 			SA_SHIRQ, "SCHIZO CE", p) < 0) {
 		prom_printf("SCHIZO%d: Cannot register CE interrupt.\n",
@@ -1102,9 +1102,9 @@ static void __init schizo_register_error_handlers(struct pci_controller_info *p)
 	}
 	bucket = __bucket(irq);
 	tmp = upa_readl(bucket->imap);
-	upa_writel(tmp, (base + SCHIZO_PBM_B_REGS_OFF + schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
+	upa_writel(tmp, (base + SCHIZO_PBM_A_REGS_OFF + schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
 
-	irq = schizo_irq_build(pbm_a, NULL, (portid << 6) | SCHIZO_PCIERR_B_INO);
+	irq = schizo_irq_build(pbm_b, NULL, (portid << 6) | SCHIZO_PCIERR_B_INO);
 	if (request_irq(irq, schizo_pcierr_intr,
 			SA_SHIRQ, "SCHIZO PCIERR", pbm_b) < 0) {
 		prom_printf("SCHIZO%d(PBMB): Cannot register PciERR interrupt.\n",
@@ -1115,7 +1115,7 @@ static void __init schizo_register_error_handlers(struct pci_controller_info *p)
 	tmp = upa_readl(bucket->imap);
 	upa_writel(tmp, (base + SCHIZO_PBM_B_REGS_OFF + schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
 
-	irq = schizo_irq_build(pbm_a, NULL, (portid << 6) | SCHIZO_SERR_INO);
+	irq = schizo_irq_build(pbm_b, NULL, (portid << 6) | SCHIZO_SERR_INO);
 	if (request_irq(irq, schizo_safarierr_intr,
 			SA_SHIRQ, "SCHIZO SERR", p) < 0) {
 		prom_printf("SCHIZO%d(PBMB): Cannot register SafariERR interrupt.\n",

arch/sparc64/kernel/power.c

@@ -69,9 +69,9 @@ static int powerd(void *__unused)
 
 again:
 	while (button_pressed == 0) {
-		spin_lock_irq(&current->sigmask_lock);
+		spin_lock_irq(&current->sig->siglock);
 		flush_signals(current);
-		spin_unlock_irq(&current->sigmask_lock);
+		spin_unlock_irq(&current->sig->siglock);
 		interruptible_sleep_on(&powerd_wait);
 	}
 

arch/sparc64/kernel/signal.c

@@ -99,10 +99,10 @@ asmlinkage void sparc64_set_context(struct pt_regs *regs)
 				goto do_sigsegv;
 		}
 		sigdelsetmask(&set, ~_BLOCKABLE);
-		spin_lock_irq(&current->sigmask_lock);
+		spin_lock_irq(&current->sig->siglock);
 		current->blocked = set;
 		recalc_sigpending();
-		spin_unlock_irq(&current->sigmask_lock);
+		spin_unlock_irq(&current->sig->siglock);
 	}
 	if (test_thread_flag(TIF_32BIT)) {
 		pc &= 0xffffffff;
@@ -286,11 +286,11 @@ asmlinkage void _sigpause_common(old_sigset_t set, struct pt_regs *regs)
 	}
 #endif
 	set &= _BLOCKABLE;
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	saveset = current->blocked;
 	siginitset(&current->blocked, set);
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	
 	if (test_thread_flag(TIF_32BIT)) {
 		regs->tpc = (regs->tnpc & 0xffffffff);
@@ -346,11 +346,11 @@ asmlinkage void do_rt_sigsuspend(sigset_t *uset, size_t sigsetsize, struct pt_re
 	}
                                                                 
 	sigdelsetmask(&set, ~_BLOCKABLE);
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	oldset = current->blocked;
 	current->blocked = set;
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	
 	if (test_thread_flag(TIF_32BIT)) {
 		regs->tpc = (regs->tnpc & 0xffffffff);
@@ -457,10 +457,10 @@ void do_rt_sigreturn(struct pt_regs *regs)
 	set_fs(old_fs);
 
 	sigdelsetmask(&set, ~_BLOCKABLE);
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	current->blocked = set;
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	return;
 segv:
 	send_sig(SIGSEGV, current, 1);
@@ -593,11 +593,11 @@ static inline void handle_signal(unsigned long signr, struct k_sigaction *ka,
 	if (ka->sa.sa_flags & SA_ONESHOT)
 		ka->sa.sa_handler = SIG_DFL;
 	if (!(ka->sa.sa_flags & SA_NOMASK)) {
-		spin_lock_irq(&current->sigmask_lock);
+		spin_lock_irq(&current->sig->siglock);
 		sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
 		sigaddset(&current->blocked,signr);
 		recalc_sigpending();
-		spin_unlock_irq(&current->sigmask_lock);
+		spin_unlock_irq(&current->sig->siglock);
 	}
 }
 
@@ -652,9 +652,9 @@ static int do_signal(sigset_t *oldset, struct pt_regs * regs,
 			spin_unlock(&current->sig->siglock);
 		}
 		if (!signr) {
-			spin_lock(&current->sigmask_lock);
+			spin_lock(&current->sig->siglock);
 			signr = dequeue_signal(&current->pending, mask, &info);
-			spin_unlock(&current->sigmask_lock);
+			spin_unlock(&current->sig->siglock);
 		}
 		local_irq_enable();
 		

arch/sparc64/kernel/signal32.c

@@ -143,11 +143,11 @@ asmlinkage void _sigpause32_common(old_sigset_t32 set, struct pt_regs *regs)
 	sigset_t saveset;
 
 	set &= _BLOCKABLE;
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	saveset = current->blocked;
 	siginitset(&current->blocked, set);
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	
 	regs->tpc = regs->tnpc;
 	regs->tnpc += 4;
@@ -198,11 +198,11 @@ asmlinkage void do_rt_sigsuspend32(u32 uset, size_t sigsetsize, struct pt_regs *
 	case 1: set.sig[0] = set32.sig[0] + (((long)set32.sig[1]) << 32);
 	}
 	sigdelsetmask(&set, ~_BLOCKABLE);
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	oldset = current->blocked;
 	current->blocked = set;
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	
 	regs->tpc = regs->tnpc;
 	regs->tnpc += 4;
@@ -311,10 +311,10 @@ void do_new_sigreturn32(struct pt_regs *regs)
 		case 1: set.sig[0] = seta[0] + (((long)seta[1]) << 32);
 	}
 	sigdelsetmask(&set, ~_BLOCKABLE);
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	current->blocked = set;
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	return;
 
 segv:
@@ -358,10 +358,10 @@ asmlinkage void do_sigreturn32(struct pt_regs *regs)
 		case 1: set.sig[0] = seta[0] + (((long)seta[1]) << 32);
 	}
 	sigdelsetmask(&set, ~_BLOCKABLE);
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	current->blocked = set;
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	
 	if (test_thread_flag(TIF_32BIT)) {
 		pc &= 0xffffffff;
@@ -460,10 +460,10 @@ asmlinkage void do_rt_sigreturn32(struct pt_regs *regs)
 		case 1: set.sig[0] = seta.sig[0] + (((long)seta.sig[1]) << 32);
 	}
 	sigdelsetmask(&set, ~_BLOCKABLE);
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	current->blocked = set;
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	return;
 segv:
 	do_exit(SIGSEGV);
@@ -1058,10 +1058,10 @@ asmlinkage int svr4_setcontext(svr4_ucontext_t *c, struct pt_regs *regs)
 	set_fs(old_fs);
 	
 	sigdelsetmask(&set, ~_BLOCKABLE);
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	current->blocked = set;
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	regs->tpc = pc;
 	regs->tnpc = npc | 1;
 	if (test_thread_flag(TIF_32BIT)) {
@@ -1240,11 +1240,11 @@ static inline void handle_signal32(unsigned long signr, struct k_sigaction *ka,
 	if (ka->sa.sa_flags & SA_ONESHOT)
 		ka->sa.sa_handler = SIG_DFL;
 	if (!(ka->sa.sa_flags & SA_NOMASK)) {
-		spin_lock_irq(&current->sigmask_lock);
+		spin_lock_irq(&current->sig->siglock);
 		sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
 		sigaddset(&current->blocked,signr);
 		recalc_sigpending();
-		spin_unlock_irq(&current->sigmask_lock);
+		spin_unlock_irq(&current->sig->siglock);
 	}
 }
 
@@ -1291,9 +1291,9 @@ int do_signal32(sigset_t *oldset, struct pt_regs * regs,
 			spin_unlock(&current->sig->siglock);
 		}
 		if (!signr) {
-			spin_lock(&current->sigmask_lock);
+			spin_lock(&current->sig->siglock);
 			signr = dequeue_signal(&current->pending, mask, &info);
-			spin_unlock(&current->sigmask_lock);
+			spin_unlock(&current->sig->siglock);
 		}
 		local_irq_enable();
 		

arch/sparc64/kernel/sys_sparc32.c

@@ -1972,7 +1972,7 @@ sys32_rt_sigtimedwait(sigset_t32 *uthese, siginfo_t32 *uinfo,
 	}
 
 	spin_lock_irq(&current->sig->siglock);
-	spin_lock(&current->sigmask_lock);
+	spin_lock(&current->sig->siglock);
 	sig = dequeue_signal(&current->sig->shared_pending, &these, &info);
 	if (!sig)
 		sig = dequeue_signal(&current->pending, &these, &info);
@@ -1989,14 +1989,14 @@ sys32_rt_sigtimedwait(sigset_t32 *uthese, siginfo_t32 *uinfo,
 			current->real_blocked = current->blocked;
 			sigandsets(&current->blocked, &current->blocked, &these);
 			recalc_sigpending();
-			spin_unlock(&current->sigmask_lock);
+			spin_unlock(&current->sig->siglock);
 			spin_unlock_irq(&current->sig->siglock);
 
 			current->state = TASK_INTERRUPTIBLE;
 			timeout = schedule_timeout(timeout);
 
 			spin_lock_irq(&current->sig->siglock);
-			spin_lock(&current->sigmask_lock);
+			spin_lock(&current->sig->siglock);
 			sig = dequeue_signal(&current->sig->shared_pending, &these, &info);
 			if (!sig)
 				sig = dequeue_signal(&current->pending, &these, &info);
@@ -2005,7 +2005,7 @@ sys32_rt_sigtimedwait(sigset_t32 *uthese, siginfo_t32 *uinfo,
 			recalc_sigpending();
 		}
 	}
-	spin_unlock(&current->sigmask_lock);
+	spin_unlock(&current->sig->siglock);
 	spin_unlock_irq(&current->sig->siglock);
 
 	if (sig) {

arch/sparc64/kernel/sys_sunos32.c

@@ -234,11 +234,11 @@ asmlinkage u32 sunos_sigblock(u32 blk_mask)
 {
 	u32 old;
 
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	old = (u32) current->blocked.sig[0];
 	current->blocked.sig[0] |= (blk_mask & _BLOCKABLE);
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	return old;
 }
 
@@ -246,11 +246,11 @@ asmlinkage u32 sunos_sigsetmask(u32 newmask)
 {
 	u32 retval;
 
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	retval = (u32) current->blocked.sig[0];
 	current->blocked.sig[0] = (newmask & _BLOCKABLE);
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	return retval;
 }
 

arch/sparc64/kernel/time.c

@@ -617,9 +617,6 @@ void __init clock_probe(void)
 	local_irq_restore(flags);
 }
 
-extern void init_timers(void (*func)(int, void *, struct pt_regs *),
-			unsigned long *);
-
 void __init time_init(void)
 {
 	/* clock_probe() is now done at end of [se]bus_init on sparc64
@@ -628,7 +625,7 @@ void __init time_init(void)
 	 */
 	unsigned long clock;
 
-	init_timers(timer_interrupt, &clock);
+	sparc64_init_timers(timer_interrupt, &clock);
 	timer_ticks_per_usec_quotient = ((1UL<<32) / (clock / 1000020));
 }
 

arch/sparc64/solaris/signal.c

@@ -99,16 +99,16 @@ static inline long solaris_signal(int sig, u32 arg)
 static long solaris_sigset(int sig, u32 arg)
 {
 	if (arg != 2) /* HOLD */ {
-		spin_lock_irq(&current->sigmask_lock);
+		spin_lock_irq(&current->sig->siglock);
 		sigdelsetmask(&current->blocked, _S(sig));
 		recalc_sigpending();
-		spin_unlock_irq(&current->sigmask_lock);
+		spin_unlock_irq(&current->sig->siglock);
 		return sig_handler (sig, arg, 0);
 	} else {
-		spin_lock_irq(&current->sigmask_lock);
+		spin_lock_irq(&current->sig->siglock);
 		sigaddsetmask(&current->blocked, (_S(sig) & ~_BLOCKABLE));
 		recalc_sigpending();
-		spin_unlock_irq(&current->sigmask_lock);
+		spin_unlock_irq(&current->sig->siglock);
 		return 0;
 	}
 }
@@ -120,10 +120,10 @@ static inline long solaris_sighold(int sig)
 
 static inline long solaris_sigrelse(int sig)
 {
-	spin_lock_irq(&current->sigmask_lock);
+	spin_lock_irq(&current->sig->siglock);
 	sigdelsetmask(&current->blocked, _S(sig));
 	recalc_sigpending();
-	spin_unlock_irq(&current->sigmask_lock);
+	spin_unlock_irq(&current->sig->siglock);
 	return 0;
 }
 
@@ -311,10 +311,10 @@ asmlinkage int solaris_sigpending(int which, u32 set)
 	u32 tmp[4];
 	switch (which) {
 	case 1: /* sigpending */
-		spin_lock_irq(&current->sigmask_lock);
+		spin_lock_irq(&current->sig->siglock);
 		sigandsets(&s, &current->blocked, &current->pending.signal);
 		recalc_sigpending();
-		spin_unlock_irq(&current->sigmask_lock);
+		spin_unlock_irq(&current->sig->siglock);
 		break;
 	case 2: /* sigfillset - I just set signals which have linux equivalents */
 		sigfillset(&s);

drivers/input/keyboard/sunkbd.c

@@ -106,8 +106,7 @@ static void sunkbd_interrupt(struct serio *serio, unsigned char data, unsigned i
 	switch (data) {
 
 		case SUNKBD_RET_RESET:
-			queue_task(&sunkbd->tq, &tq_immediate);
-			mark_bh(IMMEDIATE_BH);
+			schedule_task(&sunkbd->tq);
 			sunkbd->reset = -1;
 			return;
 

drivers/sbus/audio/Config.help

-CONFIG_SPARCAUDIO
-  This driver provides support for the build-in sound devices on most
-  Sun machines. If you want to be able to use this, select this option
-  and one or more of the lowlevel drivers below. See
-  <http://www.dementia.org/~shadow/sparcaudio.html> for more
-  information.
-
-CONFIG_SPARCAUDIO_AMD7930
-  This driver supports the AMD 7930 chip found on sun4c, 4/6xx, and
-  SparcClassic systems.
-
-CONFIG_SPARCAUDIO_CS4231
-  This driver supports the Crystal Semiconductor CS4231 chip found on
-  the SS4, SS5, and Ultras.
-
-CONFIG_SPARCAUDIO_DBRI
-  This driver supports the DBRI audio interface found on the SS10,
-  SS20, Sparcbook 3, and Voyager systems.
-
-CONFIG_SPARCAUDIO_DUMMY
-  This is a pseudo-driver used for debugging and testing the
-  sparcaudio subsystem. Say N unless you want to work on this
-  subsystem.
-

drivers/sbus/audio/Config.in

-#
-# Configuration script for sparcaudio subsystem
-#
-
-if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
-
-   mainmenu_option next_comment
-   comment 'Linux/SPARC audio subsystem (EXPERIMENTAL)'
-
-   tristate 'Audio support (EXPERIMENTAL)' CONFIG_SPARCAUDIO
-   if [ "$CONFIG_SPARC64" != "y" ]; then
-     dep_tristate '  AMD7930 Lowlevel Driver' CONFIG_SPARCAUDIO_AMD7930 $CONFIG_SPARCAUDIO
-     dep_tristate '  DBRI Lowlevel Driver' CONFIG_SPARCAUDIO_DBRI $CONFIG_SPARCAUDIO
-   fi
-   dep_tristate '  CS4231 Lowlevel Driver' CONFIG_SPARCAUDIO_CS4231 $CONFIG_SPARCAUDIO
-   dep_tristate '  Dummy Lowlevel Driver' CONFIG_SPARCAUDIO_DUMMY $CONFIG_SPARCAUDIO
-   endmenu
-fi

drivers/sbus/audio/Makefile

-#
-# Makefile for the kernel SPARC audio drivers.
-#
-# 7 October 2000, Bartlomiej Zolnierkiewicz <bkz@linux-ide.org>
-# Rewritten to use lists instead of if-statements.
-#
-
-export-objs	:= audio.o amd7930.o dbri.o
-
-obj-$(CONFIG_SPARCAUDIO)		+= audio.o
-obj-$(CONFIG_SPARCAUDIO_AMD7930)	+= amd7930.o
-obj-$(CONFIG_SPARCAUDIO_DBRI)		+= dbri.o
-obj-$(CONFIG_SPARCAUDIO_CS4231)		+= cs4231.o
-obj-$(CONFIG_SPARCAUDIO_DUMMY)		+= dmy.o
-
-include $(TOPDIR)/Rules.make

drivers/sbus/audio/amd7930.h

-/* $Id: amd7930.h,v 1.8 1999/09/21 14:37:10 davem Exp $
- * drivers/sbus/audio/amd7930.h
- *
- * Copyright (C) 1996 Thomas K. Dyas (tdyas@noc.rutgers.edu)
- *
- * Definitions for the AMD79C30 Digital Subscriber Controller which is
- * used as an audio chip in sun4c architecture machines. The
- * information in this file is based on Advanced Micro Devices
- * Publication 09893, Rev G, Amendment /0, Final (a.k.a. the data
- * sheet).
- */
-
-#ifndef _AMD7930_H_
-#define _AMD7930_H_
-
-#include <linux/types.h>
-#include <linux/version.h>
-
-/* Register interface presented to the CPU by the amd7930. */
-#define CR	0x00UL		/* Command Register (W) */
-#define IR	CR		/* Interrupt Register (R) */
-#define DR	0x01UL		/* Data Register (R/W) */
-#define DSR1	0x02UL		/* D-channel Status Register 1 (R) */
-#define DER	0x03UL		/* D-channel Error Register (R) */
-#define DCTB	0x04UL		/* D-channel Transmit Buffer (W) */
-#define DCRB	DCTB		/* D-channel Receive Buffer (R) */
-#define BBTB	0x05UL		/* Bb-channel Transmit Buffer (W) */
-#define BBRB	BBTB		/* Bb-channel Receive Buffer (R) */
-#define BCTB	0x06UL		/* Bc-channel Transmit Buffer (W) */
-#define BCRB	BCTB		/* Bc-channel Receive Buffer (R) */
-#define DSR2	0x07UL		/* D-channel Status Register 2 (R) */
-
-/* Indirect registers in the Main Audio Processor. */
-struct amd7930_map {
-	__u16	x[8];
-	__u16	r[8];
-	__u16	gx;
-	__u16	gr;
-	__u16	ger;
-	__u16	stgr;
-	__u16	ftgr;
-	__u16	atgr;
-	__u8	mmr1;
-	__u8	mmr2;
-};
-
-
-/* After an amd7930 interrupt, reading the Interrupt Register (ir)
- * clears the interrupt and returns a bitmask indicated which
- * interrupt source(s) require service
- */
-
-#define AMR_IR_DTTHRSH			0x01 /* D-channel xmit threshold */
-#define AMR_IR_DRTHRSH			0x02 /* D-channel recv threshold */
-#define AMR_IR_DSRI			0x04 /* D-channel packet status */
-#define AMR_IR_DERI			0x08 /* D-channel error */
-#define AMR_IR_BBUF			0x10 /* B-channel data xfer */
-#define AMR_IR_LSRI			0x20 /* LIU status */
-#define AMR_IR_DSR2I			0x40 /* D-channel buffer status */
-#define AMR_IR_MLTFRMI			0x80 /* multiframe or PP */
-
-/* The amd7930 has "indirect registers" which are accessed by writing
- * the register number into the Command Register and then reading or
- * writing values from the Data Register as appropriate. We define the
- * AMR_* macros to be the indirect register numbers and AM_* macros to
- * be bits in whatever register is referred to.
- */
-
-/* Initialization */
-#define	AMR_INIT			0x21
-#define		AM_INIT_ACTIVE			0x01
-#define		AM_INIT_DATAONLY		0x02
-#define		AM_INIT_POWERDOWN		0x03
-#define		AM_INIT_DISABLE_INTS		0x04
-#define AMR_INIT2			0x20
-#define		AM_INIT2_ENABLE_POWERDOWN	0x20
-#define		AM_INIT2_ENABLE_MULTIFRAME	0x10
-
-/* Line Interface Unit */
-#define	AMR_LIU_LSR			0xA1
-#define		AM_LIU_LSR_STATE		0x07
-#define		AM_LIU_LSR_F3			0x08
-#define		AM_LIU_LSR_F7			0x10
-#define		AM_LIU_LSR_F8			0x20
-#define		AM_LIU_LSR_HSW			0x40
-#define		AM_LIU_LSR_HSW_CHG		0x80
-#define	AMR_LIU_LPR			0xA2
-#define	AMR_LIU_LMR1			0xA3
-#define		AM_LIU_LMR1_B1_ENABL		0x01
-#define		AM_LIU_LMR1_B2_ENABL		0x02
-#define		AM_LIU_LMR1_F_DISABL		0x04
-#define		AM_LIU_LMR1_FA_DISABL		0x08
-#define		AM_LIU_LMR1_REQ_ACTIV		0x10
-#define		AM_LIU_LMR1_F8_F3		0x20
-#define		AM_LIU_LMR1_LIU_ENABL		0x40
-#define	AMR_LIU_LMR2			0xA4
-#define		AM_LIU_LMR2_DECHO		0x01
-#define		AM_LIU_LMR2_DLOOP		0x02
-#define		AM_LIU_LMR2_DBACKOFF		0x04
-#define		AM_LIU_LMR2_EN_F3_INT		0x08
-#define		AM_LIU_LMR2_EN_F8_INT		0x10
-#define		AM_LIU_LMR2_EN_HSW_INT		0x20
-#define		AM_LIU_LMR2_EN_F7_INT		0x40
-#define	AMR_LIU_2_4			0xA5
-#define	AMR_LIU_MF			0xA6
-#define	AMR_LIU_MFSB			0xA7
-#define	AMR_LIU_MFQB			0xA8
-
-/* Multiplexor */
-#define	AMR_MUX_MCR1			0x41
-#define	AMR_MUX_MCR2			0x42
-#define	AMR_MUX_MCR3			0x43
-#define		AM_MUX_CHANNEL_B1		0x01
-#define		AM_MUX_CHANNEL_B2		0x02
-#define		AM_MUX_CHANNEL_Ba		0x03
-#define		AM_MUX_CHANNEL_Bb		0x04
-#define		AM_MUX_CHANNEL_Bc		0x05
-#define		AM_MUX_CHANNEL_Bd		0x06
-#define		AM_MUX_CHANNEL_Be		0x07
-#define		AM_MUX_CHANNEL_Bf		0x08
-#define	AMR_MUX_MCR4			0x44
-#define		AM_MUX_MCR4_ENABLE_INTS		0x08
-#define		AM_MUX_MCR4_REVERSE_Bb		0x10
-#define		AM_MUX_MCR4_REVERSE_Bc		0x20
-#define	AMR_MUX_1_4			0x45
-
-/* Main Audio Processor */
-#define	AMR_MAP_X			0x61
-#define	AMR_MAP_R			0x62
-#define	AMR_MAP_GX			0x63
-#define	AMR_MAP_GR			0x64
-#define	AMR_MAP_GER			0x65
-#define	AMR_MAP_STGR			0x66
-#define	AMR_MAP_FTGR_1_2		0x67
-#define	AMR_MAP_ATGR_1_2		0x68
-#define	AMR_MAP_MMR1			0x69
-#define		AM_MAP_MMR1_ALAW		0x01
-#define		AM_MAP_MMR1_GX			0x02
-#define		AM_MAP_MMR1_GR			0x04
-#define		AM_MAP_MMR1_GER			0x08
-#define		AM_MAP_MMR1_X			0x10
-#define		AM_MAP_MMR1_R			0x20
-#define		AM_MAP_MMR1_STG			0x40
-#define		AM_MAP_MMR1_LOOPBACK		0x80
-#define	AMR_MAP_MMR2			0x6A
-#define		AM_MAP_MMR2_AINB		0x01
-#define		AM_MAP_MMR2_LS			0x02
-#define		AM_MAP_MMR2_ENABLE_DTMF		0x04
-#define		AM_MAP_MMR2_ENABLE_TONEGEN	0x08
-#define		AM_MAP_MMR2_ENABLE_TONERING	0x10
-#define		AM_MAP_MMR2_DISABLE_HIGHPASS	0x20
-#define		AM_MAP_MMR2_DISABLE_AUTOZERO	0x40
-#define	AMR_MAP_1_10			0x6B
-#define	AMR_MAP_MMR3			0x6C
-#define	AMR_MAP_STRA			0x6D
-#define	AMR_MAP_STRF			0x6E
-#define	AMR_MAP_PEAKX			0x70
-#define	AMR_MAP_PEAKR			0x71
-#define	AMR_MAP_15_16			0x72
-
-/* Data Link Controller */
-#define	AMR_DLC_FRAR_1_2_3		0x81
-#define	AMR_DLC_SRAR_1_2_3		0x82
-#define	AMR_DLC_TAR			0x83
-#define	AMR_DLC_DRLR			0x84
-#define	AMR_DLC_DTCR			0x85
-#define	AMR_DLC_DMR1			0x86
-#define		AMR_DLC_DMR1_DTTHRSH_INT	0x01
-#define		AMR_DLC_DMR1_DRTHRSH_INT	0x02
-#define		AMR_DLC_DMR1_TAR_ENABL		0x04
-#define		AMR_DLC_DMR1_EORP_INT		0x08
-#define		AMR_DLC_DMR1_EN_ADDR1		0x10
-#define		AMR_DLC_DMR1_EN_ADDR2		0x20
-#define		AMR_DLC_DMR1_EN_ADDR3		0x40
-#define		AMR_DLC_DMR1_EN_ADDR4		0x80
-#define		AMR_DLC_DMR1_EN_ADDRS		0xf0
-#define	AMR_DLC_DMR2			0x87
-#define		AMR_DLC_DMR2_RABRT_INT		0x01
-#define		AMR_DLC_DMR2_RESID_INT		0x02
-#define		AMR_DLC_DMR2_COLL_INT		0x04
-#define		AMR_DLC_DMR2_FCS_INT		0x08
-#define		AMR_DLC_DMR2_OVFL_INT		0x10
-#define		AMR_DLC_DMR2_UNFL_INT		0x20
-#define		AMR_DLC_DMR2_OVRN_INT		0x40
-#define		AMR_DLC_DMR2_UNRN_INT		0x80
-#define	AMR_DLC_1_7			0x88
-#define	AMR_DLC_DRCR			0x89
-#define	AMR_DLC_RNGR1			0x8A
-#define	AMR_DLC_RNGR2			0x8B
-#define	AMR_DLC_FRAR4			0x8C
-#define	AMR_DLC_SRAR4			0x8D
-#define	AMR_DLC_DMR3			0x8E
-#define		AMR_DLC_DMR3_VA_INT		0x01
-#define		AMR_DLC_DMR3_EOTP_INT		0x02
-#define		AMR_DLC_DMR3_LBRP_INT		0x04
-#define		AMR_DLC_DMR3_RBA_INT		0x08
-#define		AMR_DLC_DMR3_LBT_INT		0x10
-#define		AMR_DLC_DMR3_TBE_INT		0x20
-#define		AMR_DLC_DMR3_RPLOST_INT		0x40
-#define		AMR_DLC_DMR3_KEEP_FCS		0x80
-#define	AMR_DLC_DMR4			0x8F
-#define		AMR_DLC_DMR4_RCV_1		0x00
-#define		AMR_DLC_DMR4_RCV_2		0x01
-#define		AMR_DLC_DMR4_RCV_4		0x02
-#define		AMR_DLC_DMR4_RCV_8		0x03
-#define		AMR_DLC_DMR4_RCV_16		0x01
-#define		AMR_DLC_DMR4_RCV_24		0x02
-#define		AMR_DLC_DMR4_RCV_30		0x03
-#define		AMR_DLC_DMR4_XMT_1		0x00
-#define		AMR_DLC_DMR4_XMT_2		0x04
-#define		AMR_DLC_DMR4_XMT_4		0x08
-#define		AMR_DLC_DMR4_XMT_8		0x0c
-#define		AMR_DLC_DMR4_XMT_10		0x08
-#define		AMR_DLC_DMR4_XMT_14		0x0c
-#define		AMR_DLC_DMR4_IDLE_MARK		0x00
-#define		AMR_DLC_DMR4_IDLE_FLAG		0x10
-#define		AMR_DLC_DMR4_ADDR_BOTH		0x00
-#define		AMR_DLC_DMR4_ADDR_1ST		0x20
-#define		AMR_DLC_DMR4_ADDR_2ND		0xa0
-#define		AMR_DLC_DMR4_CR_ENABLE		0x40
-#define	AMR_DLC_12_15			0x90
-#define	AMR_DLC_ASR			0x91
-#define	AMR_DLC_EFCR			0x92
-#define		AMR_DLC_EFCR_EXTEND_FIFO	0x01
-#define		AMR_DLC_EFCR_SEC_PKT_INT	0x02
-
-#define AMR_DSR1_VADDR			0x01
-#define AMR_DSR1_EORP			0x02
-#define AMR_DSR1_PKT_IP			0x04
-#define AMR_DSR1_DECHO_ON		0x08
-#define AMR_DSR1_DLOOP_ON		0x10
-#define AMR_DSR1_DBACK_OFF		0x20
-#define AMR_DSR1_EOTP			0x40
-#define AMR_DSR1_CXMT_ABRT		0x80
-
-#define AMR_DSR2_LBRP			0x01
-#define AMR_DSR2_RBA			0x02
-#define AMR_DSR2_RPLOST			0x04
-#define AMR_DSR2_LAST_BYTE		0x08
-#define AMR_DSR2_TBE			0x10
-#define AMR_DSR2_MARK_IDLE		0x20
-#define AMR_DSR2_FLAG_IDLE		0x40
-#define AMR_DSR2_SECOND_PKT		0x80
-
-#define AMR_DER_RABRT			0x01
-#define AMR_DER_RFRAME			0x02
-#define AMR_DER_COLLISION		0x04
-#define AMR_DER_FCS			0x08
-#define AMR_DER_OVFL			0x10
-#define AMR_DER_UNFL			0x20
-#define AMR_DER_OVRN			0x40
-#define AMR_DER_UNRN			0x80
-
-/* Peripheral Port */
-#define	AMR_PP_PPCR1			0xC0
-#define	AMR_PP_PPSR			0xC1
-#define	AMR_PP_PPIER			0xC2
-#define	AMR_PP_MTDR			0xC3
-#define	AMR_PP_MRDR			0xC3
-#define	AMR_PP_CITDR0			0xC4
-#define	AMR_PP_CIRDR0			0xC4
-#define	AMR_PP_CITDR1			0xC5
-#define	AMR_PP_CIRDR1			0xC5
-#define	AMR_PP_PPCR2			0xC8
-#define	AMR_PP_PPCR3			0xC9
-
-/* Give this chip a "default" sample rate */
-#define AMD7930_RATE                    (8000)
-
-#endif /* _AMD7930_H_ */

drivers/sbus/audio/cs4215.h

-/* $Id: cs4215.h,v 1.8 2000/10/27 07:01:38 uzi Exp $
- * drivers/sbus/audio/cs4215.h
- *
- * Copyright (C) 1997 Rudolf Koenig (rfkoenig@immd4.informatik.uni-erlangen.de)
- * Used with dbri.h
- */
-
-#ifndef _CS4215_H_
-#define _CS4215_H_
-
-struct cs4215 {
-	__u8	data[4];	/* Data mode: Time slots 5-8 */
-	__u8	ctrl[4];	/* Ctrl mode: Time slots 1-4 */
-	__u8	onboard;
-	__u8	offset;		/* Bit offset from frame sync to time slot 1 */
-	volatile __u32	status;
-	volatile __u32	version;
-};
-
-
-/*
- * Control mode first 
- */
-
-/* Time Slot 1, Status register */
-#define CS4215_CLB	(1<<2)	/* Control Latch Bit */
-#define CS4215_OLB	(1<<3)	/* 1: line: 2.0V, speaker 4V */
-				/* 0: line: 2.8V, speaker 8V */
-#define CS4215_MLB	(1<<4)	/* 1: Microphone: 20dB gain disabled */
-#define CS4215_RSRVD_1  (1<<5)
-
-
-/* Time Slot 2, Data Format Register */
-#define CS4215_DFR_LINEAR16	0
-#define CS4215_DFR_ULAW		1
-#define CS4215_DFR_ALAW		2
-#define CS4215_DFR_LINEAR8	3
-#define CS4215_DFR_STEREO	(1<<2)
-static struct {
-	unsigned short freq;
-	unsigned char  xtal;
-	unsigned char  csval;
-} CS4215_FREQ[] = {
-	{	 8000,	(1<<4),	(0<<3)	},
-	{	16000,	(1<<4),	(1<<3)	},
-	{	27429,	(1<<4),	(2<<3)	},	/* Actually 24428.57 */
-	{	32000,	(1<<4),	(3<<3)	},
-	/* {	 NA,	(1<<4),	(4<<3)	}, */
-	/* {	 NA,	(1<<4),	(5<<3)	}, */
-	{	48000,	(1<<4),	(6<<3)	},
-	{	 9600,	(1<<4),	(7<<3)	},
-	{	 5513,	(2<<4),	(0<<3)	},	/* Actually 5512.5 */
-	{	11025,	(2<<4),	(1<<3)	},
-	{	18900,	(2<<4),	(2<<3)	},
-	{	22050,	(2<<4),	(3<<3)	},
-	{	37800,	(2<<4),	(4<<3)	},
-	{	44100,	(2<<4),	(5<<3)	},
-	{	33075,	(2<<4),	(6<<3)	},
-	{	 6615,	(2<<4),	(7<<3)	},
-	{	    0,	0,	0	}
-};
-#define CS4215_HPF	(1<<7)	/* High Pass Filter, 1: Enabled */
-
-#define CS4215_12_MASK	0xfcbf	/* Mask off reserved bits in slot 1 & 2 */
-
-/* Time Slot 3, Serial Port Control register */
-#define CS4215_XEN	(1<<0)	/* 0: Enable serial output */
-#define CS4215_XCLK	(1<<1)	/* 1: Master mode: Generate SCLK */
-#define CS4215_BSEL_64	(0<<2)	/* Bitrate: 64 bits per frame */
-#define CS4215_BSEL_128	(1<<2)
-#define CS4215_BSEL_256	(2<<2)
-#define CS4215_MCK_MAST (0<<4)	/* Master clock */
-#define CS4215_MCK_XTL1 (1<<4)	/* 24.576 MHz clock source */
-#define CS4215_MCK_XTL2 (2<<4)	/* 16.9344 MHz clock source */
-#define CS4215_MCK_CLK1 (3<<4)	/* Clockin, 256 x Fs */
-#define CS4215_MCK_CLK2 (4<<4)	/* Clockin, see DFR */
-
-/* Time Slot 4, Test Register */
-#define CS4215_DAD	(1<<0)	/* 0:Digital-Dig loop, 1:Dig-Analog-Dig loop */
-#define CS4215_ENL	(1<<1)	/* Enable Loopback Testing */
-
-/* Time Slot 5, Parallel Port Register */
-/* Read only here and the same as the in data mode */
-
-/* Time Slot 6, Reserved  */
-
-/* Time Slot 7, Version Register  */
-#define CS4215_VERSION_MASK 0xf	/* Known versions 0/C, 1/D, 2/E */
-
-/* Time Slot 8, Reserved  */
-
-
-
-/*
- * Data mode
- */
-/* Time Slot 1-2: Left Channel Data, 2-3: Right Channel Data  */
-
-/* Time Slot 5, Output Setting  */
-#define CS4215_LO(v)	v	/* Left Output Attenuation 0x3f: -94.5 dB */
-#define CS4215_LE	(1<<6)	/* Line Out Enable */
-#define CS4215_HE	(1<<7)	/* Headphone Enable */
-
-/* Time Slot 6, Output Setting  */
-#define CS4215_RO(v)	v	/* Right Output Attenuation 0x3f: -94.5 dB */
-#define CS4215_SE	(1<<6)	/* Speaker Enable */
-#define CS4215_ADI	(1<<7)	/* A/D Data Invalid: Busy in calibration */
-
-/* Time Slot 7, Input Setting */
-#define CS4215_LG(v)	v	/* Left Gain Setting 0xf: 22.5 dB */
-#define CS4215_IS	(1<<4)	/* Input Select: 1=Microphone, 0=Line */
-#define CS4215_OVR	(1<<5)	/* 1: Overrange condition occurred */
-#define CS4215_PIO0	(1<<6)	/* Parallel I/O 0 */
-#define CS4215_PIO1	(1<<7)
-
-/* Time Slot 8, Input Setting */
-#define CS4215_RG(v)	v	/* Right Gain Setting 0xf: 22.5 dB */
-#define CS4215_MA(v)	(v<<4)	/* Monitor Path Attenuation 0xf: mute */
-
-#endif /* _CS4215_H_ */

drivers/sbus/audio/dummy.h

-/* $Id: dummy.h,v 1.3 1999/09/21 14:37:41 davem Exp $
- * drivers/sbus/audio/dummy.h
- *
- * Copyright (C) 1998 Derrick J. Brashear (shadow@dementia.org)
- */
-
-#ifndef _DUMMY_H_
-#define _DUMMY_H_
-
-#include <linux/types.h>
-#include <linux/tqueue.h>
-
-#define DUMMY_OUTFILE "/usr/tmp/dummy.au"
-
-/* Our structure for each chip */
-
-struct dummy_chip {
-	struct audio_info perchip_info;
-	unsigned int playlen;
-	struct tq_struct tqueue;
-};
-
-#define DUMMY_MIN_ATEN     (0)
-#define DUMMY_MAX_ATEN     (31)
-#define DUMMY_MAX_DEV_ATEN (63)
-
-#define DUMMY_MON_MIN_ATEN         (0)
-#define DUMMY_MON_MAX_ATEN         (63)
-
-#define DUMMY_DEFAULT_PLAYGAIN     (132)
-#define DUMMY_DEFAULT_RECGAIN      (126)
-
-#define DUMMY_MIN_GAIN     (0)
-#define DUMMY_MAX_GAIN     (15)
-
-#define DUMMY_PRECISION    (8)             /* # of bits/sample */
-#define DUMMY_CHANNELS     (1)             /* channels/sample */
-
-#define DUMMY_RATE   (8000)                /* default sample rate */
-
-#endif /* _DUMMY_H_ */

include/asm-sparc/bitops.h

@@ -267,7 +267,7 @@ static __inline__ int ffs(int x)
 {
 	if (!x)
 		return 0;
-	return __ffs((unsigned long)x);
+	return __ffs((unsigned long)x) + 1;
 }
 
 /*

include/asm-sparc/irq.h

@@ -47,7 +47,7 @@ BTFIXUPDEF_CALL(void, load_profile_irq, int, unsigned int)
 #define clear_profile_irq(cpu) BTFIXUP_CALL(clear_profile_irq)(cpu)
 #define load_profile_irq(cpu,limit) BTFIXUP_CALL(load_profile_irq)(cpu,limit)
 
-extern void (*init_timers)(void (*lvl10_irq)(int, void *, struct pt_regs *));
+extern void (*sparc_init_timers)(void (*lvl10_irq)(int, void *, struct pt_regs *));
 extern void claim_ticker14(void (*irq_handler)(int, void *, struct pt_regs *),
 			   int irq,
 			   unsigned int timeout);

include/asm-sparc64/bitops.h

@@ -146,7 +146,7 @@ static __inline__ int ffs(int x)
 {
 	if (!x)
 		return 0;
-	return __ffs((unsigned long)x);
+	return __ffs((unsigned long)x) + 1;
 }
 
 /*

include/asm-sparc64/irq.h

@@ -116,8 +116,8 @@ static __inline__ char *__irq_itoa(unsigned int irq)
 extern void disable_irq(unsigned int);
 #define disable_irq_nosync disable_irq
 extern void enable_irq(unsigned int);
-extern void init_timers(void (*lvl10_irq)(int, void *, struct pt_regs *),
-			unsigned long *);
+extern void sparc64_init_timers(void (*lvl10_irq)(int, void *, struct pt_regs *),
+				unsigned long *);
 extern unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap);
 extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
 extern unsigned int psycho_build_irq(void *psycho, int imap_off, int ino, int need_dma_sync);

sound/Makefile

@@ -5,7 +5,7 @@ export-objs     := sound_core.o
 
 obj-$(CONFIG_SOUND) += soundcore.o
 obj-$(CONFIG_SOUND_PRIME) += oss/
-obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ synth/
+obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ synth/ sparc/
 
 ifeq ($(CONFIG_SND),y)
   obj-y += last.o