Commit 82c71226 authored by Chris Blake's avatar Chris Blake Committed by Greg Kroah-Hartman

PCI: Mark Atheros AR9485 and QCA9882 to avoid bus reset

commit 9ac0108c upstream.

Similar to the AR93xx series, the AR94xx and the Qualcomm QCA988x also have
the same quirk for the Bus Reset.

Fixes: c3e59ee4 ("PCI: Mark Atheros AR93xx to avoid bus reset")
Signed-off-by: default avatarChris Blake <chrisrblake93@gmail.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 2f8e3e96
...@@ -3189,13 +3189,15 @@ static void quirk_no_bus_reset(struct pci_dev *dev) ...@@ -3189,13 +3189,15 @@ static void quirk_no_bus_reset(struct pci_dev *dev)
} }
/* /*
* Atheros AR93xx chips do not behave after a bus reset. The device will * Some Atheros AR9xxx and QCA988x chips do not behave after a bus reset.
* throw a Link Down error on AER-capable systems and regardless of AER, * The device will throw a Link Down error on AER-capable systems and
* config space of the device is never accessible again and typically * regardless of AER, config space of the device is never accessible again
* causes the system to hang or reset when access is attempted. * and typically causes the system to hang or reset when access is attempted.
* http://www.spinics.net/lists/linux-pci/msg34797.html * http://www.spinics.net/lists/linux-pci/msg34797.html
*/ */
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset);
static void quirk_no_pm_reset(struct pci_dev *dev) static void quirk_no_pm_reset(struct pci_dev *dev)
{ {
......
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