Commit 831610c0 authored by Fu Wei's avatar Fu Wei Committed by Mark Rutland

clocksource: arm_arch_timer: move enums and defines to header file

To support the arm_arch_timer via ACPI we need to share defines and enums
between the driver and the ACPI parser code.
So we split out the relevant defines and enums into arm_arch_timer.h.

No functional change.
Signed-off-by: default avatarFu Wei <fu.wei@linaro.org>
Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Tested-by: default avatarXiongfeng Wang <wangxiongfeng2@huawei.com>
Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
parent ee34f1e6
...@@ -55,8 +55,6 @@ ...@@ -55,8 +55,6 @@
#define CNTV_TVAL 0x38 #define CNTV_TVAL 0x38
#define CNTV_CTL 0x3c #define CNTV_CTL 0x3c
#define ARCH_TIMER_TYPE_CP15 BIT(0)
#define ARCH_TIMER_TYPE_MEM BIT(1)
static unsigned arch_timers_present __initdata; static unsigned arch_timers_present __initdata;
static void __iomem *arch_counter_base; static void __iomem *arch_counter_base;
...@@ -69,15 +67,6 @@ struct arch_timer { ...@@ -69,15 +67,6 @@ struct arch_timer {
#define to_arch_timer(e) container_of(e, struct arch_timer, evt) #define to_arch_timer(e) container_of(e, struct arch_timer, evt)
static u32 arch_timer_rate; static u32 arch_timer_rate;
enum arch_timer_ppi_nr {
ARCH_TIMER_PHYS_SECURE_PPI,
ARCH_TIMER_PHYS_NONSECURE_PPI,
ARCH_TIMER_VIRT_PPI,
ARCH_TIMER_HYP_PPI,
ARCH_TIMER_MAX_TIMER_PPI
};
static int arch_timer_ppi[ARCH_TIMER_MAX_TIMER_PPI]; static int arch_timer_ppi[ARCH_TIMER_MAX_TIMER_PPI];
static struct clock_event_device __percpu *arch_timer_evt; static struct clock_event_device __percpu *arch_timer_evt;
......
...@@ -16,9 +16,13 @@ ...@@ -16,9 +16,13 @@
#ifndef __CLKSOURCE_ARM_ARCH_TIMER_H #ifndef __CLKSOURCE_ARM_ARCH_TIMER_H
#define __CLKSOURCE_ARM_ARCH_TIMER_H #define __CLKSOURCE_ARM_ARCH_TIMER_H
#include <linux/bitops.h>
#include <linux/timecounter.h> #include <linux/timecounter.h>
#include <linux/types.h> #include <linux/types.h>
#define ARCH_TIMER_TYPE_CP15 BIT(0)
#define ARCH_TIMER_TYPE_MEM BIT(1)
#define ARCH_TIMER_CTRL_ENABLE (1 << 0) #define ARCH_TIMER_CTRL_ENABLE (1 << 0)
#define ARCH_TIMER_CTRL_IT_MASK (1 << 1) #define ARCH_TIMER_CTRL_IT_MASK (1 << 1)
#define ARCH_TIMER_CTRL_IT_STAT (1 << 2) #define ARCH_TIMER_CTRL_IT_STAT (1 << 2)
...@@ -34,6 +38,14 @@ enum arch_timer_reg { ...@@ -34,6 +38,14 @@ enum arch_timer_reg {
ARCH_TIMER_REG_TVAL, ARCH_TIMER_REG_TVAL,
}; };
enum arch_timer_ppi_nr {
ARCH_TIMER_PHYS_SECURE_PPI,
ARCH_TIMER_PHYS_NONSECURE_PPI,
ARCH_TIMER_VIRT_PPI,
ARCH_TIMER_HYP_PPI,
ARCH_TIMER_MAX_TIMER_PPI
};
#define ARCH_TIMER_PHYS_ACCESS 0 #define ARCH_TIMER_PHYS_ACCESS 0
#define ARCH_TIMER_VIRT_ACCESS 1 #define ARCH_TIMER_VIRT_ACCESS 1
#define ARCH_TIMER_MEM_PHYS_ACCESS 2 #define ARCH_TIMER_MEM_PHYS_ACCESS 2
......
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