Commit 83909188 authored by Russell King's avatar Russell King

ARM: restart: remove s3c24xx restart handler

Remove the s3c24xx restart handler, which is trying to work around
a chip bug by keeping caches on but flushed.  As we now only disable
caches when performing a soft reboot, there doesn't need to be a
work-around to do that.
Acked-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 4045407f
......@@ -192,27 +192,6 @@ static unsigned long s3c24xx_read_idcode_v4(void)
return __raw_readl(S3C2410_GSTATUS1);
}
/* Hook for arm_pm_restart to ensure we execute the reset code
* with the caches enabled. It seems at least the S3C2440 has a problem
* resetting if there is bus activity interrupted by the reset.
*/
static void s3c24xx_pm_restart(char mode, const char *cmd)
{
if (mode != 's') {
unsigned long flags;
local_irq_save(flags);
__cpuc_flush_kern_all();
__cpuc_flush_user_all();
arch_reset(mode, cmd);
local_irq_restore(flags);
}
/* fallback, or unhandled */
arm_machine_restart(mode, cmd);
}
void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
{
/* initialise the io descriptors we need for initialisation */
......@@ -226,7 +205,5 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
}
s3c24xx_init_cpu();
arm_pm_restart = s3c24xx_pm_restart;
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
}
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