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Commit 849a4c37 authored by Dave Jiang's avatar Dave Jiang Committed by Linus Torvalds
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drivers/edac: Lindent e7xxx 

Lindent cleanup of e7xxx_edac driver
Signed-off-by: default avatarDave Jiang <djiang@mvista.com>
Signed-off-by: default avatarDouglas Thompson <dougthompson@xmission.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent f4aff426
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Showing with 59 additions and 73 deletions
drivers/edac/e7xxx_edac.c
View file @ 849a4c37
...@@ -146,21 +146,17 @@ struct e7xxx_error_info { ...@@ -146,21 +146,17 @@ struct e7xxx_error_info {
static const struct e7xxx_dev_info e7xxx_devs[] = { static const struct e7xxx_dev_info e7xxx_devs[] = {
[E7500] = { [E7500] = {
.err_dev = PCI_DEVICE_ID_INTEL_7500_1_ERR, .err_dev = PCI_DEVICE_ID_INTEL_7500_1_ERR,
.ctl_name = "E7500" .ctl_name = "E7500"},
},
[E7501] = { [E7501] = {
.err_dev = PCI_DEVICE_ID_INTEL_7501_1_ERR, .err_dev = PCI_DEVICE_ID_INTEL_7501_1_ERR,
.ctl_name = "E7501" .ctl_name = "E7501"},
},
[E7505] = { [E7505] = {
.err_dev = PCI_DEVICE_ID_INTEL_7505_1_ERR, .err_dev = PCI_DEVICE_ID_INTEL_7505_1_ERR,
.ctl_name = "E7505" .ctl_name = "E7505"},
},
[E7205] = { [E7205] = {
.err_dev = PCI_DEVICE_ID_INTEL_7205_1_ERR, .err_dev = PCI_DEVICE_ID_INTEL_7205_1_ERR,
.ctl_name = "E7205" .ctl_name = "E7205"},
},
}; };
/* FIXME - is this valid for both SECDED and S4ECD4ED? */ /* FIXME - is this valid for both SECDED and S4ECD4ED? */
...@@ -181,15 +177,15 @@ static inline int e7xxx_find_channel(u16 syndrome) ...@@ -181,15 +177,15 @@ static inline int e7xxx_find_channel(u16 syndrome)
} }
static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci, static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
unsigned long page) unsigned long page)
{ {
u32 remap; u32 remap;
struct e7xxx_pvt *pvt = (struct e7xxx_pvt *) mci->pvt_info; struct e7xxx_pvt *pvt = (struct e7xxx_pvt *)mci->pvt_info;
debugf3("%s()\n", __func__); debugf3("%s()\n", __func__);
if ((page < pvt->tolm) || if ((page < pvt->tolm) ||
((page >= 0x100000) && (page < pvt->remapbase))) ((page >= 0x100000) && (page < pvt->remapbase)))
return page; return page;
remap = (page - pvt->tolm) + pvt->remapbase; remap = (page - pvt->tolm) + pvt->remapbase;
...@@ -201,8 +197,7 @@ static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci, ...@@ -201,8 +197,7 @@ static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
return pvt->tolm - 1; return pvt->tolm - 1;
} }
static void process_ce(struct mem_ctl_info *mci, static void process_ce(struct mem_ctl_info *mci, struct e7xxx_error_info *info)
struct e7xxx_error_info *info)
{ {
u32 error_1b, page; u32 error_1b, page;
u16 syndrome; u16 syndrome;
...@@ -213,7 +208,7 @@ static void process_ce(struct mem_ctl_info *mci, ...@@ -213,7 +208,7 @@ static void process_ce(struct mem_ctl_info *mci,
/* read the error address */ /* read the error address */
error_1b = info->dram_celog_add; error_1b = info->dram_celog_add;
/* FIXME - should use PAGE_SHIFT */ /* FIXME - should use PAGE_SHIFT */
page = error_1b >> 6; /* convert the address to 4k page */ page = error_1b >> 6; /* convert the address to 4k page */
/* read the syndrome */ /* read the syndrome */
syndrome = info->dram_celog_syndrome; syndrome = info->dram_celog_syndrome;
/* FIXME - check for -1 */ /* FIXME - check for -1 */
...@@ -229,8 +224,7 @@ static void process_ce_no_info(struct mem_ctl_info *mci) ...@@ -229,8 +224,7 @@ static void process_ce_no_info(struct mem_ctl_info *mci)
edac_mc_handle_ce_no_info(mci, "e7xxx CE log register overflow"); edac_mc_handle_ce_no_info(mci, "e7xxx CE log register overflow");
} }
static void process_ue(struct mem_ctl_info *mci, static void process_ue(struct mem_ctl_info *mci, struct e7xxx_error_info *info)
struct e7xxx_error_info *info)
{ {
u32 error_2b, block_page; u32 error_2b, block_page;
int row; int row;
...@@ -239,7 +233,7 @@ static void process_ue(struct mem_ctl_info *mci, ...@@ -239,7 +233,7 @@ static void process_ue(struct mem_ctl_info *mci,
/* read the error address */ /* read the error address */
error_2b = info->dram_uelog_add; error_2b = info->dram_uelog_add;
/* FIXME - should use PAGE_SHIFT */ /* FIXME - should use PAGE_SHIFT */
block_page = error_2b >> 6; /* convert to 4k address */ block_page = error_2b >> 6; /* convert to 4k address */
row = edac_mc_find_csrow_by_page(mci, block_page); row = edac_mc_find_csrow_by_page(mci, block_page);
edac_mc_handle_ue(mci, block_page, 0, row, "e7xxx UE"); edac_mc_handle_ue(mci, block_page, 0, row, "e7xxx UE");
} }
...@@ -250,28 +244,26 @@ static void process_ue_no_info(struct mem_ctl_info *mci) ...@@ -250,28 +244,26 @@ static void process_ue_no_info(struct mem_ctl_info *mci)
edac_mc_handle_ue_no_info(mci, "e7xxx UE log register overflow"); edac_mc_handle_ue_no_info(mci, "e7xxx UE log register overflow");
} }
static void e7xxx_get_error_info (struct mem_ctl_info *mci, static void e7xxx_get_error_info(struct mem_ctl_info *mci,
struct e7xxx_error_info *info) struct e7xxx_error_info *info)
{ {
struct e7xxx_pvt *pvt; struct e7xxx_pvt *pvt;
pvt = (struct e7xxx_pvt *) mci->pvt_info; pvt = (struct e7xxx_pvt *)mci->pvt_info;
pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_FERR, pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_FERR, &info->dram_ferr);
&info->dram_ferr); pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_NERR, &info->dram_nerr);
pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_NERR,
&info->dram_nerr);
if ((info->dram_ferr & 1) || (info->dram_nerr & 1)) { if ((info->dram_ferr & 1) || (info->dram_nerr & 1)) {
pci_read_config_dword(pvt->bridge_ck, E7XXX_DRAM_CELOG_ADD, pci_read_config_dword(pvt->bridge_ck, E7XXX_DRAM_CELOG_ADD,
&info->dram_celog_add); &info->dram_celog_add);
pci_read_config_word(pvt->bridge_ck, pci_read_config_word(pvt->bridge_ck,
E7XXX_DRAM_CELOG_SYNDROME, E7XXX_DRAM_CELOG_SYNDROME,
&info->dram_celog_syndrome); &info->dram_celog_syndrome);
} }
if ((info->dram_ferr & 2) || (info->dram_nerr & 2)) if ((info->dram_ferr & 2) || (info->dram_nerr & 2))
pci_read_config_dword(pvt->bridge_ck, E7XXX_DRAM_UELOG_ADD, pci_read_config_dword(pvt->bridge_ck, E7XXX_DRAM_UELOG_ADD,
&info->dram_uelog_add); &info->dram_uelog_add);
if (info->dram_ferr & 3) if (info->dram_ferr & 3)
pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_FERR, 0x03, 0x03); pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_FERR, 0x03, 0x03);
...@@ -280,8 +272,9 @@ static void e7xxx_get_error_info (struct mem_ctl_info *mci, ...@@ -280,8 +272,9 @@ static void e7xxx_get_error_info (struct mem_ctl_info *mci,
pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_NERR, 0x03, 0x03); pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_NERR, 0x03, 0x03);
} }
static int e7xxx_process_error_info (struct mem_ctl_info *mci, static int e7xxx_process_error_info(struct mem_ctl_info *mci,
struct e7xxx_error_info *info, int handle_errors) struct e7xxx_error_info *info,
int handle_errors)
{ {
int error_found; int error_found;
...@@ -342,7 +335,6 @@ static inline int dual_channel_active(u32 drc, int dev_idx) ...@@ -342,7 +335,6 @@ static inline int dual_channel_active(u32 drc, int dev_idx)
return (dev_idx == E7501) ? ((drc >> 22) & 0x1) : 1; return (dev_idx == E7501) ? ((drc >> 22) & 0x1) : 1;
} }
/* Return DRB granularity (0=32mb, 1=64mb). */ /* Return DRB granularity (0=32mb, 1=64mb). */
static inline int drb_granularity(u32 drc, int dev_idx) static inline int drb_granularity(u32 drc, int dev_idx)
{ {
...@@ -350,9 +342,8 @@ static inline int drb_granularity(u32 drc, int dev_idx) ...@@ -350,9 +342,8 @@ static inline int drb_granularity(u32 drc, int dev_idx)
return (dev_idx == E7501) ? ((drc >> 18) & 0x3) : 1; return (dev_idx == E7501) ? ((drc >> 18) & 0x3) : 1;
} }
static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
int dev_idx, u32 drc) int dev_idx, u32 drc)
{ {
unsigned long last_cumul_size; unsigned long last_cumul_size;
int index; int index;
...@@ -422,13 +413,13 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) ...@@ -422,13 +413,13 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
debugf0("%s(): mci\n", __func__); debugf0("%s(): mci\n", __func__);
/* make sure error reporting method is sane */ /* make sure error reporting method is sane */
switch(edac_op_state) { switch (edac_op_state) {
case EDAC_OPSTATE_POLL: case EDAC_OPSTATE_POLL:
case EDAC_OPSTATE_NMI: case EDAC_OPSTATE_NMI:
break; break;
default: default:
edac_op_state = EDAC_OPSTATE_POLL; edac_op_state = EDAC_OPSTATE_POLL;
break; break;
} }
pci_read_config_dword(pdev, E7XXX_DRC, &drc); pci_read_config_dword(pdev, E7XXX_DRC, &drc);
...@@ -442,22 +433,21 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) ...@@ -442,22 +433,21 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
debugf3("%s(): init mci\n", __func__); debugf3("%s(): init mci\n", __func__);
mci->mtype_cap = MEM_FLAG_RDDR; mci->mtype_cap = MEM_FLAG_RDDR;
mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED | mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
EDAC_FLAG_S4ECD4ED; EDAC_FLAG_S4ECD4ED;
/* FIXME - what if different memory types are in different csrows? */ /* FIXME - what if different memory types are in different csrows? */
mci->mod_name = EDAC_MOD_STR; mci->mod_name = EDAC_MOD_STR;
mci->mod_ver = E7XXX_REVISION; mci->mod_ver = E7XXX_REVISION;
mci->dev = &pdev->dev; mci->dev = &pdev->dev;
debugf3("%s(): init pvt\n", __func__); debugf3("%s(): init pvt\n", __func__);
pvt = (struct e7xxx_pvt *) mci->pvt_info; pvt = (struct e7xxx_pvt *)mci->pvt_info;
pvt->dev_info = &e7xxx_devs[dev_idx]; pvt->dev_info = &e7xxx_devs[dev_idx];
pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL, pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
pvt->dev_info->err_dev, pvt->dev_info->err_dev, pvt->bridge_ck);
pvt->bridge_ck);
if (!pvt->bridge_ck) { if (!pvt->bridge_ck) {
e7xxx_printk(KERN_ERR, "error reporting device not found:" e7xxx_printk(KERN_ERR, "error reporting device not found:"
"vendor %x device 0x%x (broken BIOS?)\n", "vendor %x device 0x%x (broken BIOS?)\n",
PCI_VENDOR_ID_INTEL, e7xxx_devs[dev_idx].err_dev); PCI_VENDOR_ID_INTEL, e7xxx_devs[dev_idx].err_dev);
goto fail0; goto fail0;
} }
...@@ -477,8 +467,8 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) ...@@ -477,8 +467,8 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
pci_read_config_word(pdev, E7XXX_REMAPLIMIT, &pci_data); pci_read_config_word(pdev, E7XXX_REMAPLIMIT, &pci_data);
pvt->remaplimit = ((u32) pci_data) << 14; pvt->remaplimit = ((u32) pci_data) << 14;
e7xxx_printk(KERN_INFO, e7xxx_printk(KERN_INFO,
"tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm, "tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm,
pvt->remapbase, pvt->remaplimit); pvt->remapbase, pvt->remaplimit);
/* clear any pending errors, or initial state bits */ /* clear any pending errors, or initial state bits */
e7xxx_get_error_info(mci, &discard); e7xxx_get_error_info(mci, &discard);
...@@ -486,7 +476,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) ...@@ -486,7 +476,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
/* Here we assume that we will never see multiple instances of this /* Here we assume that we will never see multiple instances of this
* type of memory controller. The ID is therefore hardcoded to 0. * type of memory controller. The ID is therefore hardcoded to 0.
*/ */
if (edac_mc_add_mc(mci,0)) { if (edac_mc_add_mc(mci, 0)) {
debugf3("%s(): failed edac_mc_add_mc()\n", __func__); debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
goto fail1; goto fail1;
} }
...@@ -495,10 +485,10 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) ...@@ -495,10 +485,10 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
debugf3("%s(): success\n", __func__); debugf3("%s(): success\n", __func__);
return 0; return 0;
fail1: fail1:
pci_dev_put(pvt->bridge_ck); pci_dev_put(pvt->bridge_ck);
fail0: fail0:
edac_mc_free(mci); edac_mc_free(mci);
return -ENODEV; return -ENODEV;
...@@ -506,13 +496,13 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) ...@@ -506,13 +496,13 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
/* returns count (>= 0), or negative on error */ /* returns count (>= 0), or negative on error */
static int __devinit e7xxx_init_one(struct pci_dev *pdev, static int __devinit e7xxx_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent) const struct pci_device_id *ent)
{ {
debugf0("%s()\n", __func__); debugf0("%s()\n", __func__);
/* wake up and enable device */ /* wake up and enable device */
return pci_enable_device(pdev) ? return pci_enable_device(pdev) ?
-EIO : e7xxx_probe1(pdev, ent->driver_data); -EIO : e7xxx_probe1(pdev, ent->driver_data);
} }
static void __devexit e7xxx_remove_one(struct pci_dev *pdev) static void __devexit e7xxx_remove_one(struct pci_dev *pdev)
...@@ -525,31 +515,27 @@ static void __devexit e7xxx_remove_one(struct pci_dev *pdev) ...@@ -525,31 +515,27 @@ static void __devexit e7xxx_remove_one(struct pci_dev *pdev)
if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL) if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return; return;
pvt = (struct e7xxx_pvt *) mci->pvt_info; pvt = (struct e7xxx_pvt *)mci->pvt_info;
pci_dev_put(pvt->bridge_ck); pci_dev_put(pvt->bridge_ck);
edac_mc_free(mci); edac_mc_free(mci);
} }
static const struct pci_device_id e7xxx_pci_tbl[] __devinitdata = { static const struct pci_device_id e7xxx_pci_tbl[] __devinitdata = {
{ {
PCI_VEND_DEV(INTEL, 7205_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, PCI_VEND_DEV(INTEL, 7205_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
E7205 E7205},
},
{ {
PCI_VEND_DEV(INTEL, 7500_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, PCI_VEND_DEV(INTEL, 7500_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
E7500 E7500},
},
{ {
PCI_VEND_DEV(INTEL, 7501_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, PCI_VEND_DEV(INTEL, 7501_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
E7501 E7501},
},
{ {
PCI_VEND_DEV(INTEL, 7505_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, PCI_VEND_DEV(INTEL, 7505_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
E7505 E7505},
},
{ {
0, 0,
} /* 0 terminated list. */ } /* 0 terminated list. */
}; };
MODULE_DEVICE_TABLE(pci, e7xxx_pci_tbl); MODULE_DEVICE_TABLE(pci, e7xxx_pci_tbl);
...@@ -576,7 +562,7 @@ module_exit(e7xxx_exit); ...@@ -576,7 +562,7 @@ module_exit(e7xxx_exit);
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n" MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
"Based on.work by Dan Hollis et al"); "Based on.work by Dan Hollis et al");
MODULE_DESCRIPTION("MC support for Intel e7xxx memory controllers"); MODULE_DESCRIPTION("MC support for Intel e7xxx memory controllers");
module_param(edac_op_state, int, 0444); module_param(edac_op_state, int, 0444);
MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI"); MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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