Commit 85da1fb5 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (53 commits)
  serial: Add driver for the Cell Network Processor serial port NWP device
  powerpc: enable dynamic ftrace
  powerpc/cell: Fix the prototype of create_vma_map()
  powerpc/mm: Make clear_fixmap() actually work
  powerpc/kdump: Use ppc_save_regs() in crash_setup_regs()
  powerpc: Export cacheable_memzero as its now used in a driver
  powerpc: Fix missing semicolons in mmu_decl.h
  powerpc/pasemi: local_irq_save uses an unsigned long
  powerpc/cell: Fix some u64 vs. long types
  powerpc/cell: Use correct types in beat files
  powerpc: Use correct type in prom_init.c
  powerpc: Remove unnecessary casts
  mtd/ps3vram: Use _PAGE_NO_CACHE in memory ioremap
  mtd/ps3vram: Use msleep in waits
  mtd/ps3vram: Use proper kernel types
  mtd/ps3vram: Cleanup ps3vram driver messages
  mtd/ps3vram: Remove ps3vram debug routines
  mtd/ps3vram: Add modalias support to the ps3vram driver
  mtd/ps3vram: Add ps3vram driver for accessing video RAM as MTD
  powerpc: Fix iseries drivers build failure without CONFIG_VIOPATH
  ...
parents 73ac36ea 5886188d
...@@ -18,7 +18,7 @@ This is the memory-mapped registers for on board FPGA. ...@@ -18,7 +18,7 @@ This is the memory-mapped registers for on board FPGA.
Required properities: Required properities:
- compatible : should be "fsl,fpga-pixis". - compatible : should be "fsl,fpga-pixis".
- reg : should contain the address and the lenght of the FPPGA register - reg : should contain the address and the length of the FPPGA register
set. set.
Example (MPC8610HPCD): Example (MPC8610HPCD):
...@@ -27,3 +27,33 @@ Example (MPC8610HPCD): ...@@ -27,3 +27,33 @@ Example (MPC8610HPCD):
compatible = "fsl,fpga-pixis"; compatible = "fsl,fpga-pixis";
reg = <0xe8000000 32>; reg = <0xe8000000 32>;
}; };
* Freescale BCSR GPIO banks
Some BCSR registers act as simple GPIO controllers, each such
register can be represented by the gpio-controller node.
Required properities:
- compatible : Should be "fsl,<board>-bcsr-gpio".
- reg : Should contain the address and the length of the GPIO bank
register.
- #gpio-cells : Should be two. The first cell is the pin number and the
second cell is used to specify optional paramters (currently unused).
- gpio-controller : Marks the port as GPIO controller.
Example:
bcsr@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8360mds-bcsr";
reg = <1 0 0x8000>;
ranges = <0 1 0 0x8000>;
bcsr13: gpio-controller@d {
#gpio-cells = <2>;
compatible = "fsl,mpc8360mds-bcsr-gpio";
reg = <0xd 1>;
gpio-controller;
};
};
...@@ -3489,6 +3489,12 @@ L: linuxppc-dev@ozlabs.org ...@@ -3489,6 +3489,12 @@ L: linuxppc-dev@ozlabs.org
L: cbe-oss-dev@ozlabs.org L: cbe-oss-dev@ozlabs.org
S: Supported S: Supported
PS3VRAM DRIVER
P: Jim Paris
M: jim@jtan.com
L: cbe-oss-dev@ozlabs.org
S: Maintained
PVRUSB2 VIDEO4LINUX DRIVER PVRUSB2 VIDEO4LINUX DRIVER
P: Mike Isely P: Mike Isely
M: isely@pobox.com M: isely@pobox.com
......
...@@ -108,6 +108,8 @@ config ARCH_NO_VIRT_TO_BUS ...@@ -108,6 +108,8 @@ config ARCH_NO_VIRT_TO_BUS
config PPC config PPC
bool bool
default y default y
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_DYNAMIC_FTRACE
select HAVE_FUNCTION_TRACER select HAVE_FUNCTION_TRACER
select ARCH_WANT_OPTIONAL_GPIOLIB select ARCH_WANT_OPTIONAL_GPIOLIB
select HAVE_IDE select HAVE_IDE
...@@ -326,7 +328,8 @@ config KEXEC ...@@ -326,7 +328,8 @@ config KEXEC
config CRASH_DUMP config CRASH_DUMP
bool "Build a kdump crash kernel" bool "Build a kdump crash kernel"
depends on (PPC64 && RELOCATABLE) || 6xx depends on PPC64 || 6xx
select RELOCATABLE if PPC64
help help
Build a kernel suitable for use as a kdump capture kernel. Build a kernel suitable for use as a kdump capture kernel.
The same kernel binary can be used as production kernel and dump The same kernel binary can be used as production kernel and dump
......
...@@ -356,7 +356,7 @@ $(obj)/zImage.initrd: $(addprefix $(obj)/, $(initrd-y)) ...@@ -356,7 +356,7 @@ $(obj)/zImage.initrd: $(addprefix $(obj)/, $(initrd-y))
@rm -f $@; ln $< $@ @rm -f $@; ln $< $@
install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y)) install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
sh -x $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" vmlinux System.map "$(INSTALL_PATH)" $< sh -x $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" vmlinux System.map "$(INSTALL_PATH)" $^
# anything not in $(targets) # anything not in $(targets)
clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \ clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \
......
...@@ -69,8 +69,18 @@ flash@0,0 { ...@@ -69,8 +69,18 @@ flash@0,0 {
}; };
bcsr@1,0 { bcsr@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8360mds-bcsr"; compatible = "fsl,mpc8360mds-bcsr";
reg = <1 0 0x8000>; reg = <1 0 0x8000>;
ranges = <0 1 0 0x8000>;
bcsr13: gpio-controller@d {
#gpio-cells = <2>;
compatible = "fsl,mpc8360mds-bcsr-gpio";
reg = <0xd 1>;
gpio-controller;
};
}; };
}; };
...@@ -195,10 +205,21 @@ ipic: pic@700 { ...@@ -195,10 +205,21 @@ ipic: pic@700 {
}; };
par_io@1400 { par_io@1400 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x1400 0x100>; reg = <0x1400 0x100>;
ranges = <0 0x1400 0x100>;
device_type = "par_io"; device_type = "par_io";
num-ports = <7>; num-ports = <7>;
qe_pio_b: gpio-controller@18 {
#gpio-cells = <2>;
compatible = "fsl,mpc8360-qe-pario-bank",
"fsl,mpc8323-qe-pario-bank";
reg = <0x18 0x18>;
gpio-controller;
};
pio1: ucc_pin@01 { pio1: ucc_pin@01 {
pio-map = < pio-map = <
/* port pin dir open_drain assignment has_irq */ /* port pin dir open_drain assignment has_irq */
...@@ -282,6 +303,15 @@ data-only@0 { ...@@ -282,6 +303,15 @@ data-only@0 {
}; };
}; };
timer@440 {
compatible = "fsl,mpc8360-qe-gtm",
"fsl,qe-gtm", "fsl,gtm";
reg = <0x440 0x40>;
clock-frequency = <132000000>;
interrupts = <12 13 14 15>;
interrupt-parent = <&qeic>;
};
spi@4c0 { spi@4c0 {
cell-index = <0>; cell-index = <0>;
compatible = "fsl,spi"; compatible = "fsl,spi";
...@@ -301,11 +331,20 @@ spi@500 { ...@@ -301,11 +331,20 @@ spi@500 {
}; };
usb@6c0 { usb@6c0 {
compatible = "qe_udc"; compatible = "fsl,mpc8360-qe-usb",
"fsl,mpc8323-qe-usb";
reg = <0x6c0 0x40 0x8b00 0x100>; reg = <0x6c0 0x40 0x8b00 0x100>;
interrupts = <11>; interrupts = <11>;
interrupt-parent = <&qeic>; interrupt-parent = <&qeic>;
mode = "slave"; fsl,fullspeed-clock = "clk21";
fsl,lowspeed-clock = "brg9";
gpios = <&qe_pio_b 2 0 /* USBOE */
&qe_pio_b 3 0 /* USBTP */
&qe_pio_b 8 0 /* USBTN */
&qe_pio_b 9 0 /* USBRP */
&qe_pio_b 11 0 /* USBRN */
&bcsr13 5 0 /* SPEED */
&bcsr13 4 1>; /* POWER */
}; };
enet0: ucc@2000 { enet0: ucc@2000 {
......
...@@ -218,8 +218,23 @@ timer@440 { ...@@ -218,8 +218,23 @@ timer@440 {
reg = <0x440 0x40>; reg = <0x440 0x40>;
interrupts = <12 13 14 15>; interrupts = <12 13 14 15>;
interrupt-parent = <&qeic>; interrupt-parent = <&qeic>;
/* filled by u-boot */ clock-frequency = <166666666>;
clock-frequency = <0>; };
usb@6c0 {
compatible = "fsl,mpc8360-qe-usb",
"fsl,mpc8323-qe-usb";
reg = <0x6c0 0x40 0x8b00 0x100>;
interrupts = <11>;
interrupt-parent = <&qeic>;
fsl,fullspeed-clock = "clk21";
gpios = <&qe_pio_b 2 0 /* USBOE */
&qe_pio_b 3 0 /* USBTP */
&qe_pio_b 8 0 /* USBTN */
&qe_pio_b 9 0 /* USBRP */
&qe_pio_b 11 0 /* USBRN */
&qe_pio_e 20 0 /* SPEED */
&qe_pio_e 21 1 /* POWER */>;
}; };
spi@4c0 { spi@4c0 {
......
...@@ -26,7 +26,13 @@ aliases { ...@@ -26,7 +26,13 @@ aliases {
serial1 = &serial1; serial1 = &serial1;
pci0 = &pci0; pci0 = &pci0;
pci1 = &pci1; pci1 = &pci1;
rapidio0 = &rapidio0; /*
* Only one of Rapid IO or PCI can be present due to HW limitations and
* due to the fact that the 2 now share address space in the new memory
* map. The most likely case is that we have PCI, so comment out the
* rapidio node. Leave it here for reference.
*/
/* rapidio0 = &rapidio0; */
}; };
cpus { cpus {
...@@ -62,18 +68,17 @@ memory { ...@@ -62,18 +68,17 @@ memory {
reg = <0x00000000 0x40000000>; // 1G at 0x0 reg = <0x00000000 0x40000000>; // 1G at 0x0
}; };
localbus@f8005000 { localbus@ffe05000 {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <1>; #size-cells = <1>;
compatible = "fsl,mpc8641-localbus", "simple-bus"; compatible = "fsl,mpc8641-localbus", "simple-bus";
reg = <0xf8005000 0x1000>; reg = <0xffe05000 0x1000>;
interrupts = <19 2>; interrupts = <19 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
ranges = <0 0 0xff800000 0x00800000 ranges = <0 0 0xef800000 0x00800000
1 0 0xfe000000 0x01000000 2 0 0xffdf8000 0x00008000
2 0 0xf8200000 0x00100000 3 0 0xffdf0000 0x00008000>;
3 0 0xf8100000 0x00100000>;
flash@0,0 { flash@0,0 {
compatible = "cfi-flash"; compatible = "cfi-flash";
...@@ -103,13 +108,13 @@ partition@700000 { ...@@ -103,13 +108,13 @@ partition@700000 {
}; };
}; };
soc8641@f8000000 { soc8641@ffe00000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
device_type = "soc"; device_type = "soc";
compatible = "simple-bus"; compatible = "simple-bus";
ranges = <0x00000000 0xf8000000 0x00100000>; ranges = <0x00000000 0xffe00000 0x00100000>;
reg = <0xf8000000 0x00001000>; // CCSRBAR reg = <0xffe00000 0x00001000>; // CCSRBAR
bus-frequency = <0>; bus-frequency = <0>;
i2c@3000 { i2c@3000 {
...@@ -340,17 +345,17 @@ global-utilities@e0000 { ...@@ -340,17 +345,17 @@ global-utilities@e0000 {
}; };
}; };
pci0: pcie@f8008000 { pci0: pcie@ffe08000 {
cell-index = <0>; cell-index = <0>;
compatible = "fsl,mpc8641-pcie"; compatible = "fsl,mpc8641-pcie";
device_type = "pci"; device_type = "pci";
#interrupt-cells = <1>; #interrupt-cells = <1>;
#size-cells = <2>; #size-cells = <2>;
#address-cells = <3>; #address-cells = <3>;
reg = <0xf8008000 0x1000>; reg = <0xffe08000 0x1000>;
bus-range = <0x0 0xff>; bus-range = <0x0 0xff>;
ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <24 2>; interrupts = <24 2>;
...@@ -481,7 +486,7 @@ pcie@0 { ...@@ -481,7 +486,7 @@ pcie@0 {
0x01000000 0x0 0x00000000 0x01000000 0x0 0x00000000
0x01000000 0x0 0x00000000 0x01000000 0x0 0x00000000
0x0 0x00100000>; 0x0 0x00010000>;
uli1575@0 { uli1575@0 {
reg = <0 0 0 0 0>; reg = <0 0 0 0 0>;
#size-cells = <2>; #size-cells = <2>;
...@@ -491,7 +496,7 @@ uli1575@0 { ...@@ -491,7 +496,7 @@ uli1575@0 {
0x0 0x20000000 0x0 0x20000000
0x01000000 0x0 0x00000000 0x01000000 0x0 0x00000000
0x01000000 0x0 0x00000000 0x01000000 0x0 0x00000000
0x0 0x00100000>; 0x0 0x00010000>;
isa@1e { isa@1e {
device_type = "isa"; device_type = "isa";
#interrupt-cells = <2>; #interrupt-cells = <2>;
...@@ -549,17 +554,17 @@ gpio@400 { ...@@ -549,17 +554,17 @@ gpio@400 {
}; };
pci1: pcie@f8009000 { pci1: pcie@ffe09000 {
cell-index = <1>; cell-index = <1>;
compatible = "fsl,mpc8641-pcie"; compatible = "fsl,mpc8641-pcie";
device_type = "pci"; device_type = "pci";
#interrupt-cells = <1>; #interrupt-cells = <1>;
#size-cells = <2>; #size-cells = <2>;
#address-cells = <3>; #address-cells = <3>;
reg = <0xf8009000 0x1000>; reg = <0xffe09000 0x1000>;
bus-range = <0 0xff>; bus-range = <0 0xff>;
ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>; 0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
interrupts = <25 2>; interrupts = <25 2>;
...@@ -582,18 +587,21 @@ pcie@0 { ...@@ -582,18 +587,21 @@ pcie@0 {
0x01000000 0x0 0x00000000 0x01000000 0x0 0x00000000
0x01000000 0x0 0x00000000 0x01000000 0x0 0x00000000
0x0 0x00100000>; 0x0 0x00010000>;
}; };
}; };
rapidio0: rapidio@f80c0000 { /*
rapidio0: rapidio@ffec0000 {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
compatible = "fsl,rapidio-delta"; compatible = "fsl,rapidio-delta";
reg = <0xf80c0000 0x20000>; reg = <0xffec0000 0x20000>;
ranges = <0 0 0xc0000000 0 0x20000000>; ranges = <0 0 0x80000000 0 0x20000000>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
/* err_irq bell_outb_irq bell_inb_irq // err_irq bell_outb_irq bell_inb_irq
msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq */ // msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq
interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>; interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
}; };
*/
}; };
...@@ -15,7 +15,7 @@ ...@@ -15,7 +15,7 @@
# $2 - kernel image file # $2 - kernel image file
# $3 - kernel map file # $3 - kernel map file
# $4 - default install path (blank if root directory) # $4 - default install path (blank if root directory)
# $5 - kernel boot file, the zImage # $5 and more - kernel boot files; zImage*, uImage, cuImage.*, etc.
# #
# User may have a custom install script # User may have a custom install script
...@@ -38,3 +38,15 @@ fi ...@@ -38,3 +38,15 @@ fi
cat $2 > $4/$image_name cat $2 > $4/$image_name
cp $3 $4/System.map cp $3 $4/System.map
# Copy all the bootable image files
path=$4
shift 4
while [ $# -ne 0 ]; do
image_name=`basename $1`
if [ -f $path/$image_name ]; then
mv $path/$image_name $path/$image_name.old
fi
cat $1 > $path/$image_name
shift
done;
# #
# Automatically generated make config: don't edit # Automatically generated make config: don't edit
# Linux kernel version: 2.6.28-rc3 # Linux kernel version: 2.6.28-rc8
# Sat Nov 8 12:40:13 2008 # Tue Dec 30 11:17:46 2008
# #
# CONFIG_PPC64 is not set # CONFIG_PPC64 is not set
...@@ -21,7 +21,10 @@ CONFIG_FSL_BOOKE=y ...@@ -21,7 +21,10 @@ CONFIG_FSL_BOOKE=y
CONFIG_FSL_EMB_PERFMON=y CONFIG_FSL_EMB_PERFMON=y
# CONFIG_PHYS_64BIT is not set # CONFIG_PHYS_64BIT is not set
CONFIG_SPE=y CONFIG_SPE=y
CONFIG_PPC_MMU_NOHASH=y
# CONFIG_PPC_MM_SLICES is not set # CONFIG_PPC_MM_SLICES is not set
CONFIG_SMP=y
CONFIG_NR_CPUS=2
CONFIG_PPC32=y CONFIG_PPC32=y
CONFIG_WORD_SIZE=32 CONFIG_WORD_SIZE=32
# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
...@@ -50,7 +53,7 @@ CONFIG_ARCH_MAY_HAVE_PC_FDC=y ...@@ -50,7 +53,7 @@ CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_PPC_OF=y CONFIG_PPC_OF=y
CONFIG_OF=y CONFIG_OF=y
CONFIG_PPC_UDBG_16550=y CONFIG_PPC_UDBG_16550=y
# CONFIG_GENERIC_TBSYNC is not set CONFIG_GENERIC_TBSYNC=y
CONFIG_AUDIT_ARCH=y CONFIG_AUDIT_ARCH=y
CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG=y
CONFIG_DEFAULT_UIMAGE=y CONFIG_DEFAULT_UIMAGE=y
...@@ -62,7 +65,7 @@ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ...@@ -62,7 +65,7 @@ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
# General setup # General setup
# #
CONFIG_EXPERIMENTAL=y CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y CONFIG_LOCALVERSION_AUTO=y
...@@ -126,6 +129,7 @@ CONFIG_HAVE_IOREMAP_PROT=y ...@@ -126,6 +129,7 @@ CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_USE_GENERIC_SMP_HELPERS=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_SLABINFO=y CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y CONFIG_RT_MUTEXES=y
...@@ -138,6 +142,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y ...@@ -138,6 +142,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y CONFIG_MODVERSIONS=y
# CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y CONFIG_KMOD=y
CONFIG_STOP_MACHINE=y
CONFIG_BLOCK=y CONFIG_BLOCK=y
CONFIG_LBD=y CONFIG_LBD=y
# CONFIG_BLK_DEV_IO_TRACE is not set # CONFIG_BLK_DEV_IO_TRACE is not set
...@@ -197,6 +202,7 @@ CONFIG_PPC_I8259=y ...@@ -197,6 +202,7 @@ CONFIG_PPC_I8259=y
# CONFIG_CPM2 is not set # CONFIG_CPM2 is not set
CONFIG_FSL_ULI1575=y CONFIG_FSL_ULI1575=y
# CONFIG_MPC8xxx_GPIO is not set # CONFIG_MPC8xxx_GPIO is not set
# CONFIG_SIMPLE_GPIO is not set
# #
# Kernel options # Kernel options
...@@ -224,6 +230,7 @@ CONFIG_MATH_EMULATION=y ...@@ -224,6 +230,7 @@ CONFIG_MATH_EMULATION=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_HAS_WALK_MEMORY=y CONFIG_ARCH_HAS_WALK_MEMORY=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
# CONFIG_IRQ_ALL_CPUS is not set
CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_SELECT_MEMORY_MODEL=y CONFIG_SELECT_MEMORY_MODEL=y
...@@ -241,6 +248,9 @@ CONFIG_ZONE_DMA_FLAG=1 ...@@ -241,6 +248,9 @@ CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y CONFIG_VIRT_TO_BUS=y
CONFIG_UNEVICTABLE_LRU=y CONFIG_UNEVICTABLE_LRU=y
CONFIG_PPC_4K_PAGES=y
# CONFIG_PPC_16K_PAGES is not set
# CONFIG_PPC_64K_PAGES is not set
CONFIG_FORCE_MAX_ZONEORDER=11 CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_PROC_DEVICETREE=y CONFIG_PROC_DEVICETREE=y
# CONFIG_CMDLINE_BOOL is not set # CONFIG_CMDLINE_BOOL is not set
...@@ -443,8 +453,10 @@ CONFIG_MISC_DEVICES=y ...@@ -443,8 +453,10 @@ CONFIG_MISC_DEVICES=y
# CONFIG_EEPROM_93CX6 is not set # CONFIG_EEPROM_93CX6 is not set
# CONFIG_SGI_IOC4 is not set # CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set # CONFIG_TIFM_CORE is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_HP_ILO is not set # CONFIG_HP_ILO is not set
# CONFIG_C2PORT is not set
CONFIG_HAVE_IDE=y CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set # CONFIG_IDE is not set
...@@ -784,6 +796,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y ...@@ -784,6 +796,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256 CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_HVC_UDBG is not set
# CONFIG_IPMI_HANDLER is not set # CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM=y
CONFIG_NVRAM=y CONFIG_NVRAM=y
...@@ -869,11 +882,11 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y ...@@ -869,11 +882,11 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
# CONFIG_THERMAL is not set # CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set # CONFIG_THERMAL_HWMON is not set
# CONFIG_WATCHDOG is not set # CONFIG_WATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
# #
# Sonics Silicon Backplane # Sonics Silicon Backplane
# #
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set # CONFIG_SSB is not set
# #
...@@ -886,14 +899,7 @@ CONFIG_SSB_POSSIBLE=y ...@@ -886,14 +899,7 @@ CONFIG_SSB_POSSIBLE=y
# CONFIG_PMIC_DA903X is not set # CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8350_I2C is not set
#
# Voltage and Current regulators
#
# CONFIG_REGULATOR is not set # CONFIG_REGULATOR is not set
# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
# CONFIG_REGULATOR_BQ24022 is not set
# #
# Multimedia devices # Multimedia devices
...@@ -1252,11 +1258,11 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y ...@@ -1252,11 +1258,11 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
# CONFIG_USB_TMC is not set # CONFIG_USB_TMC is not set
# #
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
# #
# #
# may also be needed; see USB_STORAGE Help for more information # see USB_STORAGE Help for more information
# #
CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE=y
# CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_DEBUG is not set
...@@ -1348,6 +1354,7 @@ CONFIG_RTC_INTF_DEV=y ...@@ -1348,6 +1354,7 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_M41T80 is not set # CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# #
# SPI RTC drivers # SPI RTC drivers
...@@ -1624,6 +1631,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y ...@@ -1624,6 +1631,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y
# CONFIG_SAMPLES is not set # CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set # CONFIG_KGDB is not set
CONFIG_PRINT_STACK_DEPTH=64
# CONFIG_DEBUG_STACKOVERFLOW is not set # CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_PAGEALLOC is not set # CONFIG_DEBUG_PAGEALLOC is not set
...@@ -1649,11 +1657,16 @@ CONFIG_CRYPTO=y ...@@ -1649,11 +1657,16 @@ CONFIG_CRYPTO=y
# #
# CONFIG_CRYPTO_FIPS is not set # CONFIG_CRYPTO_FIPS is not set
CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_GF128MUL is not set # CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_NULL is not set # CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_CRYPTD is not set # CONFIG_CRYPTO_CRYPTD is not set
......
...@@ -89,6 +89,8 @@ ...@@ -89,6 +89,8 @@
#define TIOCSBRK 0x5427 /* BSD compatibility */ #define TIOCSBRK 0x5427 /* BSD compatibility */
#define TIOCCBRK 0x5428 /* BSD compatibility */ #define TIOCCBRK 0x5428 /* BSD compatibility */
#define TIOCGSID 0x5429 /* Return the session ID of FD */ #define TIOCGSID 0x5429 /* Return the session ID of FD */
#define TIOCGRS485 0x542e
#define TIOCSRS485 0x542f
#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ #define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ #define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
......
...@@ -48,63 +48,8 @@ static inline void crash_setup_regs(struct pt_regs *newregs, ...@@ -48,63 +48,8 @@ static inline void crash_setup_regs(struct pt_regs *newregs,
{ {
if (oldregs) if (oldregs)
memcpy(newregs, oldregs, sizeof(*newregs)); memcpy(newregs, oldregs, sizeof(*newregs));
#ifdef __powerpc64__
else {
/* FIXME Merge this with xmon_save_regs ?? */
unsigned long tmp1, tmp2;
__asm__ __volatile__ (
"std 0,0(%2)\n"
"std 1,8(%2)\n"
"std 2,16(%2)\n"
"std 3,24(%2)\n"
"std 4,32(%2)\n"
"std 5,40(%2)\n"
"std 6,48(%2)\n"
"std 7,56(%2)\n"
"std 8,64(%2)\n"
"std 9,72(%2)\n"
"std 10,80(%2)\n"
"std 11,88(%2)\n"
"std 12,96(%2)\n"
"std 13,104(%2)\n"
"std 14,112(%2)\n"
"std 15,120(%2)\n"
"std 16,128(%2)\n"
"std 17,136(%2)\n"
"std 18,144(%2)\n"
"std 19,152(%2)\n"
"std 20,160(%2)\n"
"std 21,168(%2)\n"
"std 22,176(%2)\n"
"std 23,184(%2)\n"
"std 24,192(%2)\n"
"std 25,200(%2)\n"
"std 26,208(%2)\n"
"std 27,216(%2)\n"
"std 28,224(%2)\n"
"std 29,232(%2)\n"
"std 30,240(%2)\n"
"std 31,248(%2)\n"
"mfmsr %0\n"
"std %0, 264(%2)\n"
"mfctr %0\n"
"std %0, 280(%2)\n"
"mflr %0\n"
"std %0, 288(%2)\n"
"bl 1f\n"
"1: mflr %1\n"
"std %1, 256(%2)\n"
"mtlr %0\n"
"mfxer %0\n"
"std %0, 296(%2)\n"
: "=&r" (tmp1), "=&r" (tmp2)
: "b" (newregs)
: "memory");
}
#else
else else
ppc_save_regs(newregs); ppc_save_regs(newregs);
#endif /* __powerpc64__ */
} }
extern void kexec_smp_wait(void); /* get and clear naca physid, wait for extern void kexec_smp_wait(void); /* get and clear naca physid, wait for
......
...@@ -320,6 +320,7 @@ enum ps3_match_id { ...@@ -320,6 +320,7 @@ enum ps3_match_id {
enum ps3_match_sub_id { enum ps3_match_sub_id {
PS3_MATCH_SUB_ID_GPU_FB = 1, PS3_MATCH_SUB_ID_GPU_FB = 1,
PS3_MATCH_SUB_ID_GPU_RAMDISK = 2,
}; };
#define PS3_MODULE_ALIAS_EHCI "ps3:1:0" #define PS3_MODULE_ALIAS_EHCI "ps3:1:0"
...@@ -332,6 +333,7 @@ enum ps3_match_sub_id { ...@@ -332,6 +333,7 @@ enum ps3_match_sub_id {
#define PS3_MODULE_ALIAS_STOR_FLASH "ps3:8:0" #define PS3_MODULE_ALIAS_STOR_FLASH "ps3:8:0"
#define PS3_MODULE_ALIAS_SOUND "ps3:9:0" #define PS3_MODULE_ALIAS_SOUND "ps3:9:0"
#define PS3_MODULE_ALIAS_GPU_FB "ps3:10:1" #define PS3_MODULE_ALIAS_GPU_FB "ps3:10:1"
#define PS3_MODULE_ALIAS_GPU_RAMDISK "ps3:10:2"
#define PS3_MODULE_ALIAS_LPM "ps3:11:0" #define PS3_MODULE_ALIAS_LPM "ps3:11:0"
enum ps3_system_bus_device_type { enum ps3_system_bus_device_type {
......
...@@ -17,6 +17,8 @@ ...@@ -17,6 +17,8 @@
#ifdef __KERNEL__ #ifdef __KERNEL__
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <asm/cpm.h> #include <asm/cpm.h>
#include <asm/immap_qe.h> #include <asm/immap_qe.h>
...@@ -84,7 +86,11 @@ static inline bool qe_clock_is_brg(enum qe_clock clk) ...@@ -84,7 +86,11 @@ static inline bool qe_clock_is_brg(enum qe_clock clk)
extern spinlock_t cmxgcr_lock; extern spinlock_t cmxgcr_lock;
/* Export QE common operations */ /* Export QE common operations */
#ifdef CONFIG_QUICC_ENGINE
extern void __init qe_reset(void); extern void __init qe_reset(void);
#else
static inline void qe_reset(void) {}
#endif
/* QE PIO */ /* QE PIO */
#define QE_PIO_PINS 32 #define QE_PIO_PINS 32
...@@ -101,16 +107,43 @@ struct qe_pio_regs { ...@@ -101,16 +107,43 @@ struct qe_pio_regs {
#endif #endif
}; };
extern int par_io_init(struct device_node *np);
extern int par_io_of_config(struct device_node *np);
#define QE_PIO_DIR_IN 2 #define QE_PIO_DIR_IN 2
#define QE_PIO_DIR_OUT 1 #define QE_PIO_DIR_OUT 1
extern void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin, extern void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin,
int dir, int open_drain, int assignment, int dir, int open_drain, int assignment,
int has_irq); int has_irq);
#ifdef CONFIG_QUICC_ENGINE
extern int par_io_init(struct device_node *np);
extern int par_io_of_config(struct device_node *np);
extern int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain, extern int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
int assignment, int has_irq); int assignment, int has_irq);
extern int par_io_data_set(u8 port, u8 pin, u8 val); extern int par_io_data_set(u8 port, u8 pin, u8 val);
#else
static inline int par_io_init(struct device_node *np) { return -ENOSYS; }
static inline int par_io_of_config(struct device_node *np) { return -ENOSYS; }
static inline int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
int assignment, int has_irq) { return -ENOSYS; }
static inline int par_io_data_set(u8 port, u8 pin, u8 val) { return -ENOSYS; }
#endif /* CONFIG_QUICC_ENGINE */
/*
* Pin multiplexing functions.
*/
struct qe_pin;
#ifdef CONFIG_QE_GPIO
extern struct qe_pin *qe_pin_request(struct device_node *np, int index);
extern void qe_pin_free(struct qe_pin *qe_pin);
extern void qe_pin_set_gpio(struct qe_pin *qe_pin);
extern void qe_pin_set_dedicated(struct qe_pin *pin);
#else
static inline struct qe_pin *qe_pin_request(struct device_node *np, int index)
{
return ERR_PTR(-ENOSYS);
}
static inline void qe_pin_free(struct qe_pin *qe_pin) {}
static inline void qe_pin_set_gpio(struct qe_pin *qe_pin) {}
static inline void qe_pin_set_dedicated(struct qe_pin *pin) {}
#endif /* CONFIG_QE_GPIO */
/* QE internal API */ /* QE internal API */
int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input); int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input);
......
...@@ -17,6 +17,9 @@ ...@@ -17,6 +17,9 @@
#include <linux/irq.h> #include <linux/irq.h>
struct device_node;
struct qe_ic;
#define NUM_OF_QE_IC_GROUPS 6 #define NUM_OF_QE_IC_GROUPS 6
/* Flags when we init the QE IC */ /* Flags when we init the QE IC */
...@@ -54,17 +57,27 @@ enum qe_ic_grp_id { ...@@ -54,17 +57,27 @@ enum qe_ic_grp_id {
QE_IC_GRP_RISCB /* QE interrupt controller RISC group B */ QE_IC_GRP_RISCB /* QE interrupt controller RISC group B */
}; };
#ifdef CONFIG_QUICC_ENGINE
void qe_ic_init(struct device_node *node, unsigned int flags, void qe_ic_init(struct device_node *node, unsigned int flags,
void (*low_handler)(unsigned int irq, struct irq_desc *desc), void (*low_handler)(unsigned int irq, struct irq_desc *desc),
void (*high_handler)(unsigned int irq, struct irq_desc *desc)); void (*high_handler)(unsigned int irq, struct irq_desc *desc));
unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic);
unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic);
#else
static inline void qe_ic_init(struct device_node *node, unsigned int flags,
void (*low_handler)(unsigned int irq, struct irq_desc *desc),
void (*high_handler)(unsigned int irq, struct irq_desc *desc))
{}
static inline unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic)
{ return 0; }
static inline unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)
{ return 0; }
#endif /* CONFIG_QUICC_ENGINE */
void qe_ic_set_highest_priority(unsigned int virq, int high); void qe_ic_set_highest_priority(unsigned int virq, int high);
int qe_ic_set_priority(unsigned int virq, unsigned int priority); int qe_ic_set_priority(unsigned int virq, unsigned int priority);
int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high); int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high);
struct qe_ic;
unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic);
unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic);
static inline void qe_ic_cascade_low_ipic(unsigned int irq, static inline void qe_ic_cascade_low_ipic(unsigned int irq,
struct irq_desc *desc) struct irq_desc *desc)
{ {
......
...@@ -128,7 +128,7 @@ struct spu { ...@@ -128,7 +128,7 @@ struct spu {
int number; int number;
unsigned int irqs[3]; unsigned int irqs[3];
u32 node; u32 node;
u64 flags; unsigned long flags;
u64 class_0_pending; u64 class_0_pending;
u64 class_0_dar; u64 class_0_dar;
u64 class_1_dar; u64 class_1_dar;
......
...@@ -29,7 +29,7 @@ endif ...@@ -29,7 +29,7 @@ endif
obj-y := cputable.o ptrace.o syscalls.o \ obj-y := cputable.o ptrace.o syscalls.o \
irq.o align.o signal_32.o pmc.o vdso.o \ irq.o align.o signal_32.o pmc.o vdso.o \
init_task.o process.o systbl.o idle.o \ init_task.o process.o systbl.o idle.o \
signal.o sysfs.o signal.o sysfs.o cacheinfo.o
obj-y += vdso32/ obj-y += vdso32/
obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \ obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \
signal_64.o ptrace32.o \ signal_64.o ptrace32.o \
......
This diff is collapsed.
#ifndef _PPC_CACHEINFO_H
#define _PPC_CACHEINFO_H
/* These are just hooks for sysfs.c to use. */
extern void cacheinfo_cpu_online(unsigned int cpu_id);
extern void cacheinfo_cpu_offline(unsigned int cpu_id);
#endif /* _PPC_CACHEINFO_H */
...@@ -16,7 +16,7 @@ ...@@ -16,7 +16,7 @@
* 2 of the License, or (at your option) any later version. * 2 of the License, or (at your option) any later version.
*/ */
#undef DEBUG #define DEBUG
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/pci.h> #include <linux/pci.h>
...@@ -1356,6 +1356,63 @@ static void __init pcibios_allocate_resources(int pass) ...@@ -1356,6 +1356,63 @@ static void __init pcibios_allocate_resources(int pass)
} }
} }
static void __init pcibios_reserve_legacy_regions(struct pci_bus *bus)
{
struct pci_controller *hose = pci_bus_to_host(bus);
resource_size_t offset;
struct resource *res, *pres;
int i;
pr_debug("Reserving legacy ranges for domain %04x\n", pci_domain_nr(bus));
/* Check for IO */
if (!(hose->io_resource.flags & IORESOURCE_IO))
goto no_io;
offset = (unsigned long)hose->io_base_virt - _IO_BASE;
res = kzalloc(sizeof(struct resource), GFP_KERNEL);
BUG_ON(res == NULL);
res->name = "Legacy IO";
res->flags = IORESOURCE_IO;
res->start = offset;
res->end = (offset + 0xfff) & 0xfffffffful;
pr_debug("Candidate legacy IO: %pR\n", res);
if (request_resource(&hose->io_resource, res)) {
printk(KERN_DEBUG
"PCI %04x:%02x Cannot reserve Legacy IO %pR\n",
pci_domain_nr(bus), bus->number, res);
kfree(res);
}
no_io:
/* Check for memory */
offset = hose->pci_mem_offset;
pr_debug("hose mem offset: %016llx\n", (unsigned long long)offset);
for (i = 0; i < 3; i++) {
pres = &hose->mem_resources[i];
if (!(pres->flags & IORESOURCE_MEM))
continue;
pr_debug("hose mem res: %pR\n", pres);
if ((pres->start - offset) <= 0xa0000 &&
(pres->end - offset) >= 0xbffff)
break;
}
if (i >= 3)
return;
res = kzalloc(sizeof(struct resource), GFP_KERNEL);
BUG_ON(res == NULL);
res->name = "Legacy VGA memory";
res->flags = IORESOURCE_MEM;
res->start = 0xa0000 + offset;
res->end = 0xbffff + offset;
pr_debug("Candidate VGA memory: %pR\n", res);
if (request_resource(pres, res)) {
printk(KERN_DEBUG
"PCI %04x:%02x Cannot reserve VGA memory %pR\n",
pci_domain_nr(bus), bus->number, res);
kfree(res);
}
}
void __init pcibios_resource_survey(void) void __init pcibios_resource_survey(void)
{ {
struct pci_bus *b; struct pci_bus *b;
...@@ -1371,6 +1428,18 @@ void __init pcibios_resource_survey(void) ...@@ -1371,6 +1428,18 @@ void __init pcibios_resource_survey(void)
pcibios_allocate_resources(1); pcibios_allocate_resources(1);
} }
/* Before we start assigning unassigned resource, we try to reserve
* the low IO area and the VGA memory area if they intersect the
* bus available resources to avoid allocating things on top of them
*/
if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) {
list_for_each_entry(b, &pci_root_buses, node)
pcibios_reserve_legacy_regions(b);
}
/* Now, if the platform didn't decide to blindly trust the firmware,
* we proceed to assigning things that were left unassigned
*/
if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) { if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) {
pr_debug("PCI: Assigning unassigned resouces...\n"); pr_debug("PCI: Assigning unassigned resouces...\n");
pci_assign_unassigned_resources(); pci_assign_unassigned_resources();
......
...@@ -560,9 +560,14 @@ long sys_pciconfig_iobase(long which, unsigned long in_bus, ...@@ -560,9 +560,14 @@ long sys_pciconfig_iobase(long which, unsigned long in_bus,
* G5 machines... So when something asks for bus 0 io base * G5 machines... So when something asks for bus 0 io base
* (bus 0 is HT root), we return the AGP one instead. * (bus 0 is HT root), we return the AGP one instead.
*/ */
if (machine_is_compatible("MacRISC4")) if (in_bus == 0 && machine_is_compatible("MacRISC4")) {
if (in_bus == 0) struct device_node *agp;
agp = of_find_compatible_node(NULL, NULL, "u3-agp");
if (agp)
in_bus = 0xf0; in_bus = 0xf0;
of_node_put(agp);
}
/* That syscall isn't quite compatible with PCI domains, but it's /* That syscall isn't quite compatible with PCI domains, but it's
* used on pre-domains setup. We return the first match * used on pre-domains setup. We return the first match
......
...@@ -165,6 +165,7 @@ EXPORT_SYMBOL(timer_interrupt); ...@@ -165,6 +165,7 @@ EXPORT_SYMBOL(timer_interrupt);
EXPORT_SYMBOL(irq_desc); EXPORT_SYMBOL(irq_desc);
EXPORT_SYMBOL(tb_ticks_per_jiffy); EXPORT_SYMBOL(tb_ticks_per_jiffy);
EXPORT_SYMBOL(cacheable_memcpy); EXPORT_SYMBOL(cacheable_memcpy);
EXPORT_SYMBOL(cacheable_memzero);
#endif #endif
#ifdef CONFIG_PPC32 #ifdef CONFIG_PPC32
......
...@@ -824,11 +824,11 @@ static int __init early_init_dt_scan_chosen(unsigned long node, ...@@ -824,11 +824,11 @@ static int __init early_init_dt_scan_chosen(unsigned long node,
#endif #endif
#ifdef CONFIG_KEXEC #ifdef CONFIG_KEXEC
lprop = (u64*)of_get_flat_dt_prop(node, "linux,crashkernel-base", NULL); lprop = of_get_flat_dt_prop(node, "linux,crashkernel-base", NULL);
if (lprop) if (lprop)
crashk_res.start = *lprop; crashk_res.start = *lprop;
lprop = (u64*)of_get_flat_dt_prop(node, "linux,crashkernel-size", NULL); lprop = of_get_flat_dt_prop(node, "linux,crashkernel-size", NULL);
if (lprop) if (lprop)
crashk_res.end = crashk_res.start + *lprop - 1; crashk_res.end = crashk_res.start + *lprop - 1;
#endif #endif
...@@ -893,12 +893,12 @@ static int __init early_init_dt_scan_drconf_memory(unsigned long node) ...@@ -893,12 +893,12 @@ static int __init early_init_dt_scan_drconf_memory(unsigned long node)
u64 base, size, lmb_size; u64 base, size, lmb_size;
unsigned int is_kexec_kdump = 0, rngs; unsigned int is_kexec_kdump = 0, rngs;
ls = (cell_t *)of_get_flat_dt_prop(node, "ibm,lmb-size", &l); ls = of_get_flat_dt_prop(node, "ibm,lmb-size", &l);
if (ls == NULL || l < dt_root_size_cells * sizeof(cell_t)) if (ls == NULL || l < dt_root_size_cells * sizeof(cell_t))
return 0; return 0;
lmb_size = dt_mem_next_cell(dt_root_size_cells, &ls); lmb_size = dt_mem_next_cell(dt_root_size_cells, &ls);
dm = (cell_t *)of_get_flat_dt_prop(node, "ibm,dynamic-memory", &l); dm = of_get_flat_dt_prop(node, "ibm,dynamic-memory", &l);
if (dm == NULL || l < sizeof(cell_t)) if (dm == NULL || l < sizeof(cell_t))
return 0; return 0;
...@@ -907,7 +907,7 @@ static int __init early_init_dt_scan_drconf_memory(unsigned long node) ...@@ -907,7 +907,7 @@ static int __init early_init_dt_scan_drconf_memory(unsigned long node)
return 0; return 0;
/* check if this is a kexec/kdump kernel. */ /* check if this is a kexec/kdump kernel. */
usm = (cell_t *)of_get_flat_dt_prop(node, "linux,drconf-usable-memory", usm = of_get_flat_dt_prop(node, "linux,drconf-usable-memory",
&l); &l);
if (usm != NULL) if (usm != NULL)
is_kexec_kdump = 1; is_kexec_kdump = 1;
...@@ -981,9 +981,9 @@ static int __init early_init_dt_scan_memory(unsigned long node, ...@@ -981,9 +981,9 @@ static int __init early_init_dt_scan_memory(unsigned long node,
} else if (strcmp(type, "memory") != 0) } else if (strcmp(type, "memory") != 0)
return 0; return 0;
reg = (cell_t *)of_get_flat_dt_prop(node, "linux,usable-memory", &l); reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l);
if (reg == NULL) if (reg == NULL)
reg = (cell_t *)of_get_flat_dt_prop(node, "reg", &l); reg = of_get_flat_dt_prop(node, "reg", &l);
if (reg == NULL) if (reg == NULL)
return 0; return 0;
......
...@@ -1210,7 +1210,7 @@ static void __init prom_initialize_tce_table(void) ...@@ -1210,7 +1210,7 @@ static void __init prom_initialize_tce_table(void)
/* Initialize the table to have a one-to-one mapping /* Initialize the table to have a one-to-one mapping
* over the allocated size. * over the allocated size.
*/ */
tce_entryp = (unsigned long *)base; tce_entryp = (u64 *)base;
for (i = 0; i < (minsize >> 3) ;tce_entryp++, i++) { for (i = 0; i < (minsize >> 3) ;tce_entryp++, i++) {
tce_entry = (i << PAGE_SHIFT); tce_entry = (i << PAGE_SHIFT);
tce_entry |= 0x3; tce_entry |= 0x3;
......
...@@ -18,6 +18,8 @@ ...@@ -18,6 +18,8 @@
#include <asm/machdep.h> #include <asm/machdep.h>
#include <asm/smp.h> #include <asm/smp.h>
#include "cacheinfo.h"
#ifdef CONFIG_PPC64 #ifdef CONFIG_PPC64
#include <asm/paca.h> #include <asm/paca.h>
#include <asm/lppaca.h> #include <asm/lppaca.h>
...@@ -25,8 +27,6 @@ ...@@ -25,8 +27,6 @@
static DEFINE_PER_CPU(struct cpu, cpu_devices); static DEFINE_PER_CPU(struct cpu, cpu_devices);
static DEFINE_PER_CPU(struct kobject *, cache_toplevel);
/* /*
* SMT snooze delay stuff, 64-bit only for now * SMT snooze delay stuff, 64-bit only for now
*/ */
...@@ -343,283 +343,6 @@ static struct sysdev_attribute pa6t_attrs[] = { ...@@ -343,283 +343,6 @@ static struct sysdev_attribute pa6t_attrs[] = {
#endif /* HAS_PPC_PMC_PA6T */ #endif /* HAS_PPC_PMC_PA6T */
#endif /* HAS_PPC_PMC_CLASSIC */ #endif /* HAS_PPC_PMC_CLASSIC */
struct cache_desc {
struct kobject kobj;
struct cache_desc *next;
const char *type; /* Instruction, Data, or Unified */
u32 size; /* total cache size in KB */
u32 line_size; /* in bytes */
u32 nr_sets; /* number of sets */
u32 level; /* e.g. 1, 2, 3... */
u32 associativity; /* e.g. 8-way... 0 is fully associative */
};
DEFINE_PER_CPU(struct cache_desc *, cache_desc);
static struct cache_desc *kobj_to_cache_desc(struct kobject *k)
{
return container_of(k, struct cache_desc, kobj);
}
static void cache_desc_release(struct kobject *k)
{
struct cache_desc *desc = kobj_to_cache_desc(k);
pr_debug("%s: releasing %s\n", __func__, kobject_name(k));
if (desc->next)
kobject_put(&desc->next->kobj);
kfree(kobj_to_cache_desc(k));
}
static ssize_t cache_desc_show(struct kobject *k, struct attribute *attr, char *buf)
{
struct kobj_attribute *kobj_attr;
kobj_attr = container_of(attr, struct kobj_attribute, attr);
return kobj_attr->show(k, kobj_attr, buf);
}
static struct sysfs_ops cache_desc_sysfs_ops = {
.show = cache_desc_show,
};
static struct kobj_type cache_desc_type = {
.release = cache_desc_release,
.sysfs_ops = &cache_desc_sysfs_ops,
};
static ssize_t cache_size_show(struct kobject *k, struct kobj_attribute *attr, char *buf)
{
struct cache_desc *cache = kobj_to_cache_desc(k);
return sprintf(buf, "%uK\n", cache->size);
}
static struct kobj_attribute cache_size_attr =
__ATTR(size, 0444, cache_size_show, NULL);
static ssize_t cache_line_size_show(struct kobject *k, struct kobj_attribute *attr, char *buf)
{
struct cache_desc *cache = kobj_to_cache_desc(k);
return sprintf(buf, "%u\n", cache->line_size);
}
static struct kobj_attribute cache_line_size_attr =
__ATTR(coherency_line_size, 0444, cache_line_size_show, NULL);
static ssize_t cache_nr_sets_show(struct kobject *k, struct kobj_attribute *attr, char *buf)
{
struct cache_desc *cache = kobj_to_cache_desc(k);
return sprintf(buf, "%u\n", cache->nr_sets);
}
static struct kobj_attribute cache_nr_sets_attr =
__ATTR(number_of_sets, 0444, cache_nr_sets_show, NULL);
static ssize_t cache_type_show(struct kobject *k, struct kobj_attribute *attr, char *buf)
{
struct cache_desc *cache = kobj_to_cache_desc(k);
return sprintf(buf, "%s\n", cache->type);
}
static struct kobj_attribute cache_type_attr =
__ATTR(type, 0444, cache_type_show, NULL);
static ssize_t cache_level_show(struct kobject *k, struct kobj_attribute *attr, char *buf)
{
struct cache_desc *cache = kobj_to_cache_desc(k);
return sprintf(buf, "%u\n", cache->level);
}
static struct kobj_attribute cache_level_attr =
__ATTR(level, 0444, cache_level_show, NULL);
static ssize_t cache_assoc_show(struct kobject *k, struct kobj_attribute *attr, char *buf)
{
struct cache_desc *cache = kobj_to_cache_desc(k);
return sprintf(buf, "%u\n", cache->associativity);
}
static struct kobj_attribute cache_assoc_attr =
__ATTR(ways_of_associativity, 0444, cache_assoc_show, NULL);
struct cache_desc_info {
const char *type;
const char *size_prop;
const char *line_size_prop;
const char *nr_sets_prop;
};
/* PowerPC Processor binding says the [di]-cache-* must be equal on
* unified caches, so just use d-cache properties. */
static struct cache_desc_info ucache_info = {
.type = "Unified",
.size_prop = "d-cache-size",
.line_size_prop = "d-cache-line-size",
.nr_sets_prop = "d-cache-sets",
};
static struct cache_desc_info dcache_info = {
.type = "Data",
.size_prop = "d-cache-size",
.line_size_prop = "d-cache-line-size",
.nr_sets_prop = "d-cache-sets",
};
static struct cache_desc_info icache_info = {
.type = "Instruction",
.size_prop = "i-cache-size",
.line_size_prop = "i-cache-line-size",
.nr_sets_prop = "i-cache-sets",
};
static struct cache_desc * __cpuinit create_cache_desc(struct device_node *np, struct kobject *parent, int index, int level, struct cache_desc_info *info)
{
const u32 *cache_line_size;
struct cache_desc *new;
const u32 *cache_size;
const u32 *nr_sets;
int rc;
new = kzalloc(sizeof(*new), GFP_KERNEL);
if (!new)
return NULL;
rc = kobject_init_and_add(&new->kobj, &cache_desc_type, parent,
"index%d", index);
if (rc)
goto err;
/* type */
new->type = info->type;
rc = sysfs_create_file(&new->kobj, &cache_type_attr.attr);
WARN_ON(rc);
/* level */
new->level = level;
rc = sysfs_create_file(&new->kobj, &cache_level_attr.attr);
WARN_ON(rc);
/* size */
cache_size = of_get_property(np, info->size_prop, NULL);
if (cache_size) {
new->size = *cache_size / 1024;
rc = sysfs_create_file(&new->kobj,
&cache_size_attr.attr);
WARN_ON(rc);
}
/* coherency_line_size */
cache_line_size = of_get_property(np, info->line_size_prop, NULL);
if (cache_line_size) {
new->line_size = *cache_line_size;
rc = sysfs_create_file(&new->kobj,
&cache_line_size_attr.attr);
WARN_ON(rc);
}
/* number_of_sets */
nr_sets = of_get_property(np, info->nr_sets_prop, NULL);
if (nr_sets) {
new->nr_sets = *nr_sets;
rc = sysfs_create_file(&new->kobj,
&cache_nr_sets_attr.attr);
WARN_ON(rc);
}
/* ways_of_associativity */
if (new->nr_sets == 1) {
/* fully associative */
new->associativity = 0;
goto create_assoc;
}
if (new->nr_sets && new->size && new->line_size) {
/* If we have values for all of these we can derive
* the associativity. */
new->associativity =
((new->size * 1024) / new->nr_sets) / new->line_size;
create_assoc:
rc = sysfs_create_file(&new->kobj,
&cache_assoc_attr.attr);
WARN_ON(rc);
}
return new;
err:
kfree(new);
return NULL;
}
static bool cache_is_unified(struct device_node *np)
{
return of_get_property(np, "cache-unified", NULL);
}
static struct cache_desc * __cpuinit create_cache_index_info(struct device_node *np, struct kobject *parent, int index, int level)
{
struct device_node *next_cache;
struct cache_desc *new, **end;
pr_debug("%s(node = %s, index = %d)\n", __func__, np->full_name, index);
if (cache_is_unified(np)) {
new = create_cache_desc(np, parent, index, level,
&ucache_info);
} else {
new = create_cache_desc(np, parent, index, level,
&dcache_info);
if (new) {
index++;
new->next = create_cache_desc(np, parent, index, level,
&icache_info);
}
}
if (!new)
return NULL;
end = &new->next;
while (*end)
end = &(*end)->next;
next_cache = of_find_next_cache_node(np);
if (!next_cache)
goto out;
*end = create_cache_index_info(next_cache, parent, ++index, ++level);
of_node_put(next_cache);
out:
return new;
}
static void __cpuinit create_cache_info(struct sys_device *sysdev)
{
struct kobject *cache_toplevel;
struct device_node *np = NULL;
int cpu = sysdev->id;
cache_toplevel = kobject_create_and_add("cache", &sysdev->kobj);
if (!cache_toplevel)
return;
per_cpu(cache_toplevel, cpu) = cache_toplevel;
np = of_get_cpu_node(cpu, NULL);
if (np != NULL) {
per_cpu(cache_desc, cpu) =
create_cache_index_info(np, cache_toplevel, 0, 1);
of_node_put(np);
}
return;
}
static void __cpuinit register_cpu_online(unsigned int cpu) static void __cpuinit register_cpu_online(unsigned int cpu)
{ {
struct cpu *c = &per_cpu(cpu_devices, cpu); struct cpu *c = &per_cpu(cpu_devices, cpu);
...@@ -684,25 +407,10 @@ static void __cpuinit register_cpu_online(unsigned int cpu) ...@@ -684,25 +407,10 @@ static void __cpuinit register_cpu_online(unsigned int cpu)
sysdev_create_file(s, &attr_dscr); sysdev_create_file(s, &attr_dscr);
#endif /* CONFIG_PPC64 */ #endif /* CONFIG_PPC64 */
create_cache_info(s); cacheinfo_cpu_online(cpu);
} }
#ifdef CONFIG_HOTPLUG_CPU #ifdef CONFIG_HOTPLUG_CPU
static void remove_cache_info(struct sys_device *sysdev)
{
struct kobject *cache_toplevel;
struct cache_desc *cache_desc;
int cpu = sysdev->id;
cache_desc = per_cpu(cache_desc, cpu);
if (cache_desc != NULL)
kobject_put(&cache_desc->kobj);
cache_toplevel = per_cpu(cache_toplevel, cpu);
if (cache_toplevel != NULL)
kobject_put(cache_toplevel);
}
static void unregister_cpu_online(unsigned int cpu) static void unregister_cpu_online(unsigned int cpu)
{ {
struct cpu *c = &per_cpu(cpu_devices, cpu); struct cpu *c = &per_cpu(cpu_devices, cpu);
...@@ -769,7 +477,7 @@ static void unregister_cpu_online(unsigned int cpu) ...@@ -769,7 +477,7 @@ static void unregister_cpu_online(unsigned int cpu)
sysdev_remove_file(s, &attr_dscr); sysdev_remove_file(s, &attr_dscr);
#endif /* CONFIG_PPC64 */ #endif /* CONFIG_PPC64 */
remove_cache_info(s); cacheinfo_cpu_offline(cpu);
} }
#endif /* CONFIG_HOTPLUG_CPU */ #endif /* CONFIG_HOTPLUG_CPU */
......
...@@ -30,11 +30,11 @@ ...@@ -30,11 +30,11 @@
#if defined(CONFIG_40x) || defined(CONFIG_8xx) #if defined(CONFIG_40x) || defined(CONFIG_8xx)
static inline void _tlbil_all(void) static inline void _tlbil_all(void)
{ {
asm volatile ("sync; tlbia; isync" : : : "memory") asm volatile ("sync; tlbia; isync" : : : "memory");
} }
static inline void _tlbil_pid(unsigned int pid) static inline void _tlbil_pid(unsigned int pid)
{ {
asm volatile ("sync; tlbia; isync" : : : "memory") asm volatile ("sync; tlbia; isync" : : : "memory");
} }
#else /* CONFIG_40x || CONFIG_8xx */ #else /* CONFIG_40x || CONFIG_8xx */
extern void _tlbil_all(void); extern void _tlbil_all(void);
...@@ -47,7 +47,7 @@ extern void _tlbil_pid(unsigned int pid); ...@@ -47,7 +47,7 @@ extern void _tlbil_pid(unsigned int pid);
#ifdef CONFIG_8xx #ifdef CONFIG_8xx
static inline void _tlbil_va(unsigned long address, unsigned int pid) static inline void _tlbil_va(unsigned long address, unsigned int pid)
{ {
asm volatile ("tlbie %0; sync" : : "r" (address) : "memory") asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
} }
#else /* CONFIG_8xx */ #else /* CONFIG_8xx */
extern void _tlbil_va(unsigned long address, unsigned int pid); extern void _tlbil_va(unsigned long address, unsigned int pid);
......
...@@ -822,42 +822,50 @@ static void __init dump_numa_memory_topology(void) ...@@ -822,42 +822,50 @@ static void __init dump_numa_memory_topology(void)
* required. nid is the preferred node and end is the physical address of * required. nid is the preferred node and end is the physical address of
* the highest address in the node. * the highest address in the node.
* *
* Returns the physical address of the memory. * Returns the virtual address of the memory.
*/ */
static void __init *careful_allocation(int nid, unsigned long size, static void __init *careful_zallocation(int nid, unsigned long size,
unsigned long align, unsigned long align,
unsigned long end_pfn) unsigned long end_pfn)
{ {
void *ret;
int new_nid; int new_nid;
unsigned long ret = __lmb_alloc_base(size, align, end_pfn << PAGE_SHIFT); unsigned long ret_paddr;
ret_paddr = __lmb_alloc_base(size, align, end_pfn << PAGE_SHIFT);
/* retry over all memory */ /* retry over all memory */
if (!ret) if (!ret_paddr)
ret = __lmb_alloc_base(size, align, lmb_end_of_DRAM()); ret_paddr = __lmb_alloc_base(size, align, lmb_end_of_DRAM());
if (!ret) if (!ret_paddr)
panic("numa.c: cannot allocate %lu bytes on node %d", panic("numa.c: cannot allocate %lu bytes for node %d",
size, nid); size, nid);
ret = __va(ret_paddr);
/* /*
* If the memory came from a previously allocated node, we must * We initialize the nodes in numeric order: 0, 1, 2...
* retry with the bootmem allocator. * and hand over control from the LMB allocator to the
* bootmem allocator. If this function is called for
* node 5, then we know that all nodes <5 are using the
* bootmem allocator instead of the LMB allocator.
*
* So, check the nid from which this allocation came
* and double check to see if we need to use bootmem
* instead of the LMB. We don't free the LMB memory
* since it would be useless.
*/ */
new_nid = early_pfn_to_nid(ret >> PAGE_SHIFT); new_nid = early_pfn_to_nid(ret_paddr >> PAGE_SHIFT);
if (new_nid < nid) { if (new_nid < nid) {
ret = (unsigned long)__alloc_bootmem_node(NODE_DATA(new_nid), ret = __alloc_bootmem_node(NODE_DATA(new_nid),
size, align, 0); size, align, 0);
if (!ret) dbg("alloc_bootmem %p %lx\n", ret, size);
panic("numa.c: cannot allocate %lu bytes on node %d",
size, new_nid);
ret = __pa(ret);
dbg("alloc_bootmem %lx %lx\n", ret, size);
} }
return (void *)ret; memset(ret, 0, size);
return ret;
} }
static struct notifier_block __cpuinitdata ppc64_numa_nb = { static struct notifier_block __cpuinitdata ppc64_numa_nb = {
...@@ -952,7 +960,7 @@ void __init do_init_bootmem(void) ...@@ -952,7 +960,7 @@ void __init do_init_bootmem(void)
for_each_online_node(nid) { for_each_online_node(nid) {
unsigned long start_pfn, end_pfn; unsigned long start_pfn, end_pfn;
unsigned long bootmem_paddr; void *bootmem_vaddr;
unsigned long bootmap_pages; unsigned long bootmap_pages;
get_pfn_range_for_nid(nid, &start_pfn, &end_pfn); get_pfn_range_for_nid(nid, &start_pfn, &end_pfn);
...@@ -964,11 +972,9 @@ void __init do_init_bootmem(void) ...@@ -964,11 +972,9 @@ void __init do_init_bootmem(void)
* previous nodes' bootmem to be initialized and have * previous nodes' bootmem to be initialized and have
* all reserved areas marked. * all reserved areas marked.
*/ */
NODE_DATA(nid) = careful_allocation(nid, NODE_DATA(nid) = careful_zallocation(nid,
sizeof(struct pglist_data), sizeof(struct pglist_data),
SMP_CACHE_BYTES, end_pfn); SMP_CACHE_BYTES, end_pfn);
NODE_DATA(nid) = __va(NODE_DATA(nid));
memset(NODE_DATA(nid), 0, sizeof(struct pglist_data));
dbg("node %d\n", nid); dbg("node %d\n", nid);
dbg("NODE_DATA() = %p\n", NODE_DATA(nid)); dbg("NODE_DATA() = %p\n", NODE_DATA(nid));
...@@ -984,20 +990,20 @@ void __init do_init_bootmem(void) ...@@ -984,20 +990,20 @@ void __init do_init_bootmem(void)
dbg("end_paddr = %lx\n", end_pfn << PAGE_SHIFT); dbg("end_paddr = %lx\n", end_pfn << PAGE_SHIFT);
bootmap_pages = bootmem_bootmap_pages(end_pfn - start_pfn); bootmap_pages = bootmem_bootmap_pages(end_pfn - start_pfn);
bootmem_paddr = (unsigned long)careful_allocation(nid, bootmem_vaddr = careful_zallocation(nid,
bootmap_pages << PAGE_SHIFT, bootmap_pages << PAGE_SHIFT,
PAGE_SIZE, end_pfn); PAGE_SIZE, end_pfn);
memset(__va(bootmem_paddr), 0, bootmap_pages << PAGE_SHIFT);
dbg("bootmap_paddr = %lx\n", bootmem_paddr); dbg("bootmap_vaddr = %p\n", bootmem_vaddr);
init_bootmem_node(NODE_DATA(nid), bootmem_paddr >> PAGE_SHIFT, init_bootmem_node(NODE_DATA(nid),
__pa(bootmem_vaddr) >> PAGE_SHIFT,
start_pfn, end_pfn); start_pfn, end_pfn);
free_bootmem_with_active_regions(nid, end_pfn); free_bootmem_with_active_regions(nid, end_pfn);
/* /*
* Be very careful about moving this around. Future * Be very careful about moving this around. Future
* calls to careful_allocation() depend on this getting * calls to careful_zallocation() depend on this getting
* done correctly. * done correctly.
*/ */
mark_reserved_regions_for_nid(nid); mark_reserved_regions_for_nid(nid);
......
...@@ -266,7 +266,8 @@ int map_page(unsigned long va, phys_addr_t pa, int flags) ...@@ -266,7 +266,8 @@ int map_page(unsigned long va, phys_addr_t pa, int flags)
/* The PTE should never be already set nor present in the /* The PTE should never be already set nor present in the
* hash table * hash table
*/ */
BUG_ON(pte_val(*pg) & (_PAGE_PRESENT | _PAGE_HASHPTE)); BUG_ON((pte_val(*pg) & (_PAGE_PRESENT | _PAGE_HASHPTE)) &&
flags);
set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT, set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT,
__pgprot(flags))); __pgprot(flags)));
} }
......
...@@ -189,8 +189,9 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) ...@@ -189,8 +189,9 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
smp_call_function(do_flush_tlb_mm_ipi, NULL, 1); smp_call_function(do_flush_tlb_mm_ipi, NULL, 1);
_tlbil_pid(0); _tlbil_pid(0);
preempt_enable(); preempt_enable();
#endif #else
_tlbil_pid(0); _tlbil_pid(0);
#endif
} }
EXPORT_SYMBOL(flush_tlb_kernel_range); EXPORT_SYMBOL(flush_tlb_kernel_range);
......
...@@ -79,7 +79,7 @@ struct spu_buffer { ...@@ -79,7 +79,7 @@ struct spu_buffer {
* the vma-to-fileoffset map. * the vma-to-fileoffset map.
*/ */
struct vma_to_fileoffset_map *create_vma_map(const struct spu *spu, struct vma_to_fileoffset_map *create_vma_map(const struct spu *spu,
u64 objectid); unsigned long objectid);
unsigned int vma_map_lookup(struct vma_to_fileoffset_map *map, unsigned int vma_map_lookup(struct vma_to_fileoffset_map *map,
unsigned int vma, const struct spu *aSpu, unsigned int vma, const struct spu *aSpu,
int *grd_val); int *grd_val);
......
...@@ -42,7 +42,7 @@ static struct of_device_id mpc52xx_bus_ids[] __initdata = { ...@@ -42,7 +42,7 @@ static struct of_device_id mpc52xx_bus_ids[] __initdata = {
* from interrupt context while node mapping (which calls ioremap()) * from interrupt context while node mapping (which calls ioremap())
* cannot be used at such point. * cannot be used at such point.
*/ */
static spinlock_t mpc52xx_lock = SPIN_LOCK_UNLOCKED; static DEFINE_SPINLOCK(mpc52xx_lock);
static struct mpc52xx_gpt __iomem *mpc52xx_wdt; static struct mpc52xx_gpt __iomem *mpc52xx_wdt;
static struct mpc52xx_cdm __iomem *mpc52xx_cdm; static struct mpc52xx_cdm __iomem *mpc52xx_cdm;
......
...@@ -42,7 +42,7 @@ static void __init mpc831x_rdb_setup_arch(void) ...@@ -42,7 +42,7 @@ static void __init mpc831x_rdb_setup_arch(void)
mpc831x_usb_cfg(); mpc831x_usb_cfg();
} }
void __init mpc831x_rdb_init_IRQ(void) static void __init mpc831x_rdb_init_IRQ(void)
{ {
struct device_node *np; struct device_node *np;
......
...@@ -49,8 +49,6 @@ ...@@ -49,8 +49,6 @@
#define DBG(fmt...) #define DBG(fmt...)
#endif #endif
static u8 *bcsr_regs = NULL;
/* ************************************************************************ /* ************************************************************************
* *
* Setup the architecture * Setup the architecture
...@@ -59,13 +57,14 @@ static u8 *bcsr_regs = NULL; ...@@ -59,13 +57,14 @@ static u8 *bcsr_regs = NULL;
static void __init mpc832x_sys_setup_arch(void) static void __init mpc832x_sys_setup_arch(void)
{ {
struct device_node *np; struct device_node *np;
u8 __iomem *bcsr_regs = NULL;
if (ppc_md.progress) if (ppc_md.progress)
ppc_md.progress("mpc832x_sys_setup_arch()", 0); ppc_md.progress("mpc832x_sys_setup_arch()", 0);
/* Map BCSR area */ /* Map BCSR area */
np = of_find_node_by_name(NULL, "bcsr"); np = of_find_node_by_name(NULL, "bcsr");
if (np != 0) { if (np) {
struct resource res; struct resource res;
of_address_to_resource(np, 0, &res); of_address_to_resource(np, 0, &res);
...@@ -93,9 +92,9 @@ static void __init mpc832x_sys_setup_arch(void) ...@@ -93,9 +92,9 @@ static void __init mpc832x_sys_setup_arch(void)
!= NULL){ != NULL){
/* Reset the Ethernet PHYs */ /* Reset the Ethernet PHYs */
#define BCSR8_FETH_RST 0x50 #define BCSR8_FETH_RST 0x50
bcsr_regs[8] &= ~BCSR8_FETH_RST; clrbits8(&bcsr_regs[8], BCSR8_FETH_RST);
udelay(1000); udelay(1000);
bcsr_regs[8] |= BCSR8_FETH_RST; setbits8(&bcsr_regs[8], BCSR8_FETH_RST);
iounmap(bcsr_regs); iounmap(bcsr_regs);
of_node_put(np); of_node_put(np);
} }
......
...@@ -38,6 +38,7 @@ ...@@ -38,6 +38,7 @@
#define DBG(fmt...) #define DBG(fmt...)
#endif #endif
#ifdef CONFIG_QUICC_ENGINE
static void mpc83xx_spi_activate_cs(u8 cs, u8 polarity) static void mpc83xx_spi_activate_cs(u8 cs, u8 polarity)
{ {
pr_debug("%s %d %d\n", __func__, cs, polarity); pr_debug("%s %d %d\n", __func__, cs, polarity);
...@@ -77,8 +78,8 @@ static int __init mpc832x_spi_init(void) ...@@ -77,8 +78,8 @@ static int __init mpc832x_spi_init(void)
mpc83xx_spi_activate_cs, mpc83xx_spi_activate_cs,
mpc83xx_spi_deactivate_cs); mpc83xx_spi_deactivate_cs);
} }
machine_device_initcall(mpc832x_rdb, mpc832x_spi_init); machine_device_initcall(mpc832x_rdb, mpc832x_spi_init);
#endif /* CONFIG_QUICC_ENGINE */
/* ************************************************************************ /* ************************************************************************
* *
...@@ -130,7 +131,7 @@ static int __init mpc832x_declare_of_platform_devices(void) ...@@ -130,7 +131,7 @@ static int __init mpc832x_declare_of_platform_devices(void)
} }
machine_device_initcall(mpc832x_rdb, mpc832x_declare_of_platform_devices); machine_device_initcall(mpc832x_rdb, mpc832x_declare_of_platform_devices);
void __init mpc832x_rdb_init_IRQ(void) static void __init mpc832x_rdb_init_IRQ(void)
{ {
struct device_node *np; struct device_node *np;
......
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
#include <linux/stddef.h> #include <linux/stddef.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/compiler.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/errno.h> #include <linux/errno.h>
#include <linux/reboot.h> #include <linux/reboot.h>
...@@ -43,6 +44,7 @@ ...@@ -43,6 +44,7 @@
#include <asm/udbg.h> #include <asm/udbg.h>
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h> #include <sysdev/fsl_pci.h>
#include <sysdev/simple_gpio.h>
#include <asm/qe.h> #include <asm/qe.h>
#include <asm/qe_ic.h> #include <asm/qe_ic.h>
...@@ -55,8 +57,6 @@ ...@@ -55,8 +57,6 @@
#define DBG(fmt...) #define DBG(fmt...)
#endif #endif
static u8 *bcsr_regs = NULL;
/* ************************************************************************ /* ************************************************************************
* *
* Setup the architecture * Setup the architecture
...@@ -65,13 +65,14 @@ static u8 *bcsr_regs = NULL; ...@@ -65,13 +65,14 @@ static u8 *bcsr_regs = NULL;
static void __init mpc836x_mds_setup_arch(void) static void __init mpc836x_mds_setup_arch(void)
{ {
struct device_node *np; struct device_node *np;
u8 __iomem *bcsr_regs = NULL;
if (ppc_md.progress) if (ppc_md.progress)
ppc_md.progress("mpc836x_mds_setup_arch()", 0); ppc_md.progress("mpc836x_mds_setup_arch()", 0);
/* Map BCSR area */ /* Map BCSR area */
np = of_find_node_by_name(NULL, "bcsr"); np = of_find_node_by_name(NULL, "bcsr");
if (np != 0) { if (np) {
struct resource res; struct resource res;
of_address_to_resource(np, 0, &res); of_address_to_resource(np, 0, &res);
...@@ -93,6 +94,16 @@ static void __init mpc836x_mds_setup_arch(void) ...@@ -93,6 +94,16 @@ static void __init mpc836x_mds_setup_arch(void)
for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;) for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
par_io_of_config(np); par_io_of_config(np);
#ifdef CONFIG_QE_USB
/* Must fixup Par IO before QE GPIO chips are registered. */
par_io_config_pin(1, 2, 1, 0, 3, 0); /* USBOE */
par_io_config_pin(1, 3, 1, 0, 3, 0); /* USBTP */
par_io_config_pin(1, 8, 1, 0, 1, 0); /* USBTN */
par_io_config_pin(1, 10, 2, 0, 3, 0); /* USBRXD */
par_io_config_pin(1, 9, 2, 1, 3, 0); /* USBRP */
par_io_config_pin(1, 11, 2, 1, 3, 0); /* USBRN */
par_io_config_pin(2, 20, 2, 0, 1, 0); /* CLK21 */
#endif /* CONFIG_QE_USB */
} }
if ((np = of_find_compatible_node(NULL, "network", "ucc_geth")) if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
...@@ -151,6 +162,70 @@ static int __init mpc836x_declare_of_platform_devices(void) ...@@ -151,6 +162,70 @@ static int __init mpc836x_declare_of_platform_devices(void)
} }
machine_device_initcall(mpc836x_mds, mpc836x_declare_of_platform_devices); machine_device_initcall(mpc836x_mds, mpc836x_declare_of_platform_devices);
#ifdef CONFIG_QE_USB
static int __init mpc836x_usb_cfg(void)
{
u8 __iomem *bcsr;
struct device_node *np;
const char *mode;
int ret = 0;
np = of_find_compatible_node(NULL, NULL, "fsl,mpc8360mds-bcsr");
if (!np)
return -ENODEV;
bcsr = of_iomap(np, 0);
of_node_put(np);
if (!bcsr)
return -ENOMEM;
np = of_find_compatible_node(NULL, NULL, "fsl,mpc8323-qe-usb");
if (!np) {
ret = -ENODEV;
goto err;
}
#define BCSR8_TSEC1M_MASK (0x3 << 6)
#define BCSR8_TSEC1M_RGMII (0x0 << 6)
#define BCSR8_TSEC2M_MASK (0x3 << 4)
#define BCSR8_TSEC2M_RGMII (0x0 << 4)
/*
* Default is GMII (2), but we should set it to RGMII (0) if we use
* USB (Eth PHY is in RGMII mode anyway).
*/
clrsetbits_8(&bcsr[8], BCSR8_TSEC1M_MASK | BCSR8_TSEC2M_MASK,
BCSR8_TSEC1M_RGMII | BCSR8_TSEC2M_RGMII);
#define BCSR13_USBMASK 0x0f
#define BCSR13_nUSBEN 0x08 /* 1 - Disable, 0 - Enable */
#define BCSR13_USBSPEED 0x04 /* 1 - Full, 0 - Low */
#define BCSR13_USBMODE 0x02 /* 1 - Host, 0 - Function */
#define BCSR13_nUSBVCC 0x01 /* 1 - gets VBUS, 0 - supplies VBUS */
clrsetbits_8(&bcsr[13], BCSR13_USBMASK, BCSR13_USBSPEED);
mode = of_get_property(np, "mode", NULL);
if (mode && !strcmp(mode, "peripheral")) {
setbits8(&bcsr[13], BCSR13_nUSBVCC);
qe_usb_clock_set(QE_CLK21, 48000000);
} else {
setbits8(&bcsr[13], BCSR13_USBMODE);
/*
* The BCSR GPIOs are used to control power and
* speed of the USB transceiver. This is needed for
* the USB Host only.
*/
simple_gpiochip_init("fsl,mpc8360mds-bcsr-gpio");
}
of_node_put(np);
err:
iounmap(bcsr);
return ret;
}
machine_arch_initcall(mpc836x_mds, mpc836x_usb_cfg);
#endif /* CONFIG_QE_USB */
static void __init mpc836x_mds_init_IRQ(void) static void __init mpc836x_mds_init_IRQ(void)
{ {
struct device_node *np; struct device_node *np;
......
...@@ -51,8 +51,9 @@ static void __init mpc836x_rdk_setup_arch(void) ...@@ -51,8 +51,9 @@ static void __init mpc836x_rdk_setup_arch(void)
for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
mpc83xx_add_bridge(np); mpc83xx_add_bridge(np);
#endif #endif
#ifdef CONFIG_QUICC_ENGINE
qe_reset(); qe_reset();
#endif
} }
static void __init mpc836x_rdk_init_IRQ(void) static void __init mpc836x_rdk_init_IRQ(void)
...@@ -71,13 +72,14 @@ static void __init mpc836x_rdk_init_IRQ(void) ...@@ -71,13 +72,14 @@ static void __init mpc836x_rdk_init_IRQ(void)
*/ */
ipic_set_default_priority(); ipic_set_default_priority();
of_node_put(np); of_node_put(np);
#ifdef CONFIG_QUICC_ENGINE
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
if (!np) if (!np)
return; return;
qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic); qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
of_node_put(np); of_node_put(np);
#endif
} }
/* /*
......
...@@ -26,7 +26,6 @@ ...@@ -26,7 +26,6 @@
#define BCSR12_USB_SER_MASK 0x8a #define BCSR12_USB_SER_MASK 0x8a
#define BCSR12_USB_SER_PIN 0x80 #define BCSR12_USB_SER_PIN 0x80
#define BCSR12_USB_SER_DEVICE 0x02 #define BCSR12_USB_SER_DEVICE 0x02
extern int mpc837x_usb_cfg(void);
static int mpc837xmds_usb_cfg(void) static int mpc837xmds_usb_cfg(void)
{ {
......
...@@ -21,8 +21,6 @@ ...@@ -21,8 +21,6 @@
#include "mpc83xx.h" #include "mpc83xx.h"
extern int mpc837x_usb_cfg(void);
/* ************************************************************************ /* ************************************************************************
* *
* Setup the architecture * Setup the architecture
......
...@@ -61,6 +61,7 @@ ...@@ -61,6 +61,7 @@
extern void mpc83xx_restart(char *cmd); extern void mpc83xx_restart(char *cmd);
extern long mpc83xx_time_init(void); extern long mpc83xx_time_init(void);
extern int mpc837x_usb_cfg(void);
extern int mpc834x_usb_cfg(void); extern int mpc834x_usb_cfg(void);
extern int mpc831x_usb_cfg(void); extern int mpc831x_usb_cfg(void);
......
...@@ -148,6 +148,9 @@ static int mpc85xx_exclude_device(struct pci_controller *hose, ...@@ -148,6 +148,9 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
/* /*
* Setup the architecture * Setup the architecture
*/ */
#ifdef CONFIG_SMP
extern void __init mpc85xx_smp_init(void);
#endif
static void __init mpc85xx_ds_setup_arch(void) static void __init mpc85xx_ds_setup_arch(void)
{ {
#ifdef CONFIG_PCI #ifdef CONFIG_PCI
...@@ -173,6 +176,10 @@ static void __init mpc85xx_ds_setup_arch(void) ...@@ -173,6 +176,10 @@ static void __init mpc85xx_ds_setup_arch(void)
ppc_md.pci_exclude_device = mpc85xx_exclude_device; ppc_md.pci_exclude_device = mpc85xx_exclude_device;
#endif #endif
#ifdef CONFIG_SMP
mpc85xx_smp_init();
#endif
printk("MPC85xx DS board from Freescale Semiconductor\n"); printk("MPC85xx DS board from Freescale Semiconductor\n");
} }
......
...@@ -58,6 +58,7 @@ smp_85xx_kick_cpu(int nr) ...@@ -58,6 +58,7 @@ smp_85xx_kick_cpu(int nr)
if (cpu_rel_addr == NULL) { if (cpu_rel_addr == NULL) {
printk(KERN_ERR "No cpu-release-addr for cpu %d\n", nr); printk(KERN_ERR "No cpu-release-addr for cpu %d\n", nr);
local_irq_restore(flags);
return; return;
} }
......
...@@ -312,4 +312,15 @@ config MPC8xxx_GPIO ...@@ -312,4 +312,15 @@ config MPC8xxx_GPIO
Say Y here if you're going to use hardware that connects to the Say Y here if you're going to use hardware that connects to the
MPC831x/834x/837x/8572/8610 GPIOs. MPC831x/834x/837x/8572/8610 GPIOs.
config SIMPLE_GPIO
bool "Support for simple, memory-mapped GPIO controllers"
depends on PPC
select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB
help
Say Y here to support simple, memory-mapped GPIO controllers.
These are usually BCSRs used to control board's switches, LEDs,
chip-selects, Ethernet/USB PHY's power and various other small
on-board peripherals.
endmenu endmenu
...@@ -231,7 +231,7 @@ config VIRT_CPU_ACCOUNTING ...@@ -231,7 +231,7 @@ config VIRT_CPU_ACCOUNTING
If in doubt, say Y here. If in doubt, say Y here.
config SMP config SMP
depends on PPC_STD_MMU depends on PPC_STD_MMU || FSL_BOOKE
bool "Symmetric multi-processing support" bool "Symmetric multi-processing support"
---help--- ---help---
This enables support for systems with more than one CPU. If you have This enables support for systems with more than one CPU. If you have
......
...@@ -44,8 +44,8 @@ static DEFINE_SPINLOCK(beat_htab_lock); ...@@ -44,8 +44,8 @@ static DEFINE_SPINLOCK(beat_htab_lock);
static inline unsigned int beat_read_mask(unsigned hpte_group) static inline unsigned int beat_read_mask(unsigned hpte_group)
{ {
unsigned long hpte_v[5];
unsigned long rmask = 0; unsigned long rmask = 0;
u64 hpte_v[5];
beat_read_htab_entries(0, hpte_group + 0, hpte_v); beat_read_htab_entries(0, hpte_group + 0, hpte_v);
if (!(hpte_v[0] & HPTE_V_BOLTED)) if (!(hpte_v[0] & HPTE_V_BOLTED))
...@@ -93,8 +93,7 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group, ...@@ -93,8 +93,7 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group,
int psize, int ssize) int psize, int ssize)
{ {
unsigned long lpar_rc; unsigned long lpar_rc;
unsigned long slot; u64 hpte_v, hpte_r, slot;
unsigned long hpte_v, hpte_r;
/* same as iseries */ /* same as iseries */
if (vflags & HPTE_V_SECONDARY) if (vflags & HPTE_V_SECONDARY)
...@@ -153,8 +152,9 @@ static long beat_lpar_hpte_remove(unsigned long hpte_group) ...@@ -153,8 +152,9 @@ static long beat_lpar_hpte_remove(unsigned long hpte_group)
static unsigned long beat_lpar_hpte_getword0(unsigned long slot) static unsigned long beat_lpar_hpte_getword0(unsigned long slot)
{ {
unsigned long dword0, dword[5]; unsigned long dword0;
unsigned long lpar_rc; unsigned long lpar_rc;
u64 dword[5];
lpar_rc = beat_read_htab_entries(0, slot & ~3UL, dword); lpar_rc = beat_read_htab_entries(0, slot & ~3UL, dword);
...@@ -170,7 +170,7 @@ static void beat_lpar_hptab_clear(void) ...@@ -170,7 +170,7 @@ static void beat_lpar_hptab_clear(void)
unsigned long size_bytes = 1UL << ppc64_pft_size; unsigned long size_bytes = 1UL << ppc64_pft_size;
unsigned long hpte_count = size_bytes >> 4; unsigned long hpte_count = size_bytes >> 4;
int i; int i;
unsigned long dummy0, dummy1; u64 dummy0, dummy1;
/* TODO: Use bulk call */ /* TODO: Use bulk call */
for (i = 0; i < hpte_count; i++) for (i = 0; i < hpte_count; i++)
...@@ -189,7 +189,8 @@ static long beat_lpar_hpte_updatepp(unsigned long slot, ...@@ -189,7 +189,8 @@ static long beat_lpar_hpte_updatepp(unsigned long slot,
int psize, int ssize, int local) int psize, int ssize, int local)
{ {
unsigned long lpar_rc; unsigned long lpar_rc;
unsigned long dummy0, dummy1, want_v; u64 dummy0, dummy1;
unsigned long want_v;
want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M); want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
...@@ -255,7 +256,8 @@ static void beat_lpar_hpte_updateboltedpp(unsigned long newpp, ...@@ -255,7 +256,8 @@ static void beat_lpar_hpte_updateboltedpp(unsigned long newpp,
unsigned long ea, unsigned long ea,
int psize, int ssize) int psize, int ssize)
{ {
unsigned long lpar_rc, slot, vsid, va, dummy0, dummy1; unsigned long lpar_rc, slot, vsid, va;
u64 dummy0, dummy1;
vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M); vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M);
va = (vsid << 28) | (ea & 0x0fffffff); va = (vsid << 28) | (ea & 0x0fffffff);
...@@ -276,7 +278,7 @@ static void beat_lpar_hpte_invalidate(unsigned long slot, unsigned long va, ...@@ -276,7 +278,7 @@ static void beat_lpar_hpte_invalidate(unsigned long slot, unsigned long va,
{ {
unsigned long want_v; unsigned long want_v;
unsigned long lpar_rc; unsigned long lpar_rc;
unsigned long dummy1, dummy2; u64 dummy1, dummy2;
unsigned long flags; unsigned long flags;
DBG_LOW(" inval : slot=%lx, va=%016lx, psize: %d, local: %d\n", DBG_LOW(" inval : slot=%lx, va=%016lx, psize: %d, local: %d\n",
...@@ -315,8 +317,7 @@ static long beat_lpar_hpte_insert_v3(unsigned long hpte_group, ...@@ -315,8 +317,7 @@ static long beat_lpar_hpte_insert_v3(unsigned long hpte_group,
int psize, int ssize) int psize, int ssize)
{ {
unsigned long lpar_rc; unsigned long lpar_rc;
unsigned long slot; u64 hpte_v, hpte_r, slot;
unsigned long hpte_v, hpte_r;
/* same as iseries */ /* same as iseries */
if (vflags & HPTE_V_SECONDARY) if (vflags & HPTE_V_SECONDARY)
......
...@@ -40,8 +40,8 @@ static void udbg_putc_beat(char c) ...@@ -40,8 +40,8 @@ static void udbg_putc_beat(char c)
} }
/* Buffered chars getc */ /* Buffered chars getc */
static long inbuflen; static u64 inbuflen;
static long inbuf[2]; /* must be 2 longs */ static u64 inbuf[2]; /* must be 2 u64s */
static int udbg_getc_poll_beat(void) static int udbg_getc_poll_beat(void)
{ {
......
...@@ -54,7 +54,7 @@ int cbe_cpufreq_set_pmode(int cpu, unsigned int pmode) ...@@ -54,7 +54,7 @@ int cbe_cpufreq_set_pmode(int cpu, unsigned int pmode)
{ {
struct cbe_pmd_regs __iomem *pmd_regs; struct cbe_pmd_regs __iomem *pmd_regs;
struct cbe_mic_tm_regs __iomem *mic_tm_regs; struct cbe_mic_tm_regs __iomem *mic_tm_regs;
u64 flags; unsigned long flags;
u64 value; u64 value;
#ifdef DEBUG #ifdef DEBUG
long time; long time;
......
...@@ -148,7 +148,7 @@ static unsigned int iic_get_irq(void) ...@@ -148,7 +148,7 @@ static unsigned int iic_get_irq(void)
iic = &__get_cpu_var(iic); iic = &__get_cpu_var(iic);
*(unsigned long *) &pending = *(unsigned long *) &pending =
in_be64((unsigned long __iomem *) &iic->regs->pending_destr); in_be64((u64 __iomem *) &iic->regs->pending_destr);
if (!(pending.flags & CBE_IIC_IRQ_VALID)) if (!(pending.flags & CBE_IIC_IRQ_VALID))
return NO_IRQ; return NO_IRQ;
virq = irq_linear_revmap(iic_host, iic_pending_to_hwnum(pending)); virq = irq_linear_revmap(iic_host, iic_pending_to_hwnum(pending));
......
...@@ -130,14 +130,14 @@ static const struct ppc_pci_io __devinitconst iowa_pci_io = { ...@@ -130,14 +130,14 @@ static const struct ppc_pci_io __devinitconst iowa_pci_io = {
}; };
static void __iomem *iowa_ioremap(unsigned long addr, unsigned long size, static void __iomem *iowa_ioremap(phys_addr_t addr, unsigned long size,
unsigned long flags) unsigned long flags)
{ {
struct iowa_bus *bus; struct iowa_bus *bus;
void __iomem *res = __ioremap(addr, size, flags); void __iomem *res = __ioremap(addr, size, flags);
int busno; int busno;
bus = iowa_pci_find(0, addr); bus = iowa_pci_find(0, (unsigned long)addr);
if (bus != NULL) { if (bus != NULL) {
busno = bus - iowa_busses; busno = bus - iowa_busses;
PCI_SET_ADDR_TOKEN(res, busno + 1); PCI_SET_ADDR_TOKEN(res, busno + 1);
......
...@@ -150,8 +150,8 @@ static int cbe_nr_iommus; ...@@ -150,8 +150,8 @@ static int cbe_nr_iommus;
static void invalidate_tce_cache(struct cbe_iommu *iommu, unsigned long *pte, static void invalidate_tce_cache(struct cbe_iommu *iommu, unsigned long *pte,
long n_ptes) long n_ptes)
{ {
unsigned long __iomem *reg; u64 __iomem *reg;
unsigned long val; u64 val;
long n; long n;
reg = iommu->xlate_regs + IOC_IOPT_CacheInvd; reg = iommu->xlate_regs + IOC_IOPT_CacheInvd;
......
...@@ -10,18 +10,21 @@ menu "iSeries device drivers" ...@@ -10,18 +10,21 @@ menu "iSeries device drivers"
config VIODASD config VIODASD
tristate "iSeries Virtual I/O disk support" tristate "iSeries Virtual I/O disk support"
depends on BLOCK depends on BLOCK
select VIOPATH
help help
If you are running on an iSeries system and you want to use If you are running on an iSeries system and you want to use
virtual disks created and managed by OS/400, say Y. virtual disks created and managed by OS/400, say Y.
config VIOCD config VIOCD
tristate "iSeries Virtual I/O CD support" tristate "iSeries Virtual I/O CD support"
select VIOPATH
help help
If you are running Linux on an IBM iSeries system and you want to If you are running Linux on an IBM iSeries system and you want to
read a CD drive owned by OS/400, say Y here. read a CD drive owned by OS/400, say Y here.
config VIOTAPE config VIOTAPE
tristate "iSeries Virtual Tape Support" tristate "iSeries Virtual Tape Support"
select VIOPATH
help help
If you are running Linux on an iSeries system and you want Linux If you are running Linux on an iSeries system and you want Linux
to read and/or write a tape drive owned by OS/400, say Y here. to read and/or write a tape drive owned by OS/400, say Y here.
...@@ -30,5 +33,3 @@ endmenu ...@@ -30,5 +33,3 @@ endmenu
config VIOPATH config VIOPATH
bool bool
depends on VIODASD || VIOCD || VIOTAPE || ISERIES_VETH
default y
...@@ -23,6 +23,7 @@ ...@@ -23,6 +23,7 @@
#include <linux/string.h> #include <linux/string.h>
#include <linux/seq_file.h> #include <linux/seq_file.h>
#include <linux/kdev_t.h> #include <linux/kdev_t.h>
#include <linux/kexec.h>
#include <linux/major.h> #include <linux/major.h>
#include <linux/root_dev.h> #include <linux/root_dev.h>
#include <linux/kernel.h> #include <linux/kernel.h>
...@@ -638,6 +639,13 @@ static int __init iseries_probe(void) ...@@ -638,6 +639,13 @@ static int __init iseries_probe(void)
return 1; return 1;
} }
#ifdef CONFIG_KEXEC
static int iseries_kexec_prepare(struct kimage *image)
{
return -ENOSYS;
}
#endif
define_machine(iseries) { define_machine(iseries) {
.name = "iSeries", .name = "iSeries",
.setup_arch = iSeries_setup_arch, .setup_arch = iSeries_setup_arch,
...@@ -658,6 +666,9 @@ define_machine(iseries) { ...@@ -658,6 +666,9 @@ define_machine(iseries) {
.probe = iseries_probe, .probe = iseries_probe,
.ioremap = iseries_ioremap, .ioremap = iseries_ioremap,
.iounmap = iseries_iounmap, .iounmap = iseries_iounmap,
#ifdef CONFIG_KEXEC
.machine_kexec_prepare = iseries_kexec_prepare,
#endif
/* XXX Implement enable_pmcs for iSeries */ /* XXX Implement enable_pmcs for iSeries */
}; };
......
...@@ -112,7 +112,7 @@ static int get_gizmo_latency(void) ...@@ -112,7 +112,7 @@ static int get_gizmo_latency(void)
static void set_astate(int cpu, unsigned int astate) static void set_astate(int cpu, unsigned int astate)
{ {
u64 flags; unsigned long flags;
/* Return if called before init has run */ /* Return if called before init has run */
if (unlikely(!sdcasr_mapbase)) if (unlikely(!sdcasr_mapbase))
......
...@@ -509,7 +509,7 @@ static void *map_onedev(struct pci_dev *p, int index) ...@@ -509,7 +509,7 @@ static void *map_onedev(struct pci_dev *p, int index)
*/ */
int pasemi_dma_init(void) int pasemi_dma_init(void)
{ {
static spinlock_t init_lock = SPIN_LOCK_UNLOCKED; static DEFINE_SPINLOCK(init_lock);
struct pci_dev *iob_pdev; struct pci_dev *iob_pdev;
struct pci_dev *pdev; struct pci_dev *pdev;
struct resource res; struct resource res;
......
...@@ -661,6 +661,7 @@ static void __init init_second_ohare(void) ...@@ -661,6 +661,7 @@ static void __init init_second_ohare(void)
pci_find_hose_for_OF_device(np); pci_find_hose_for_OF_device(np);
if (!hose) { if (!hose) {
printk(KERN_ERR "Can't find PCI hose for OHare2 !\n"); printk(KERN_ERR "Can't find PCI hose for OHare2 !\n");
of_node_put(np);
return; return;
} }
early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd); early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd);
...@@ -669,6 +670,7 @@ static void __init init_second_ohare(void) ...@@ -669,6 +670,7 @@ static void __init init_second_ohare(void)
early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd); early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd);
} }
has_second_ohare = 1; has_second_ohare = 1;
of_node_put(np);
} }
/* /*
......
...@@ -265,12 +265,15 @@ int __init via_calibrate_decr(void) ...@@ -265,12 +265,15 @@ int __init via_calibrate_decr(void)
struct resource rsrc; struct resource rsrc;
vias = of_find_node_by_name(NULL, "via-cuda"); vias = of_find_node_by_name(NULL, "via-cuda");
if (vias == 0) if (vias == NULL)
vias = of_find_node_by_name(NULL, "via-pmu"); vias = of_find_node_by_name(NULL, "via-pmu");
if (vias == 0) if (vias == NULL)
vias = of_find_node_by_name(NULL, "via"); vias = of_find_node_by_name(NULL, "via");
if (vias == 0 || of_address_to_resource(vias, 0, &rsrc)) if (vias == NULL || of_address_to_resource(vias, 0, &rsrc)) {
of_node_put(vias);
return 0; return 0;
}
of_node_put(vias);
via = ioremap(rsrc.start, rsrc.end - rsrc.start + 1); via = ioremap(rsrc.start, rsrc.end - rsrc.start + 1);
if (via == NULL) { if (via == NULL) {
printk(KERN_ERR "Failed to map VIA for timer calibration !\n"); printk(KERN_ERR "Failed to map VIA for timer calibration !\n");
...@@ -297,7 +300,7 @@ int __init via_calibrate_decr(void) ...@@ -297,7 +300,7 @@ int __init via_calibrate_decr(void)
ppc_tb_freq = (dstart - dend) * 100 / 6; ppc_tb_freq = (dstart - dend) * 100 / 6;
iounmap(via); iounmap(via);
return 1; return 1;
} }
#endif #endif
......
...@@ -518,6 +518,41 @@ static int __init ps3_register_graphics_devices(void) ...@@ -518,6 +518,41 @@ static int __init ps3_register_graphics_devices(void)
return result; return result;
} }
static int __init ps3_register_ramdisk_device(void)
{
int result;
struct layout {
struct ps3_system_bus_device dev;
} *p;
pr_debug(" -> %s:%d\n", __func__, __LINE__);
p = kzalloc(sizeof(struct layout), GFP_KERNEL);
if (!p)
return -ENOMEM;
p->dev.match_id = PS3_MATCH_ID_GPU;
p->dev.match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK;
p->dev.dev_type = PS3_DEVICE_TYPE_IOC0;
result = ps3_system_bus_device_register(&p->dev);
if (result) {
pr_debug("%s:%d ps3_system_bus_device_register failed\n",
__func__, __LINE__);
goto fail_device_register;
}
pr_debug(" <- %s:%d\n", __func__, __LINE__);
return 0;
fail_device_register:
kfree(p);
pr_debug(" <- %s:%d failed\n", __func__, __LINE__);
return result;
}
/** /**
* ps3_setup_dynamic_device - Setup a dynamic device from the repository * ps3_setup_dynamic_device - Setup a dynamic device from the repository
*/ */
...@@ -946,6 +981,8 @@ static int __init ps3_register_devices(void) ...@@ -946,6 +981,8 @@ static int __init ps3_register_devices(void)
ps3_register_lpm_devices(); ps3_register_lpm_devices();
ps3_register_ramdisk_device();
pr_debug(" <- %s:%d\n", __func__, __LINE__); pr_debug(" <- %s:%d\n", __func__, __LINE__);
return 0; return 0;
} }
......
...@@ -17,6 +17,7 @@ obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y) ...@@ -17,6 +17,7 @@ obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
obj-$(CONFIG_FSL_LBC) += fsl_lbc.o obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
obj-$(CONFIG_FSL_GTM) += fsl_gtm.o obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o
obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o
obj-$(CONFIG_RAPIDIO) += fsl_rio.o obj-$(CONFIG_RAPIDIO) += fsl_rio.o
obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
......
...@@ -29,7 +29,8 @@ ...@@ -29,7 +29,8 @@
#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
/* atmu setup for fsl pci/pcie controller */ /* atmu setup for fsl pci/pcie controller */
void __init setup_pci_atmu(struct pci_controller *hose, struct resource *rsrc) static void __init setup_pci_atmu(struct pci_controller *hose,
struct resource *rsrc)
{ {
struct ccsr_pci __iomem *pci; struct ccsr_pci __iomem *pci;
int i; int i;
...@@ -86,7 +87,7 @@ void __init setup_pci_atmu(struct pci_controller *hose, struct resource *rsrc) ...@@ -86,7 +87,7 @@ void __init setup_pci_atmu(struct pci_controller *hose, struct resource *rsrc)
out_be32(&pci->piw[2].piwar, PIWAR_2G); out_be32(&pci->piw[2].piwar, PIWAR_2G);
} }
void __init setup_pci_cmd(struct pci_controller *hose) static void __init setup_pci_cmd(struct pci_controller *hose)
{ {
u16 cmd; u16 cmd;
int cap_x; int cap_x;
...@@ -130,7 +131,7 @@ static void __init quirk_fsl_pcie_header(struct pci_dev *dev) ...@@ -130,7 +131,7 @@ static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
return ; return ;
} }
int __init fsl_pcie_check_link(struct pci_controller *hose) static int __init fsl_pcie_check_link(struct pci_controller *hose)
{ {
u32 val; u32 val;
early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val); early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
......
...@@ -5,8 +5,13 @@ ...@@ -5,8 +5,13 @@
#include <asm/mmu.h> #include <asm/mmu.h>
extern phys_addr_t get_immrbase(void); extern phys_addr_t get_immrbase(void);
#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
extern u32 get_brgfreq(void); extern u32 get_brgfreq(void);
extern u32 get_baudrate(void); extern u32 get_baudrate(void);
#else
static inline u32 get_brgfreq(void) { return -1; }
static inline u32 get_baudrate(void) { return -1; }
#endif
extern u32 fsl_get_sys_freq(void); extern u32 fsl_get_sys_freq(void);
struct spi_board_info; struct spi_board_info;
......
...@@ -22,5 +22,6 @@ config UCC ...@@ -22,5 +22,6 @@ config UCC
config QE_USB config QE_USB
bool bool
default y if USB_GADGET_FSL_QE
help help
QE USB Host Controller support QE USB Controller support
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/err.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_gpio.h> #include <linux/of_gpio.h>
...@@ -24,8 +25,14 @@ struct qe_gpio_chip { ...@@ -24,8 +25,14 @@ struct qe_gpio_chip {
struct of_mm_gpio_chip mm_gc; struct of_mm_gpio_chip mm_gc;
spinlock_t lock; spinlock_t lock;
unsigned long pin_flags[QE_PIO_PINS];
#define QE_PIN_REQUESTED 0
/* shadowed data register to clear/set bits safely */ /* shadowed data register to clear/set bits safely */
u32 cpdata; u32 cpdata;
/* saved_regs used to restore dedicated functions */
struct qe_pio_regs saved_regs;
}; };
static inline struct qe_gpio_chip * static inline struct qe_gpio_chip *
...@@ -40,6 +47,12 @@ static void qe_gpio_save_regs(struct of_mm_gpio_chip *mm_gc) ...@@ -40,6 +47,12 @@ static void qe_gpio_save_regs(struct of_mm_gpio_chip *mm_gc)
struct qe_pio_regs __iomem *regs = mm_gc->regs; struct qe_pio_regs __iomem *regs = mm_gc->regs;
qe_gc->cpdata = in_be32(&regs->cpdata); qe_gc->cpdata = in_be32(&regs->cpdata);
qe_gc->saved_regs.cpdata = qe_gc->cpdata;
qe_gc->saved_regs.cpdir1 = in_be32(&regs->cpdir1);
qe_gc->saved_regs.cpdir2 = in_be32(&regs->cpdir2);
qe_gc->saved_regs.cppar1 = in_be32(&regs->cppar1);
qe_gc->saved_regs.cppar2 = in_be32(&regs->cppar2);
qe_gc->saved_regs.cpodr = in_be32(&regs->cpodr);
} }
static int qe_gpio_get(struct gpio_chip *gc, unsigned int gpio) static int qe_gpio_get(struct gpio_chip *gc, unsigned int gpio)
...@@ -103,6 +116,188 @@ static int qe_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) ...@@ -103,6 +116,188 @@ static int qe_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
return 0; return 0;
} }
struct qe_pin {
/*
* The qe_gpio_chip name is unfortunate, we should change that to
* something like qe_pio_controller. Someday.
*/
struct qe_gpio_chip *controller;
int num;
};
/**
* qe_pin_request - Request a QE pin
* @np: device node to get a pin from
* @index: index of a pin in the device tree
* Context: non-atomic
*
* This function return qe_pin so that you could use it with the rest of
* the QE Pin Multiplexing API.
*/
struct qe_pin *qe_pin_request(struct device_node *np, int index)
{
struct qe_pin *qe_pin;
struct device_node *gc;
struct of_gpio_chip *of_gc = NULL;
struct of_mm_gpio_chip *mm_gc;
struct qe_gpio_chip *qe_gc;
int err;
int size;
const void *gpio_spec;
const u32 *gpio_cells;
unsigned long flags;
qe_pin = kzalloc(sizeof(*qe_pin), GFP_KERNEL);
if (!qe_pin) {
pr_debug("%s: can't allocate memory\n", __func__);
return ERR_PTR(-ENOMEM);
}
err = of_parse_phandles_with_args(np, "gpios", "#gpio-cells", index,
&gc, &gpio_spec);
if (err) {
pr_debug("%s: can't parse gpios property\n", __func__);
goto err0;
}
if (!of_device_is_compatible(gc, "fsl,mpc8323-qe-pario-bank")) {
pr_debug("%s: tried to get a non-qe pin\n", __func__);
err = -EINVAL;
goto err1;
}
of_gc = gc->data;
if (!of_gc) {
pr_debug("%s: gpio controller %s isn't registered\n",
np->full_name, gc->full_name);
err = -ENODEV;
goto err1;
}
gpio_cells = of_get_property(gc, "#gpio-cells", &size);
if (!gpio_cells || size != sizeof(*gpio_cells) ||
*gpio_cells != of_gc->gpio_cells) {
pr_debug("%s: wrong #gpio-cells for %s\n",
np->full_name, gc->full_name);
err = -EINVAL;
goto err1;
}
err = of_gc->xlate(of_gc, np, gpio_spec, NULL);
if (err < 0)
goto err1;
mm_gc = to_of_mm_gpio_chip(&of_gc->gc);
qe_gc = to_qe_gpio_chip(mm_gc);
spin_lock_irqsave(&qe_gc->lock, flags);
if (test_and_set_bit(QE_PIN_REQUESTED, &qe_gc->pin_flags[err]) == 0) {
qe_pin->controller = qe_gc;
qe_pin->num = err;
err = 0;
} else {
err = -EBUSY;
}
spin_unlock_irqrestore(&qe_gc->lock, flags);
if (!err)
return qe_pin;
err1:
of_node_put(gc);
err0:
kfree(qe_pin);
pr_debug("%s failed with status %d\n", __func__, err);
return ERR_PTR(err);
}
EXPORT_SYMBOL(qe_pin_request);
/**
* qe_pin_free - Free a pin
* @qe_pin: pointer to the qe_pin structure
* Context: any
*
* This function frees the qe_pin structure and makes a pin available
* for further qe_pin_request() calls.
*/
void qe_pin_free(struct qe_pin *qe_pin)
{
struct qe_gpio_chip *qe_gc = qe_pin->controller;
unsigned long flags;
const int pin = qe_pin->num;
spin_lock_irqsave(&qe_gc->lock, flags);
test_and_clear_bit(QE_PIN_REQUESTED, &qe_gc->pin_flags[pin]);
spin_unlock_irqrestore(&qe_gc->lock, flags);
kfree(qe_pin);
}
EXPORT_SYMBOL(qe_pin_free);
/**
* qe_pin_set_dedicated - Revert a pin to a dedicated peripheral function mode
* @qe_pin: pointer to the qe_pin structure
* Context: any
*
* This function resets a pin to a dedicated peripheral function that
* has been set up by the firmware.
*/
void qe_pin_set_dedicated(struct qe_pin *qe_pin)
{
struct qe_gpio_chip *qe_gc = qe_pin->controller;
struct qe_pio_regs __iomem *regs = qe_gc->mm_gc.regs;
struct qe_pio_regs *sregs = &qe_gc->saved_regs;
int pin = qe_pin->num;
u32 mask1 = 1 << (QE_PIO_PINS - (pin + 1));
u32 mask2 = 0x3 << (QE_PIO_PINS - (pin % (QE_PIO_PINS / 2) + 1) * 2);
bool second_reg = pin > (QE_PIO_PINS / 2) - 1;
unsigned long flags;
spin_lock_irqsave(&qe_gc->lock, flags);
if (second_reg) {
clrsetbits_be32(&regs->cpdir2, mask2, sregs->cpdir2 & mask2);
clrsetbits_be32(&regs->cppar2, mask2, sregs->cppar2 & mask2);
} else {
clrsetbits_be32(&regs->cpdir1, mask2, sregs->cpdir1 & mask2);
clrsetbits_be32(&regs->cppar1, mask2, sregs->cppar1 & mask2);
}
if (sregs->cpdata & mask1)
qe_gc->cpdata |= mask1;
else
qe_gc->cpdata &= ~mask1;
out_be32(&regs->cpdata, qe_gc->cpdata);
clrsetbits_be32(&regs->cpodr, mask1, sregs->cpodr & mask1);
spin_unlock_irqrestore(&qe_gc->lock, flags);
}
EXPORT_SYMBOL(qe_pin_set_dedicated);
/**
* qe_pin_set_gpio - Set a pin to the GPIO mode
* @qe_pin: pointer to the qe_pin structure
* Context: any
*
* This function sets a pin to the GPIO mode.
*/
void qe_pin_set_gpio(struct qe_pin *qe_pin)
{
struct qe_gpio_chip *qe_gc = qe_pin->controller;
struct qe_pio_regs __iomem *regs = qe_gc->mm_gc.regs;
unsigned long flags;
spin_lock_irqsave(&qe_gc->lock, flags);
/* Let's make it input by default, GPIO API is able to change that. */
__par_io_config_pin(regs, qe_pin->num, QE_PIO_DIR_IN, 0, 0, 0);
spin_unlock_irqrestore(&qe_gc->lock, flags);
}
EXPORT_SYMBOL(qe_pin_set_gpio);
static int __init qe_add_gpiochips(void) static int __init qe_add_gpiochips(void)
{ {
struct device_node *np; struct device_node *np;
......
/*
* Simple Memory-Mapped GPIOs
*
* Copyright (c) MontaVista Software, Inc. 2008.
*
* Author: Anton Vorontsov <avorontsov@ru.mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/types.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_gpio.h>
#include <linux/gpio.h>
#include <asm/prom.h>
#include "simple_gpio.h"
struct u8_gpio_chip {
struct of_mm_gpio_chip mm_gc;
spinlock_t lock;
/* shadowed data register to clear/set bits safely */
u8 data;
};
static struct u8_gpio_chip *to_u8_gpio_chip(struct of_mm_gpio_chip *mm_gc)
{
return container_of(mm_gc, struct u8_gpio_chip, mm_gc);
}
static u8 u8_pin2mask(unsigned int pin)
{
return 1 << (8 - 1 - pin);
}
static int u8_gpio_get(struct gpio_chip *gc, unsigned int gpio)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
return in_8(mm_gc->regs) & u8_pin2mask(gpio);
}
static void u8_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct u8_gpio_chip *u8_gc = to_u8_gpio_chip(mm_gc);
unsigned long flags;
spin_lock_irqsave(&u8_gc->lock, flags);
if (val)
u8_gc->data |= u8_pin2mask(gpio);
else
u8_gc->data &= ~u8_pin2mask(gpio);
out_8(mm_gc->regs, u8_gc->data);
spin_unlock_irqrestore(&u8_gc->lock, flags);
}
static int u8_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
return 0;
}
static int u8_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
u8_gpio_set(gc, gpio, val);
return 0;
}
static void u8_gpio_save_regs(struct of_mm_gpio_chip *mm_gc)
{
struct u8_gpio_chip *u8_gc = to_u8_gpio_chip(mm_gc);
u8_gc->data = in_8(mm_gc->regs);
}
static int __init u8_simple_gpiochip_add(struct device_node *np)
{
int ret;
struct u8_gpio_chip *u8_gc;
struct of_mm_gpio_chip *mm_gc;
struct of_gpio_chip *of_gc;
struct gpio_chip *gc;
u8_gc = kzalloc(sizeof(*u8_gc), GFP_KERNEL);
if (!u8_gc)
return -ENOMEM;
spin_lock_init(&u8_gc->lock);
mm_gc = &u8_gc->mm_gc;
of_gc = &mm_gc->of_gc;
gc = &of_gc->gc;
mm_gc->save_regs = u8_gpio_save_regs;
of_gc->gpio_cells = 2;
gc->ngpio = 8;
gc->direction_input = u8_gpio_dir_in;
gc->direction_output = u8_gpio_dir_out;
gc->get = u8_gpio_get;
gc->set = u8_gpio_set;
ret = of_mm_gpiochip_add(np, mm_gc);
if (ret)
goto err;
return 0;
err:
kfree(u8_gc);
return ret;
}
void __init simple_gpiochip_init(const char *compatible)
{
struct device_node *np;
for_each_compatible_node(np, NULL, compatible) {
int ret;
struct resource r;
ret = of_address_to_resource(np, 0, &r);
if (ret)
goto err;
switch (resource_size(&r)) {
case 1:
ret = u8_simple_gpiochip_add(np);
if (ret)
goto err;
break;
default:
/*
* Whenever you need support for GPIO bank width > 1,
* please just turn u8_ code into huge macros, and
* construct needed uX_ code with it.
*/
ret = -ENOSYS;
goto err;
}
continue;
err:
pr_err("%s: registration failed, status %d\n",
np->full_name, ret);
}
}
#ifndef __SYSDEV_SIMPLE_GPIO_H
#define __SYSDEV_SIMPLE_GPIO_H
#include <linux/errno.h>
#ifdef CONFIG_SIMPLE_GPIO
extern void simple_gpiochip_init(const char *compatible);
#else
static inline void simple_gpiochip_init(const char *compatible) {}
#endif /* CONFIG_SIMPLE_GPIO */
#endif /* __SYSDEV_SIMPLE_GPIO_H */
...@@ -616,6 +616,7 @@ config HVC_ISERIES ...@@ -616,6 +616,7 @@ config HVC_ISERIES
default y default y
select HVC_DRIVER select HVC_DRIVER
select HVC_IRQ select HVC_IRQ
select VIOPATH
help help
iSeries machines support a hypervisor virtual console. iSeries machines support a hypervisor virtual console.
......
...@@ -44,7 +44,7 @@ static int hvc_beat_get_chars(uint32_t vtermno, char *buf, int cnt) ...@@ -44,7 +44,7 @@ static int hvc_beat_get_chars(uint32_t vtermno, char *buf, int cnt)
static unsigned char q[sizeof(unsigned long) * 2] static unsigned char q[sizeof(unsigned long) * 2]
__attribute__((aligned(sizeof(unsigned long)))); __attribute__((aligned(sizeof(unsigned long))));
static int qlen = 0; static int qlen = 0;
unsigned long got; u64 got;
again: again:
if (qlen) { if (qlen) {
...@@ -63,7 +63,7 @@ static int hvc_beat_get_chars(uint32_t vtermno, char *buf, int cnt) ...@@ -63,7 +63,7 @@ static int hvc_beat_get_chars(uint32_t vtermno, char *buf, int cnt)
} }
} }
if (beat_get_term_char(vtermno, &got, if (beat_get_term_char(vtermno, &got,
((unsigned long *)q), ((unsigned long *)q) + 1) == 0) { ((u64 *)q), ((u64 *)q) + 1) == 0) {
qlen = got; qlen = got;
goto again; goto again;
} }
......
...@@ -120,6 +120,13 @@ config MTD_PHRAM ...@@ -120,6 +120,13 @@ config MTD_PHRAM
doesn't have access to, memory beyond the mem=xxx limit, nvram, doesn't have access to, memory beyond the mem=xxx limit, nvram,
memory on the video card, etc... memory on the video card, etc...
config MTD_PS3VRAM
tristate "PS3 video RAM"
depends on FB_PS3
help
This driver allows you to use excess PS3 video RAM as volatile
storage or system swap.
config MTD_LART config MTD_LART
tristate "28F160xx flash driver for LART" tristate "28F160xx flash driver for LART"
depends on SA1100_LART depends on SA1100_LART
......
...@@ -16,3 +16,4 @@ obj-$(CONFIG_MTD_LART) += lart.o ...@@ -16,3 +16,4 @@ obj-$(CONFIG_MTD_LART) += lart.o
obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
obj-$(CONFIG_MTD_M25P80) += m25p80.o obj-$(CONFIG_MTD_M25P80) += m25p80.o
obj-$(CONFIG_MTD_PS3VRAM) += ps3vram.o
This diff is collapsed.
...@@ -884,6 +884,7 @@ config SCSI_IBMVSCSI ...@@ -884,6 +884,7 @@ config SCSI_IBMVSCSI
tristate "IBM Virtual SCSI support" tristate "IBM Virtual SCSI support"
depends on PPC_PSERIES || PPC_ISERIES depends on PPC_PSERIES || PPC_ISERIES
select SCSI_SRP_ATTRS select SCSI_SRP_ATTRS
select VIOPATH if PPC_ISERIES
help help
This is the IBM POWER Virtual SCSI Client This is the IBM POWER Virtual SCSI Client
......
...@@ -1320,13 +1320,30 @@ config SERIAL_NETX_CONSOLE ...@@ -1320,13 +1320,30 @@ config SERIAL_NETX_CONSOLE
config SERIAL_OF_PLATFORM config SERIAL_OF_PLATFORM
tristate "Serial port on Open Firmware platform bus" tristate "Serial port on Open Firmware platform bus"
depends on PPC_OF depends on PPC_OF
depends on SERIAL_8250 depends on SERIAL_8250 || SERIAL_OF_PLATFORM_NWPSERIAL
help help
If you have a PowerPC based system that has serial ports If you have a PowerPC based system that has serial ports
on a platform specific bus, you should enable this option. on a platform specific bus, you should enable this option.
Currently, only 8250 compatible ports are supported, but Currently, only 8250 compatible ports are supported, but
others can easily be added. others can easily be added.
config SERIAL_OF_PLATFORM_NWPSERIAL
tristate "NWP serial port driver"
depends on PPC_OF && PPC_DCR
select SERIAL_OF_PLATFORM
select SERIAL_CORE_CONSOLE
select SERIAL_CORE
help
This driver supports the cell network processor nwp serial
device.
config SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE
bool "Console on NWP serial port"
depends on SERIAL_OF_PLATFORM_NWPSERIAL=y
select SERIAL_CORE_CONSOLE
help
Support for Console on the NWP serial ports.
config SERIAL_QE config SERIAL_QE
tristate "Freescale QUICC Engine serial port support" tristate "Freescale QUICC Engine serial port support"
depends on QUICC_ENGINE depends on QUICC_ENGINE
......
...@@ -72,6 +72,7 @@ obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o ...@@ -72,6 +72,7 @@ obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o
obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o
obj-$(CONFIG_SERIAL_NETX) += netx-serial.o obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o
obj-$(CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL) += nwpserial.o
obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o
obj-$(CONFIG_SERIAL_QE) += ucc_uart.o obj-$(CONFIG_SERIAL_QE) += ucc_uart.o
This diff is collapsed.
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include <linux/serial_core.h> #include <linux/serial_core.h>
#include <linux/serial_8250.h> #include <linux/serial_8250.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/nwpserial.h>
#include <asm/prom.h> #include <asm/prom.h>
...@@ -99,9 +100,16 @@ static int __devinit of_platform_serial_probe(struct of_device *ofdev, ...@@ -99,9 +100,16 @@ static int __devinit of_platform_serial_probe(struct of_device *ofdev,
goto out; goto out;
switch (port_type) { switch (port_type) {
#ifdef CONFIG_SERIAL_8250
case PORT_8250 ... PORT_MAX_8250: case PORT_8250 ... PORT_MAX_8250:
ret = serial8250_register_port(&port); ret = serial8250_register_port(&port);
break; break;
#endif
#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
case PORT_NWPSERIAL:
ret = nwpserial_register_port(&port);
break;
#endif
default: default:
/* need to add code for these */ /* need to add code for these */
case PORT_UNKNOWN: case PORT_UNKNOWN:
...@@ -129,9 +137,16 @@ static int of_platform_serial_remove(struct of_device *ofdev) ...@@ -129,9 +137,16 @@ static int of_platform_serial_remove(struct of_device *ofdev)
{ {
struct of_serial_info *info = ofdev->dev.driver_data; struct of_serial_info *info = ofdev->dev.driver_data;
switch (info->type) { switch (info->type) {
#ifdef CONFIG_SERIAL_8250
case PORT_8250 ... PORT_MAX_8250: case PORT_8250 ... PORT_MAX_8250:
serial8250_unregister_port(info->line); serial8250_unregister_port(info->line);
break; break;
#endif
#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
case PORT_NWPSERIAL:
nwpserial_unregister_port(info->line);
break;
#endif
default: default:
/* need to add code for these */ /* need to add code for these */
break; break;
...@@ -148,6 +163,10 @@ static struct of_device_id __devinitdata of_platform_serial_table[] = { ...@@ -148,6 +163,10 @@ static struct of_device_id __devinitdata of_platform_serial_table[] = {
{ .type = "serial", .compatible = "ns16450", .data = (void *)PORT_16450, }, { .type = "serial", .compatible = "ns16450", .data = (void *)PORT_16450, },
{ .type = "serial", .compatible = "ns16550", .data = (void *)PORT_16550, }, { .type = "serial", .compatible = "ns16550", .data = (void *)PORT_16550, },
{ .type = "serial", .compatible = "ns16750", .data = (void *)PORT_16750, }, { .type = "serial", .compatible = "ns16750", .data = (void *)PORT_16750, },
#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
{ .type = "serial", .compatible = "ibm,qpace-nwp-serial",
.data = (void *)PORT_NWPSERIAL, },
#endif
{ .type = "serial", .data = (void *)PORT_UNKNOWN, }, { .type = "serial", .data = (void *)PORT_UNKNOWN, },
{ /* end of list */ }, { /* end of list */ },
}; };
......
/*
* Serial Port driver for a NWP uart device
*
* Copyright (C) 2008 IBM Corp., Benjamin Krill <ben@codiert.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
*/
#ifndef _NWPSERIAL_H
#define _NWPSERIAL_H
int nwpserial_register_port(struct uart_port *port);
void nwpserial_unregister_port(int line);
#endif /* _NWPSERIAL_H */
...@@ -161,6 +161,9 @@ ...@@ -161,6 +161,9 @@
#define PORT_S3C6400 84 #define PORT_S3C6400 84
/* NWPSERIAL */
#define PORT_NWPSERIAL 85
#ifdef __KERNEL__ #ifdef __KERNEL__
#include <linux/compiler.h> #include <linux/compiler.h>
......
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