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Commit 86327bb8 authored by Mark Brown's avatar Mark Brown
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Merge tags 'renesas-clock-for-v3.16' and 'renesas-boards-for-v3.16' of... 

Merge tags 'renesas-clock-for-v3.16' and 'renesas-boards-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into asoc-rcar

Renesas ARM Based SoC Clock Updates for v3.16

SH Mobile shared clock code
* Introduce shmobile_clk_workaround()

r8a7791 (R-Car M2) SoC
* Rename VSP1_SY clocks to VSP1_S
* Correct the I2C clocks parents

r8a7790 (R-Car H2) SoC
* Remove old style audio clock
* Rename VSP1_(SY|RT) clocks to VSP1_(S|R)
* Fix the I2C clocks parents

r8a7778 (R-Car M1) SoC
* Remove old style audio clock

Renesas ARM Based SoC Boards Updates for v3.16

r8a7791 (R-Car M2) based Koelsch board
* Enable Quad SPI transfers for the SPI FLASH
* Clock workarounds for Ether, I2C, MSIOF, Quad SPI and SDHI
* Use shmobile_clk_workaround()

r8a7790 (R-Car H2) based Lager board
* Enable Quad SPI transfers for the SPI FLASH
* Switch to use dai info for R-Car sound
* Clock workarounds for Ether, MSIOF, MMCIF, Quad SPI and SDHI
* Use shmobile_clk_workaround()

r8a7778 (R-Car M1) based Bock-W board
* Switch to use dai info for R-Car sound
parents c9eaa447 932616ee a09b2f0b
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Showing with 223 additions and 169 deletions
arch/arm/boot/dts/r8a7790.dtsi
View file @ 86327bb8
...@@ -673,7 +673,7 @@ mstp1_clks: mstp1_clks@e6150134 { ...@@ -673,7 +673,7 @@ mstp1_clks: mstp1_clks@e6150134 {
renesas,clock-indices = < renesas,clock-indices = <
R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_RT R8A7790_CLK_VSP1_SY R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
>; >;
clock-output-names = clock-output-names =
"tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
......
arch/arm/boot/dts/r8a7791.dtsi
View file @ 86327bb8
...@@ -688,7 +688,7 @@ mstp1_clks: mstp1_clks@e6150134 { ...@@ -688,7 +688,7 @@ mstp1_clks: mstp1_clks@e6150134 {
renesas,clock-indices = < renesas,clock-indices = <
R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1
R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_SY R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S
>; >;
clock-output-names = clock-output-names =
"tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
......
arch/arm/mach-shmobile/Makefile
View file @ 86327bb8
...@@ -21,8 +21,8 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o ...@@ -21,8 +21,8 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
# Clock objects # Clock objects
ifndef CONFIG_COMMON_CLK
obj-y += clock.o obj-y += clock.o
ifndef CONFIG_COMMON_CLK
obj-$(CONFIG_ARCH_SH7372) += clock-sh7372.o obj-$(CONFIG_ARCH_SH7372) += clock-sh7372.o
obj-$(CONFIG_ARCH_SH73A0) += clock-sh73a0.o obj-$(CONFIG_ARCH_SH73A0) += clock-sh73a0.o
obj-$(CONFIG_ARCH_R8A73A4) += clock-r8a73a4.o obj-$(CONFIG_ARCH_R8A73A4) += clock-r8a73a4.o
......
arch/arm/mach-shmobile/board-bockw.c
View file @ 86327bb8
...@@ -345,24 +345,39 @@ static struct rsnd_ssi_platform_info rsnd_ssi[] = { ...@@ -345,24 +345,39 @@ static struct rsnd_ssi_platform_info rsnd_ssi[] = {
RSND_SSI_UNUSED, /* SSI 0 */ RSND_SSI_UNUSED, /* SSI 0 */
RSND_SSI_UNUSED, /* SSI 1 */ RSND_SSI_UNUSED, /* SSI 1 */
RSND_SSI_UNUSED, /* SSI 2 */ RSND_SSI_UNUSED, /* SSI 2 */
RSND_SSI_SET(1, HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), RSND_SSI_PLAY), RSND_SSI(HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), 0),
RSND_SSI_SET(2, HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE), RSND_SSI(HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
RSND_SSI_SET(0, HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), RSND_SSI_PLAY), RSND_SSI(HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), 0),
RSND_SSI_SET(0, HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0), RSND_SSI(HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0),
RSND_SSI_SET(3, HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), RSND_SSI_PLAY), RSND_SSI(HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), 0),
RSND_SSI_SET(4, HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE), RSND_SSI(HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
}; };
static struct rsnd_scu_platform_info rsnd_scu[9] = { static struct rsnd_src_platform_info rsnd_src[9] = {
{ .flags = 0, }, /* SRU 0 */ RSND_SRC_UNUSED, /* SRU 0 */
{ .flags = 0, }, /* SRU 1 */ RSND_SRC_UNUSED, /* SRU 1 */
{ .flags = 0, }, /* SRU 2 */ RSND_SRC_UNUSED, /* SRU 2 */
{ .flags = RSND_SCU_USE_HPBIF, }, RSND_SRC(0, 0),
{ .flags = RSND_SCU_USE_HPBIF, }, RSND_SRC(0, 0),
{ .flags = RSND_SCU_USE_HPBIF, }, RSND_SRC(0, 0),
{ .flags = RSND_SCU_USE_HPBIF, }, RSND_SRC(0, 0),
{ .flags = RSND_SCU_USE_HPBIF, }, RSND_SRC(0, 0),
{ .flags = RSND_SCU_USE_HPBIF, }, RSND_SRC(0, 0),
};
static struct rsnd_dai_platform_info rsnd_dai[] = {
{
.playback = { .ssi = &rsnd_ssi[5], .src = &rsnd_src[5] },
.capture = { .ssi = &rsnd_ssi[6], .src = &rsnd_src[6] },
}, {
.playback = { .ssi = &rsnd_ssi[3], .src = &rsnd_src[3] },
}, {
.capture = { .ssi = &rsnd_ssi[4], .src = &rsnd_src[4] },
}, {
.playback = { .ssi = &rsnd_ssi[7], .src = &rsnd_src[7] },
}, {
.capture = { .ssi = &rsnd_ssi[8], .src = &rsnd_src[8] },
},
}; };
enum { enum {
...@@ -437,8 +452,10 @@ static struct rcar_snd_info rsnd_info = { ...@@ -437,8 +452,10 @@ static struct rcar_snd_info rsnd_info = {
.flags = RSND_GEN1, .flags = RSND_GEN1,
.ssi_info = rsnd_ssi, .ssi_info = rsnd_ssi,
.ssi_info_nr = ARRAY_SIZE(rsnd_ssi), .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
.scu_info = rsnd_scu, .src_info = rsnd_src,
.scu_info_nr = ARRAY_SIZE(rsnd_scu), .src_info_nr = ARRAY_SIZE(rsnd_src),
.dai_info = rsnd_dai,
.dai_info_nr = ARRAY_SIZE(rsnd_dai),
.start = rsnd_start, .start = rsnd_start,
.stop = rsnd_stop, .stop = rsnd_stop,
}; };
...@@ -591,6 +608,7 @@ static void __init bockw_init(void) ...@@ -591,6 +608,7 @@ static void __init bockw_init(void)
{ {
void __iomem *base; void __iomem *base;
struct clk *clk; struct clk *clk;
struct platform_device *pdev;
int i; int i;
r8a7778_clock_init(); r8a7778_clock_init();
...@@ -673,9 +691,6 @@ static void __init bockw_init(void) ...@@ -673,9 +691,6 @@ static void __init bockw_init(void)
} }
/* for Audio */ /* for Audio */
clk = clk_get(NULL, "audio_clk_b");
clk_set_rate(clk, 24576000);
clk_put(clk);
rsnd_codec_power(5, 1); /* enable ak4642 */ rsnd_codec_power(5, 1); /* enable ak4642 */
platform_device_register_simple( platform_device_register_simple(
...@@ -684,11 +699,15 @@ static void __init bockw_init(void) ...@@ -684,11 +699,15 @@ static void __init bockw_init(void)
platform_device_register_simple( platform_device_register_simple(
"ak4554-adc-dac", 1, NULL, 0); "ak4554-adc-dac", 1, NULL, 0);
platform_device_register_resndata( pdev = platform_device_register_resndata(
&platform_bus, "rcar_sound", -1, &platform_bus, "rcar_sound", -1,
rsnd_resources, ARRAY_SIZE(rsnd_resources), rsnd_resources, ARRAY_SIZE(rsnd_resources),
&rsnd_info, sizeof(rsnd_info)); &rsnd_info, sizeof(rsnd_info));
clk = clk_get(&pdev->dev, "clk_b");
clk_set_rate(clk, 24576000);
clk_put(clk);
for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) { for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
struct platform_device_info cardinfo = { struct platform_device_info cardinfo = {
.parent = &platform_bus, .parent = &platform_bus,
......
arch/arm/mach-shmobile/board-koelsch-reference.c
View file @ 86327bb8
...@@ -19,12 +19,11 @@ ...@@ -19,12 +19,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/dma-mapping.h> #include <linux/dma-mapping.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/platform_data/rcar-du.h> #include <linux/platform_data/rcar-du.h>
#include <mach/clock.h>
#include <mach/common.h> #include <mach/common.h>
#include <mach/irqs.h> #include <mach/irqs.h>
#include <mach/rcar-gen2.h> #include <mach/rcar-gen2.h>
...@@ -82,49 +81,50 @@ static void __init koelsch_add_du_device(void) ...@@ -82,49 +81,50 @@ static void __init koelsch_add_du_device(void)
platform_device_register_full(&info); platform_device_register_full(&info);
} }
static void __init koelsch_add_standard_devices(void) /*
{ * This is a really crude hack to provide clkdev support to platform
/* * devices until they get moved to DT.
* This is a really crude hack to provide clkdev support to the CMT and */
* DU devices until they get moved to DT. static const struct clk_name clk_names[] __initconst = {
*/ { "cmt0", NULL, "sh_cmt.0" },
static const struct clk_name { { "scifa0", NULL, "sh-sci.0" },
const char *clk; { "scifa1", NULL, "sh-sci.1" },
const char *con_id; { "scifb0", NULL, "sh-sci.2" },
const char *dev_id; { "scifb1", NULL, "sh-sci.3" },
} clk_names[] = { { "scifb2", NULL, "sh-sci.4" },
{ "cmt0", NULL, "sh_cmt.0" }, { "scifa2", NULL, "sh-sci.5" },
{ "scifa0", NULL, "sh-sci.0" }, { "scif0", NULL, "sh-sci.6" },
{ "scifa1", NULL, "sh-sci.1" }, { "scif1", NULL, "sh-sci.7" },
{ "scifb0", NULL, "sh-sci.2" }, { "scif2", NULL, "sh-sci.8" },
{ "scifb1", NULL, "sh-sci.3" }, { "scif3", NULL, "sh-sci.9" },
{ "scifb2", NULL, "sh-sci.4" }, { "scif4", NULL, "sh-sci.10" },
{ "scifa2", NULL, "sh-sci.5" }, { "scif5", NULL, "sh-sci.11" },
{ "scif0", NULL, "sh-sci.6" }, { "scifa3", NULL, "sh-sci.12" },
{ "scif1", NULL, "sh-sci.7" }, { "scifa4", NULL, "sh-sci.13" },
{ "scif2", NULL, "sh-sci.8" }, { "scifa5", NULL, "sh-sci.14" },
{ "scif3", NULL, "sh-sci.9" }, { "du0", "du.0", "rcar-du-r8a7791" },
{ "scif4", NULL, "sh-sci.10" }, { "du1", "du.1", "rcar-du-r8a7791" },
{ "scif5", NULL, "sh-sci.11" }, { "lvds0", "lvds.0", "rcar-du-r8a7791" },
{ "scifa3", NULL, "sh-sci.12" }, };
{ "scifa4", NULL, "sh-sci.13" },
{ "scifa5", NULL, "sh-sci.14" },
{ "du0", "du.0", "rcar-du-r8a7791" },
{ "du1", "du.1", "rcar-du-r8a7791" },
{ "lvds0", "lvds.0", "rcar-du-r8a7791" },
};
struct clk *clk;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(clk_names); ++i) { /*
clk = clk_get(NULL, clk_names[i].clk); * This is a really crude hack to work around core platform clock issues
if (!IS_ERR(clk)) { */
clk_register_clkdev(clk, clk_names[i].con_id, static const struct clk_name clk_enables[] __initconst = {
clk_names[i].dev_id); { "ether", NULL, "ee700000.ethernet" },
clk_put(clk); { "i2c2", NULL, "e6530000.i2c" },
} { "msiof0", NULL, "e6e20000.spi" },
} { "qspi_mod", NULL, "e6b10000.spi" },
{ "sdhi0", NULL, "ee100000.sd" },
{ "sdhi1", NULL, "ee140000.sd" },
{ "sdhi2", NULL, "ee160000.sd" },
{ "thermal", NULL, "e61f0000.thermal" },
};
static void __init koelsch_add_standard_devices(void)
{
shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
shmobile_clk_workaround(clk_enables, ARRAY_SIZE(clk_enables), true);
r8a7791_add_dt_devices(); r8a7791_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
......
arch/arm/mach-shmobile/board-koelsch.c
View file @ 86327bb8
...@@ -216,7 +216,7 @@ static const struct spi_board_info spi_info[] __initconst = { ...@@ -216,7 +216,7 @@ static const struct spi_board_info spi_info[] __initconst = {
{ {
.modalias = "m25p80", .modalias = "m25p80",
.platform_data = &spi_flash_data, .platform_data = &spi_flash_data,
.mode = SPI_MODE_0, .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
.max_speed_hz = 30000000, .max_speed_hz = 30000000,
.bus_num = 0, .bus_num = 0,
.chip_select = 0, .chip_select = 0,
......
arch/arm/mach-shmobile/board-lager-reference.c
View file @ 86327bb8
...@@ -18,12 +18,11 @@ ...@@ -18,12 +18,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/dma-mapping.h> #include <linux/dma-mapping.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/platform_data/rcar-du.h> #include <linux/platform_data/rcar-du.h>
#include <mach/clock.h>
#include <mach/common.h> #include <mach/common.h>
#include <mach/irqs.h> #include <mach/irqs.h>
#include <mach/rcar-gen2.h> #include <mach/rcar-gen2.h>
...@@ -86,46 +85,46 @@ static void __init lager_add_du_device(void) ...@@ -86,46 +85,46 @@ static void __init lager_add_du_device(void)
platform_device_register_full(&info); platform_device_register_full(&info);
} }
static void __init lager_add_standard_devices(void) /*
{ * This is a really crude hack to provide clkdev support to platform
/* * devices until they get moved to DT.
* This is a really crude hack to provide clkdev support to platform */
* devices until they get moved to DT. static const struct clk_name clk_names[] __initconst = {
*/ { "cmt0", NULL, "sh_cmt.0" },
static const struct clk_name { { "scifa0", NULL, "sh-sci.0" },
const char *clk; { "scifa1", NULL, "sh-sci.1" },
const char *con_id; { "scifb0", NULL, "sh-sci.2" },
const char *dev_id; { "scifb1", NULL, "sh-sci.3" },
} clk_names[] = { { "scifb2", NULL, "sh-sci.4" },
{ "cmt0", NULL, "sh_cmt.0" }, { "scifa2", NULL, "sh-sci.5" },
{ "scifa0", NULL, "sh-sci.0" }, { "scif0", NULL, "sh-sci.6" },
{ "scifa1", NULL, "sh-sci.1" }, { "scif1", NULL, "sh-sci.7" },
{ "scifb0", NULL, "sh-sci.2" }, { "hscif0", NULL, "sh-sci.8" },
{ "scifb1", NULL, "sh-sci.3" }, { "hscif1", NULL, "sh-sci.9" },
{ "scifb2", NULL, "sh-sci.4" }, { "du0", "du.0", "rcar-du-r8a7790" },
{ "scifa2", NULL, "sh-sci.5" }, { "du1", "du.1", "rcar-du-r8a7790" },
{ "scif0", NULL, "sh-sci.6" }, { "du2", "du.2", "rcar-du-r8a7790" },
{ "scif1", NULL, "sh-sci.7" }, { "lvds0", "lvds.0", "rcar-du-r8a7790" },
{ "hscif0", NULL, "sh-sci.8" }, { "lvds1", "lvds.1", "rcar-du-r8a7790" },
{ "hscif1", NULL, "sh-sci.9" }, };
{ "du0", "du.0", "rcar-du-r8a7790" },
{ "du1", "du.1", "rcar-du-r8a7790" },
{ "du2", "du.2", "rcar-du-r8a7790" },
{ "lvds0", "lvds.0", "rcar-du-r8a7790" },
{ "lvds1", "lvds.1", "rcar-du-r8a7790" },
};
struct clk *clk;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(clk_names); ++i) { /*
clk = clk_get(NULL, clk_names[i].clk); * This is a really crude hack to work around core platform clock issues
if (!IS_ERR(clk)) { */
clk_register_clkdev(clk, clk_names[i].con_id, static const struct clk_name clk_enables[] __initconst = {
clk_names[i].dev_id); { "ether", NULL, "ee700000.ethernet" },
clk_put(clk); { "msiof1", NULL, "e6e10000.spi" },
} { "mmcif1", NULL, "ee220000.mmc" },
} { "qspi_mod", NULL, "e6b10000.spi" },
{ "sdhi0", NULL, "ee100000.sd" },
{ "sdhi2", NULL, "ee140000.sd" },
{ "thermal", NULL, "e61f0000.thermal" },
};
static void __init lager_add_standard_devices(void)
{
shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
shmobile_clk_workaround(clk_enables, ARRAY_SIZE(clk_enables), true);
r8a7790_add_dt_devices(); r8a7790_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
......
arch/arm/mach-shmobile/board-lager.c
View file @ 86327bb8
...@@ -325,12 +325,12 @@ static const struct rspi_plat_data qspi_pdata __initconst = { ...@@ -325,12 +325,12 @@ static const struct rspi_plat_data qspi_pdata __initconst = {
static const struct spi_board_info spi_info[] __initconst = { static const struct spi_board_info spi_info[] __initconst = {
{ {
.modalias = "m25p80", .modalias = "m25p80",
.platform_data = &spi_flash_data, .platform_data = &spi_flash_data,
.mode = SPI_MODE_0, .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
.max_speed_hz = 30000000, .max_speed_hz = 30000000,
.bus_num = 0, .bus_num = 0,
.chip_select = 0, .chip_select = 0,
}, },
}; };
...@@ -567,20 +567,27 @@ static struct resource rsnd_resources[] __initdata = { ...@@ -567,20 +567,27 @@ static struct resource rsnd_resources[] __initdata = {
}; };
static struct rsnd_ssi_platform_info rsnd_ssi[] = { static struct rsnd_ssi_platform_info rsnd_ssi[] = {
RSND_SSI_SET(0, 0, gic_spi(370), RSND_SSI_PLAY), RSND_SSI(0, gic_spi(370), 0),
RSND_SSI_SET(0, 0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE), RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
}; };
static struct rsnd_scu_platform_info rsnd_scu[2] = { static struct rsnd_src_platform_info rsnd_src[2] = {
/* no member at this point */ /* no member at this point */
}; };
static struct rsnd_dai_platform_info rsnd_dai = {
.playback = { .ssi = &rsnd_ssi[0], },
.capture = { .ssi = &rsnd_ssi[1], },
};
static struct rcar_snd_info rsnd_info = { static struct rcar_snd_info rsnd_info = {
.flags = RSND_GEN2, .flags = RSND_GEN2,
.ssi_info = rsnd_ssi, .ssi_info = rsnd_ssi,
.ssi_info_nr = ARRAY_SIZE(rsnd_ssi), .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
.scu_info = rsnd_scu, .src_info = rsnd_src,
.scu_info_nr = ARRAY_SIZE(rsnd_scu), .src_info_nr = ARRAY_SIZE(rsnd_src),
.dai_info = &rsnd_dai,
.dai_info_nr = 1,
}; };
static struct asoc_simple_card_info rsnd_card_info = { static struct asoc_simple_card_info rsnd_card_info = {
......
arch/arm/mach-shmobile/clock-r8a7778.c
View file @ 86327bb8
...@@ -175,10 +175,6 @@ static struct clk mstp_clks[MSTP_NR] = { ...@@ -175,10 +175,6 @@ static struct clk mstp_clks[MSTP_NR] = {
static struct clk_lookup lookups[] = { static struct clk_lookup lookups[] = {
/* main */ /* main */
CLKDEV_CON_ID("audio_clk_a", &audio_clk_a),
CLKDEV_CON_ID("audio_clk_b", &audio_clk_b),
CLKDEV_CON_ID("audio_clk_c", &audio_clk_c),
CLKDEV_CON_ID("audio_clk_internal", &s1_clk),
CLKDEV_CON_ID("shyway_clk", &s_clk), CLKDEV_CON_ID("shyway_clk", &s_clk),
CLKDEV_CON_ID("peripheral_clk", &p_clk), CLKDEV_CON_ID("peripheral_clk", &p_clk),
...@@ -234,15 +230,15 @@ static struct clk_lookup lookups[] = { ...@@ -234,15 +230,15 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]), CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]),
CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]), CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]),
CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]), CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]),
CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP531]), CLKDEV_ICK_ID("src.0", "rcar_sound", &mstp_clks[MSTP531]),
CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP530]), CLKDEV_ICK_ID("src.1", "rcar_sound", &mstp_clks[MSTP530]),
CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP529]), CLKDEV_ICK_ID("src.2", "rcar_sound", &mstp_clks[MSTP529]),
CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP528]), CLKDEV_ICK_ID("src.3", "rcar_sound", &mstp_clks[MSTP528]),
CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP527]), CLKDEV_ICK_ID("src.4", "rcar_sound", &mstp_clks[MSTP527]),
CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP526]), CLKDEV_ICK_ID("src.5", "rcar_sound", &mstp_clks[MSTP526]),
CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP525]), CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP525]),
CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP524]), CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP524]),
CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP523]), CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP523]),
}; };
void __init r8a7778_clock_init(void) void __init r8a7778_clock_init(void)
......
arch/arm/mach-shmobile/clock-r8a7790.c
View file @ 86327bb8
...@@ -249,10 +249,10 @@ static struct clk mstp_clks[MSTP_NR] = { ...@@ -249,10 +249,10 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP1007] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 7, MSTPSR10, 0), /* SSI8 */ [MSTP1007] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 7, MSTPSR10, 0), /* SSI8 */
[MSTP1006] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 6, MSTPSR10, 0), /* SSI9 */ [MSTP1006] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 6, MSTPSR10, 0), /* SSI9 */
[MSTP1005] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 5, MSTPSR10, 0), /* SSI ALL */ [MSTP1005] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 5, MSTPSR10, 0), /* SSI ALL */
[MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */ [MSTP931] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
[MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */ [MSTP930] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
[MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */ [MSTP929] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
[MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */ [MSTP928] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
[MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */ [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
[MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */ [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
[MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */ [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
...@@ -294,10 +294,6 @@ static struct clk mstp_clks[MSTP_NR] = { ...@@ -294,10 +294,6 @@ static struct clk mstp_clks[MSTP_NR] = {
static struct clk_lookup lookups[] = { static struct clk_lookup lookups[] = {
/* main clocks */ /* main clocks */
CLKDEV_CON_ID("audio_clk_a", &audio_clk_a),
CLKDEV_CON_ID("audio_clk_b", &audio_clk_b),
CLKDEV_CON_ID("audio_clk_c", &audio_clk_c),
CLKDEV_CON_ID("audio_clk_internal", &m2_clk),
CLKDEV_CON_ID("extal", &extal_clk), CLKDEV_CON_ID("extal", &extal_clk),
CLKDEV_CON_ID("extal_div2", &extal_div2_clk), CLKDEV_CON_ID("extal_div2", &extal_div2_clk),
CLKDEV_CON_ID("main", &main_clk), CLKDEV_CON_ID("main", &main_clk),
...@@ -381,16 +377,16 @@ static struct clk_lookup lookups[] = { ...@@ -381,16 +377,16 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b), CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b),
CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c), CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c),
CLKDEV_ICK_ID("clk_i", "rcar_sound", &m2_clk), CLKDEV_ICK_ID("clk_i", "rcar_sound", &m2_clk),
CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP1031]), CLKDEV_ICK_ID("src.0", "rcar_sound", &mstp_clks[MSTP1031]),
CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP1030]), CLKDEV_ICK_ID("src.1", "rcar_sound", &mstp_clks[MSTP1030]),
CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP1029]), CLKDEV_ICK_ID("src.2", "rcar_sound", &mstp_clks[MSTP1029]),
CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP1028]), CLKDEV_ICK_ID("src.3", "rcar_sound", &mstp_clks[MSTP1028]),
CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP1027]), CLKDEV_ICK_ID("src.4", "rcar_sound", &mstp_clks[MSTP1027]),
CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP1026]), CLKDEV_ICK_ID("src.5", "rcar_sound", &mstp_clks[MSTP1026]),
CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP1025]), CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP1025]),
CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP1024]), CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP1024]),
CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP1023]), CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP1023]),
CLKDEV_ICK_ID("scu.9", "rcar_sound", &mstp_clks[MSTP1022]), CLKDEV_ICK_ID("src.9", "rcar_sound", &mstp_clks[MSTP1022]),
CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]), CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]),
CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]), CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]),
CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]), CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]),
......
arch/arm/mach-shmobile/clock-r8a7791.c
View file @ 86327bb8
...@@ -25,6 +25,7 @@ ...@@ -25,6 +25,7 @@
#include <linux/clkdev.h> #include <linux/clkdev.h>
#include <mach/clock.h> #include <mach/clock.h>
#include <mach/common.h> #include <mach/common.h>
#include <mach/rcar-gen2.h>
/* /*
* MD EXTAL PLL0 PLL1 PLL3 * MD EXTAL PLL0 PLL1 PLL3
...@@ -43,8 +44,6 @@ ...@@ -43,8 +44,6 @@
* see "p1 / 2" on R8A7791_CLOCK_ROOT() below * see "p1 / 2" on R8A7791_CLOCK_ROOT() below
*/ */
#define MD(nr) (1 << nr)
#define CPG_BASE 0xe6150000 #define CPG_BASE 0xe6150000
#define CPG_LEN 0x1000 #define CPG_LEN 0x1000
...@@ -68,7 +67,6 @@ ...@@ -68,7 +67,6 @@
#define MSTPSR9 IOMEM(0xe61509a4) #define MSTPSR9 IOMEM(0xe61509a4)
#define MSTPSR11 IOMEM(0xe61509ac) #define MSTPSR11 IOMEM(0xe61509ac)
#define MODEMR 0xE6160060
#define SDCKCR 0xE6150074 #define SDCKCR 0xE6150074
#define SD1CKCR 0xE6150078 #define SD1CKCR 0xE6150078
#define SD2CKCR 0xE615026c #define SD2CKCR 0xE615026c
...@@ -190,12 +188,12 @@ static struct clk mstp_clks[MSTP_NR] = { ...@@ -190,12 +188,12 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP1108] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 8, MSTPSR11, 0), /* SCIFA5 */ [MSTP1108] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 8, MSTPSR11, 0), /* SCIFA5 */
[MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA4 */ [MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA4 */
[MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA3 */ [MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA3 */
[MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */ [MSTP931] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
[MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */ [MSTP930] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
[MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */ [MSTP929] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
[MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */ [MSTP928] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
[MSTP927] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */ [MSTP927] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */
[MSTP925] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */ [MSTP925] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */
[MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */ [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
[MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */ [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
[MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */ [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
...@@ -295,14 +293,9 @@ static struct clk_lookup lookups[] = { ...@@ -295,14 +293,9 @@ static struct clk_lookup lookups[] = {
void __init r8a7791_clock_init(void) void __init r8a7791_clock_init(void)
{ {
void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE); u32 mode = rcar_gen2_read_mode_pins();
u32 mode;
int k, ret = 0; int k, ret = 0;
BUG_ON(!modemr);
mode = ioread32(modemr);
iounmap(modemr);
switch (mode & (MD(14) | MD(13))) { switch (mode & (MD(14) | MD(13))) {
case 0: case 0:
R8A7791_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88); R8A7791_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
......
arch/arm/mach-shmobile/clock.c
View file @ 86327bb8
...@@ -21,6 +21,32 @@ ...@@ -21,6 +21,32 @@
*/ */
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/init.h> #include <linux/init.h>
#ifdef CONFIG_COMMON_CLK
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <mach/clock.h>
void __init shmobile_clk_workaround(const struct clk_name *clks,
int nr_clks, bool enable)
{
const struct clk_name *clkn;
struct clk *clk;
unsigned int i;
for (i = 0; i < nr_clks; ++i) {
clkn = clks + i;
clk = clk_get(NULL, clkn->clk);
if (!IS_ERR(clk)) {
clk_register_clkdev(clk, clkn->con_id, clkn->dev_id);
if (enable)
clk_prepare_enable(clk);
clk_put(clk);
}
}
}
#else /* CONFIG_COMMON_CLK */
#include <linux/sh_clk.h> #include <linux/sh_clk.h>
#include <linux/export.h> #include <linux/export.h>
#include <mach/clock.h> #include <mach/clock.h>
...@@ -58,3 +84,5 @@ void __clk_put(struct clk *clk) ...@@ -58,3 +84,5 @@ void __clk_put(struct clk *clk)
{ {
} }
EXPORT_SYMBOL(__clk_put); EXPORT_SYMBOL(__clk_put);
#endif /* CONFIG_COMMON_CLK */
arch/arm/mach-shmobile/include/mach/clock.h
View file @ 86327bb8
#ifndef CLOCK_H #ifndef CLOCK_H
#define CLOCK_H #define CLOCK_H
#ifdef CONFIG_COMMON_CLK
/* temporary clock configuration helper for platform devices */
struct clk_name {
const char *clk;
const char *con_id;
const char *dev_id;
};
void shmobile_clk_workaround(const struct clk_name *clks, int nr_clks,
bool enable);
#else /* CONFIG_COMMON_CLK */
/* legacy clock implementation */
unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk); unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk);
extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops; extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops;
...@@ -36,4 +51,5 @@ do { \ ...@@ -36,4 +51,5 @@ do { \
(p)->div = d; \ (p)->div = d; \
} while (0) } while (0)
#endif /* CONFIG_COMMON_CLK */
#endif #endif
include/dt-bindings/clock/r8a7790-clock.h
View file @ 86327bb8
...@@ -33,8 +33,8 @@ ...@@ -33,8 +33,8 @@
#define R8A7790_CLK_TMU0 25 #define R8A7790_CLK_TMU0 25
#define R8A7790_CLK_VSP1_DU1 27 #define R8A7790_CLK_VSP1_DU1 27
#define R8A7790_CLK_VSP1_DU0 28 #define R8A7790_CLK_VSP1_DU0 28
#define R8A7790_CLK_VSP1_RT 30 #define R8A7790_CLK_VSP1_R 30
#define R8A7790_CLK_VSP1_SY 31 #define R8A7790_CLK_VSP1_S 31
/* MSTP2 */ /* MSTP2 */
#define R8A7790_CLK_SCIFA2 2 #define R8A7790_CLK_SCIFA2 2
......
include/dt-bindings/clock/r8a7791-clock.h
View file @ 86327bb8
...@@ -32,7 +32,7 @@ ...@@ -32,7 +32,7 @@
#define R8A7791_CLK_TMU0 25 #define R8A7791_CLK_TMU0 25
#define R8A7791_CLK_VSP1_DU1 27 #define R8A7791_CLK_VSP1_DU1 27
#define R8A7791_CLK_VSP1_DU0 28 #define R8A7791_CLK_VSP1_DU0 28
#define R8A7791_CLK_VSP1_SY 31 #define R8A7791_CLK_VSP1_S 31
/* MSTP2 */ /* MSTP2 */
#define R8A7791_CLK_SCIFA2 2 #define R8A7791_CLK_SCIFA2 2
......
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