Commit 886a862d authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Felix Fietkau

mt76: mt7663: fix mt7615_mac_cca_stats_reset routine

Fix PHYMUX_5 register definition for mt7663 in
mt7615_mac_cca_stats_reset routine

Fixes: f40ac0f3 ("mt76: mt7615: introduce mt7663e support")
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent aef16345
...@@ -1576,8 +1576,14 @@ void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy) ...@@ -1576,8 +1576,14 @@ void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy)
{ {
struct mt7615_dev *dev = phy->dev; struct mt7615_dev *dev = phy->dev;
bool ext_phy = phy != &dev->phy; bool ext_phy = phy != &dev->phy;
u32 reg = MT_WF_PHY_R0_PHYMUX_5(ext_phy); u32 reg;
if (is_mt7663(&dev->mt76))
reg = MT7663_WF_PHY_R0_PHYMUX_5;
else
reg = MT_WF_PHY_R0_PHYMUX_5(ext_phy);
/* reset PD and MDRDY counters */
mt76_clear(dev, reg, GENMASK(22, 20)); mt76_clear(dev, reg, GENMASK(22, 20));
mt76_set(dev, reg, BIT(22) | BIT(20)); mt76_set(dev, reg, BIT(22) | BIT(20));
} }
......
...@@ -151,6 +151,7 @@ enum mt7615_reg_base { ...@@ -151,6 +151,7 @@ enum mt7615_reg_base {
#define MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN BIT(9) #define MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN BIT(9)
#define MT_WF_PHY_R0_PHYMUX_5(_phy) MT_WF_PHY(0x0614 + ((_phy) << 9)) #define MT_WF_PHY_R0_PHYMUX_5(_phy) MT_WF_PHY(0x0614 + ((_phy) << 9))
#define MT7663_WF_PHY_R0_PHYMUX_5 MT_WF_PHY(0x0414)
#define MT_WF_PHY_R0_PHYCTRL_STS0(_phy) MT_WF_PHY(0x020c + ((_phy) << 9)) #define MT_WF_PHY_R0_PHYCTRL_STS0(_phy) MT_WF_PHY(0x020c + ((_phy) << 9))
#define MT_WF_PHYCTRL_STAT_PD_OFDM GENMASK(31, 16) #define MT_WF_PHYCTRL_STAT_PD_OFDM GENMASK(31, 16)
......
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