Commit 89f1b1c6 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven

clk: renesas: Add r8a7795 ES2.0 CPG Core Clock Definitions

Add all R-Car H3 ES2.0 Clock Pulse Generator Core Clock Outputs, as
listed in Table 8.2a ("List of Clocks [R-Car H3]") of the R-Car Gen3
Hardware User's Manual rev. 0.53E.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 48d0341e
...@@ -60,4 +60,11 @@ ...@@ -60,4 +60,11 @@
#define R8A7795_CLK_R 45 #define R8A7795_CLK_R 45
#define R8A7795_CLK_OSC 46 #define R8A7795_CLK_OSC 46
/* r8a7795 ES2.0 CPG Core Clocks */
#define R8A7795_CLK_S0D2 47
#define R8A7795_CLK_S0D3 48
#define R8A7795_CLK_S0D6 49
#define R8A7795_CLK_S0D8 50
#define R8A7795_CLK_S0D12 51
#endif /* __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__ */ #endif /* __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__ */
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