Commit 8cd3936e authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: ni_tio_internal.h: replace NITIO_Gi_DMA_Status_Reg()

The "DMA Status" registers are sequential in the enum ni_gpct_register.
Replace this inline CamelCase function with a simple define.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 1dd26c21
......@@ -35,21 +35,7 @@
#define NITIO_STATUS1_REG(x) (NITIO_G01_STATUS1 + ((x) / 2))
#define NITIO_STATUS2_REG(x) (NITIO_G01_STATUS2 + ((x) / 2))
#define NITIO_DMA_CFG_REG(x) (NITIO_G0_DMA_CFG + (x))
static inline enum ni_gpct_register NITIO_Gi_DMA_Status_Reg(unsigned idx)
{
switch (idx) {
case 0:
return NITIO_G0_DMA_STATUS;
case 1:
return NITIO_G1_DMA_STATUS;
case 2:
return NITIO_G2_DMA_STATUS;
case 3:
return NITIO_G3_DMA_STATUS;
}
return 0;
}
#define NITIO_DMA_STATUS_REG(x) (NITIO_G0_DMA_STATUS + (x))
static inline enum ni_gpct_register NITIO_Gi_ABZ_Reg(unsigned idx)
{
......
......@@ -443,7 +443,7 @@ void ni_tio_handle_interrupt(struct ni_gpct *counter,
case ni_gpct_variant_m_series:
case ni_gpct_variant_660x:
if (read_register(counter,
NITIO_Gi_DMA_Status_Reg
NITIO_DMA_STATUS_REG
(counter->counter_index)) & Gi_DRQ_Error_Bit) {
dev_notice(counter->counter_dev->dev->class_dev,
"%s: Gi_DRQ_Error detected.\n", __func__);
......
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