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Commit 942798b4 authored by Mithlesh Thukral's avatar Mithlesh Thukral Committed by Greg Kroah-Hartman
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Staging: sxg: Typedef removal - pending work 

This patch removes all typedefs in the code. These were the typedefs
which are still present in driver in staging tree after the cleanup patches.
Signed-off-by: default avatarLinSysSoft Sahara Team <saharaproj@linsyssoft.com>
Signed-off-by: default avatarChristopher Harrer <charrer@alacritech.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 1323e5f1
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Showing with 280 additions and 330 deletions
drivers/staging/sxg/sxg.c
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drivers/staging/sxg/sxg.h
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drivers/staging/sxg/sxg_os.h
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......@@ -44,9 +44,9 @@
#define FALSE (0)
#define TRUE (1)
struct LIST_ENTRY {
struct LIST_ENTRY *nle_flink;
struct LIST_ENTRY *nle_blink;
struct list_entry {
struct list_entry *nle_flink;
struct list_entry *nle_blink;
};
#define InitializeListHead(l) \
......@@ -68,10 +68,10 @@ struct LIST_ENTRY {
/* These two have to be inlined since they return things. */
static __inline struct LIST_ENTRY *RemoveHeadList(struct LIST_ENTRY *l)
static __inline struct list_entry *RemoveHeadList(struct list_entry *l)
{
struct LIST_ENTRY *f;
struct LIST_ENTRY *e;
struct list_entry *f;
struct list_entry *e;
e = l->nle_flink;
f = e->nle_flink;
......@@ -81,10 +81,10 @@ static __inline struct LIST_ENTRY *RemoveHeadList(struct LIST_ENTRY *l)
return (e);
}
static __inline struct LIST_ENTRY *RemoveTailList(struct LIST_ENTRY *l)
static __inline struct list_entry *RemoveTailList(struct list_entry *l)
{
struct LIST_ENTRY *b;
struct LIST_ENTRY *e;
struct list_entry *b;
struct list_entry *e;
e = l->nle_blink;
b = e->nle_blink;
......@@ -96,7 +96,7 @@ static __inline struct LIST_ENTRY *RemoveTailList(struct LIST_ENTRY *l)
#define InsertTailList(l, e) \
do { \
struct LIST_ENTRY *b; \
struct list_entry *b; \
\
b = (l)->nle_blink; \
(e)->nle_flink = (l); \
......@@ -107,7 +107,7 @@ static __inline struct LIST_ENTRY *RemoveTailList(struct LIST_ENTRY *l)
#define InsertHeadList(l, e) \
do { \
struct LIST_ENTRY *f; \
struct list_entry *f; \
\
f = (l)->nle_flink; \
(e)->nle_flink = f; \
......
drivers/staging/sxg/sxgdbg.h
View file @ 942798b4
......@@ -79,7 +79,7 @@
extern ulong ATKTimerDiv;
/*
* trace_entry_t -
* trace_entry -
*
* This structure defines an entry in the trace buffer. The
* first few fields mean the same from entry to entry, while
......@@ -87,7 +87,7 @@ extern ulong ATKTimerDiv;
* needs of the trace entry. Typically they are function call
* parameters.
*/
struct trace_entry_t {
struct trace_entry {
char name[8]; /* 8 character name - like 's'i'm'b'a'r'c'v' */
u32 time; /* Current clock tic */
unsigned char cpu; /* Current CPU */
......@@ -101,7 +101,7 @@ struct trace_entry_t {
};
/*
* Driver types for driver field in trace_entry_t
* Driver types for driver field in struct trace_entry
*/
#define TRACE_SXG 1
#define TRACE_VPCI 2
......@@ -109,12 +109,12 @@ struct trace_entry_t {
#define TRACE_ENTRIES 1024
struct sxg_trace_buffer_t {
struct sxg_trace_buffer {
unsigned int size; /* aid for windbg extension */
unsigned int in; /* Where to add */
unsigned int level; /* Current Trace level */
spinlock_t lock; /* For MP tracing */
struct trace_entry_t entries[TRACE_ENTRIES];/* The circular buffer */
struct trace_entry entries[TRACE_ENTRIES];/* The circular buffer */
};
/*
......@@ -137,7 +137,7 @@ struct sxg_trace_buffer_t {
#if ATK_TRACE_ENABLED
#define SXG_TRACE_INIT(buffer, tlevel) \
{ \
memset((buffer), 0, sizeof(struct sxg_trace_buffer_t)); \
memset((buffer), 0, sizeof(struct sxg_trace_buffer)); \
(buffer)->level = (tlevel); \
(buffer)->size = TRACE_ENTRIES; \
spin_lock_init(&(buffer)->lock); \
......@@ -154,7 +154,7 @@ struct sxg_trace_buffer_t {
if ((buffer) && ((buffer)->level >= (tlevel))) { \
unsigned int trace_irql = 0; /* ?????? FIX THIS */ \
unsigned int trace_len; \
struct trace_entry_t *trace_entry; \
struct trace_entry *trace_entry; \
struct timeval timev; \
\
spin_lock(&(buffer)->lock); \
......
drivers/staging/sxg/sxghif.h
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drivers/staging/sxg/sxghw.h
View file @ 942798b4
......@@ -48,7 +48,7 @@
#define SXG_HWREG_MEMSIZE 0x4000 // 16k
#pragma pack(push, 1)
struct SXG_HW_REGS {
struct sxg_hw_regs {
u32 Reset; // Write 0xdead to invoke soft reset
u32 Pad1; // No register defined at offset 4
u32 InterruptMask0; // Deassert legacy interrupt on function 0
......@@ -240,7 +240,7 @@ struct SXG_HW_REGS {
#define XMT_CONFIG_INITIAL_IPID 0x0000FFFF // Initial IPID
/***************************************************************************
* A-XGMAC Registers - Occupy 0x80 - 0xD4 of the SXG_HW_REGS
* A-XGMAC Registers - Occupy 0x80 - 0xD4 of the struct sxg_hw_regs
*
* Full register descriptions can be found in axgmac.pdf
***************************************************************************/
......@@ -524,7 +524,7 @@ struct SXG_HW_REGS {
#define XS_LANE_ALIGN 0x1000 // XS transmit lanes aligned
// PHY Microcode download data structure
struct PHY_UCODE {
struct phy_ucode {
ushort Addr;
ushort Data;
};
......@@ -557,7 +557,7 @@ struct PHY_UCODE {
// all commands - see the Sahara spec for details. Note that this structure is
// only valid when compiled on a little endian machine.
#pragma pack(push, 1)
struct XMT_DESC {
struct xmt_desc {
ushort XmtLen; // word 0, bits [15:0] - transmit length
unsigned char XmtCtl; // word 0, bits [23:16] - transmit control byte
unsigned char Cmd; // word 0, bits [31:24] - transmit command plus misc.
......@@ -574,7 +574,7 @@ struct XMT_DESC {
};
#pragma pack(pop)
// XMT_DESC Cmd byte definitions
// struct xmt_desc Cmd byte definitions
// command codes
#define XMT_DESC_CMD_RAW_SEND 0 // raw send descriptor
#define XMT_DESC_CMD_CSUM_INSERT 1 // checksum insert descriptor
......@@ -587,7 +587,7 @@ struct XMT_DESC {
#define XMT_FORMAT (XMT_DESC_CMD_FORMAT << XMT_DESC_CMD_CODE_SHFT)
#define XMT_PRIME (XMT_DESC_CMD_PRIME << XMT_DESC_CMD_CODE_SHFT)
// XMT_DESC Control Byte (XmtCtl) definitions
// struct xmt_desc Control Byte (XmtCtl) definitions
// NOTE: These bits do not work on Sahara (Rev A)!
#define XMT_CTL_PAUSE_FRAME 0x80 // current frame is a pause control frame (for statistics)
#define XMT_CTL_CONTROL_FRAME 0x40 // current frame is a control frame (for statistics)
......@@ -602,7 +602,7 @@ struct XMT_DESC {
#define XMT_CTL_DELAY_FCS_2 0x02 // delay FCS calculation by 2 (4-byte) words
#define XMT_CTL_DELAY_FCS_3 0x03 // delay FCS calculation by 3 (4-byte) words
// XMT_DESC XmtBufId definition
// struct xmt_desc XmtBufId definition
#define XMT_BUF_ID_SHFT 8 // The Xmt buffer ID is formed by dividing
// the buffer (DRAM) address by 256 (or << 8)
......@@ -620,7 +620,7 @@ struct XMT_DESC {
// Format of the 18 byte Receive Buffer returned by the
// Receive Sequencer for received packets
#pragma pack(push, 1)
struct RCV_BUF_HDR {
struct rcv_buf_hdr {
u32 Status; // Status word from Rcv Seq Parser
ushort Length; // Rcv packet byte count
union {
......@@ -702,24 +702,24 @@ struct RCV_BUF_HDR {
#pragma pack(push, 1)
// Structure for an element of H/W configuration data.
// Read by the Sahara hardware
struct HW_CFG_DATA {
struct hw_cfg_data {
ushort Addr;
ushort Data;
};
// Number of HW_CFG_DATA structures to put in the configuration data
// data structure (SXG_CONFIG or SXG_CONFIG_A). The number is computed
// Number of struct hw_cfg_data structures to put in the configuration data
// data structure (struct sxg_config or struct sxg_config_a). The number is computed
// to fill the entire H/W config section of the structure.
#define NUM_HW_CFG_ENTRIES (HW_CFG_SECTION_SIZE / sizeof(struct HW_CFG_DATA))
#define NUM_HW_CFG_ENTRIES_A (HW_CFG_SECTION_SIZE_A / sizeof(struct HW_CFG_DATA))
#define NUM_HW_CFG_ENTRIES (HW_CFG_SECTION_SIZE / sizeof(struct hw_cfg_data))
#define NUM_HW_CFG_ENTRIES_A (HW_CFG_SECTION_SIZE_A / sizeof(struct hw_cfg_data))
/* MAC address structure */
struct SXG_CONFIG_MAC {
struct sxg_config_mac {
unsigned char MacAddr[6]; /* MAC Address */
};
/* FRU data structure */
struct ATK_FRU {
struct atk_fru {
unsigned char PartNum[6];
unsigned char Revision[2];
unsigned char Serial[14];
......@@ -737,53 +737,53 @@ struct ATK_FRU {
#define ATK_OEM_ASSY_SIZE 10 // assy num is 9 chars plus \0
// OEM FRU structure for Alacritech
struct ATK_OEM {
struct atk_oem {
unsigned char Assy[ATK_OEM_ASSY_SIZE];
};
#define OEM_EEPROM_FRUSIZE 74 // size of OEM fru info - size
// chosen to fill out the S/W section
union OEM_FRU { // OEM FRU information
union oem_fru { // OEM FRU information
unsigned char OemFru[OEM_EEPROM_FRUSIZE];
struct ATK_OEM AtkOem;
struct atk_oem AtkOem;
};
// Structure to hold the S/W configuration data.
struct SW_CFG_DATA {
struct sw_cfg_data {
ushort MagicWord; // Magic word for section 2
ushort Version; // Format version
struct SXG_CONFIG_MAC MacAddr[4]; // space for 4 MAC addresses
struct ATK_FRU AtkFru; // FRU information
struct sxg_config_mac MacAddr[4]; // space for 4 MAC addresses
struct atk_fru AtkFru; // FRU information
ushort OemFruFormat; // OEM FRU format type
union OEM_FRU OemFru; // OEM FRU information
union oem_fru OemFru; // OEM FRU information
ushort Checksum; // Checksum of section 2
};
/* EEPROM/Flash Format */
struct SXG_CONFIG {
struct sxg_config {
/*
* H/W Section - Read by Sahara hardware (512 bytes)
*/
struct HW_CFG_DATA HwCfg[NUM_HW_CFG_ENTRIES];
struct hw_cfg_data HwCfg[NUM_HW_CFG_ENTRIES];
/*
* S/W Section - Other configuration data (128 bytes)
*/
struct SW_CFG_DATA SwCfg;
struct sw_cfg_data SwCfg;
};
// EEPROM/Flash Format (Sahara rev A)
struct SXG_CONFIG_A {
struct sxg_config_a {
/*
* H/W Section - Read by Sahara hardware (256 bytes)
*/
struct HW_CFG_DATA HwCfg[NUM_HW_CFG_ENTRIES_A];
struct hw_cfg_data HwCfg[NUM_HW_CFG_ENTRIES_A];
/*
* S/W Section - Other configuration data (128 bytes)
*/
struct SW_CFG_DATA SwCfg;
struct sw_cfg_data SwCfg;
};
#ifdef WINDOWS_COMPILER
......@@ -801,17 +801,17 @@ struct SXG_CONFIG_A {
// structure was built incorrectly. Unfortunately, the error message produced
// is meaningless. But this is apparently the only way to catch this problem
// at compile time.
compile_time_assert (offsetof(SXG_CONFIG, SwCfg) == SW_CFG_SECTION_START);
compile_time_assert (sizeof(SXG_CONFIG) == HW_CFG_SECTION_SIZE + SW_CFG_SECTION_SIZE);
compile_time_assert (offsetof(struct sxg_config, SwCfg) == SW_CFG_SECTION_START);
compile_time_assert (sizeof(struct sxg_config) == HW_CFG_SECTION_SIZE + SW_CFG_SECTION_SIZE);
compile_time_assert (offsetof(SXG_CONFIG_A, SwCfg) == SW_CFG_SECTION_START_A);
compile_time_assert (sizeof(SXG_CONFIG_A) == HW_CFG_SECTION_SIZE_A + SW_CFG_SECTION_SIZE);
compile_time_assert (offsetof(struct sxg_config_a, SwCfg) == SW_CFG_SECTION_START_A);
compile_time_assert (sizeof(struct sxg_config_a) == HW_CFG_SECTION_SIZE_A + SW_CFG_SECTION_SIZE);
#endif
/*
* Structure used to pass information between driver and user-mode
* control application
*/
struct ADAPT_USERINFO {
struct adapt_userinfo {
bool LinkUp;
// u32 LinkState; // use LinkUp - any need for other states?
u32 LinkSpeed; // not currently needed
......@@ -821,9 +821,9 @@ struct ADAPT_USERINFO {
ushort PciLanes;
unsigned char MacAddr[6];
unsigned char CurrMacAddr[6];
struct ATK_FRU AtkFru;
struct atk_fru AtkFru;
ushort OemFruFormat;
union OEM_FRU OemFru;
union oem_fru OemFru;
};
#pragma pack(pop)
......
drivers/staging/sxg/sxgphycode.h
View file @ 942798b4
......@@ -18,7 +18,7 @@
/*
* Download for AEL2005C PHY with SR/LR transceiver (10GBASE-SR or 10GBASE-LR)
*/
static struct PHY_UCODE PhyUcode[] = {
static struct phy_ucode PhyUcode[] = {
/*
* NOTE: An address of 0 is a special case. When the download routine
* sees an address of 0, it does not write to the PHY. Instead, it
......
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