Commit 94c3847d authored by Marcel Ziswiler's avatar Marcel Ziswiler Committed by Thierry Reding

ARM: tegra: apalis-tk1: get rid of fake clocks simple bus

Get rid of the fake clocks simple bus and use node names as per the
actual schematics.
Signed-off-by: default avatarMarcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 26e19cdf
......@@ -1931,17 +1931,10 @@ i2s@70301200 {
};
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: osc3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
cpus {
......
......@@ -1961,17 +1961,10 @@ i2s@70301200 {
};
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
clk32k_in: osc3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
cpus {
......
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