Move definition of TimeBase registers from reg_booke.h to reg.h, those

registers exist on common CPUs and without those definitions, SMP won't
build

include/asm-ppc/reg.h

@@ -87,6 +87,10 @@
 #define SPRN_CTR	0x009	/* Count Register */
 #define SPRN_DABR	0x3F5	/* Data Address Breakpoint Register */
 #define SPRN_DAR	0x013	/* Data Address Register */
+#define SPRN_TBRL	0x10C	/* Time Base Read Lower Register (user, R/O) */
+#define SPRN_TBRU	0x10D	/* Time Base Read Upper Register (user, R/O) */
+#define SPRN_TBWL	0x11C	/* Time Base Lower Register (super, R/W) */
+#define SPRN_TBWU	0x11D	/* Time Base Upper Register (super, R/W) */
 #define SPRN_DBAT0L	0x219	/* Data BAT 0 Lower Register */
 #define SPRN_DBAT0U	0x218	/* Data BAT 0 Upper Register */
 #define SPRN_DBAT1L	0x21B	/* Data BAT 1 Lower Register */
@@ -397,6 +401,10 @@
 #define THRM2	SPRN_THRM2	/* Thermal Management Register 2 */
 #define THRM3	SPRN_THRM3	/* Thermal Management Register 3 */
 #define XER	SPRN_XER
+#define TBRL	SPRN_TBRL	/* Time Base Read Lower Register */
+#define TBRU	SPRN_TBRU	/* Time Base Read Upper Register */
+#define TBWL	SPRN_TBWL	/* Time Base Write Lower Register */
+#define TBWU	SPRN_TBWU	/* Time Base Write Upper Register */
 
 /* Processor Version Register */
 

include/asm-ppc/reg_booke.h

@@ -59,14 +59,10 @@ do {						\
 #define SPRN_SPRG5R	0x105	/* Special Purpose Register General 5 Read */
 #define SPRN_SPRG6R	0x106	/* Special Purpose Register General 6 Read */
 #define SPRN_SPRG7R	0x107	/* Special Purpose Register General 7 Read */
-#define SPRN_TBRL	0x10C	/* Time Base Read Lower Register (user, R/O) */
-#define SPRN_TBRU	0x10D	/* Time Base Read Upper Register (user, R/O) */
 #define SPRN_SPRG4W	0x114	/* Special Purpose Register General 4 Write */
 #define SPRN_SPRG5W	0x115	/* Special Purpose Register General 5 Write */
 #define SPRN_SPRG6W	0x116	/* Special Purpose Register General 6 Write */
 #define SPRN_SPRG7W	0x117	/* Special Purpose Register General 7 Write */
-#define SPRN_TBWL	0x11C	/* Time Base Lower Register (super, R/W) */
-#define SPRN_TBWU	0x11D	/* Time Base Upper Register (super, R/W) */
 #define SPRN_DBCR2	0x136	/* Debug Control Register 2 */
 #define SPRN_IAC3	0x13A	/* Instruction Address Compare 3 */
 #define SPRN_IAC4	0x13B	/* Instruction Address Compare 4 */
@@ -252,10 +248,6 @@ do {						\
 #define SPRG5W	SPRN_SPRG5W
 #define SPRG6W	SPRN_SPRG6W
 #define SPRG7W	SPRN_SPRG7W
-#define TBRL	SPRN_TBRL	/* Time Base Read Lower Register */
-#define TBRU	SPRN_TBRU	/* Time Base Read Upper Register */
-#define TBWL	SPRN_TBWL	/* Time Base Write Lower Register */
-#define TBWU	SPRN_TBWU	/* Time Base Write Upper Register */
 
 /*
  * The IBM-403 is an even more odd special case, as it is much