Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk

into ppc970.osdl.org:/home/torvalds/v2.6/linux

Documentation/arm/IXP4xx

@@ -12,8 +12,11 @@ is targeted for network applications, though it has become popular
 in industrial control and other areas due to low cost and power
 consumption. The IXP4xx family currently consists of several processors
 that support different network offload functions such as encryption,
-routing, firewalling, etc. For more information on the various
-versions of the CPU, see:
+routing, firewalling, etc. The IXP46x family is an updated version which
+supports faster speeds, new memory and flash configurations, and more
+integration such as an on-chip I2C controller.
+
+For more information on the various versions of the CPU, see:
 
    http://developer.intel.com/design/network/products/npfamily/ixp4xx.htm
 
@@ -27,7 +30,7 @@ Linux currently supports the following features on the IXP4xx chips:
 - Dual serial ports
 - PCI interface
 - Flash access (MTD/JFFS)
-- I2C through GPIO
+- I2C through GPIO on IXP42x
 - GPIO for input/output/interrupts 
   See include/asm-arm/arch-ixp4xx/platform.h for access functions.
 - Timers (watchdog, OS)
@@ -122,6 +125,12 @@ http://developer.intel.com/design/network/products/npfamily/ixdp425.htm
    also known as the Richfield board. It contains 4 PCI slots, 16MB
    of flash, two 10/100 ports and one ADSL port.
 
+Intel IXDP465 Development Platform
+http://developer.intel.com/design/network/products/npfamily/ixdp465.htm
+
+   This is basically an IXDP425 with an IXP465 and 32M of flash instead
+   of just 16.
+
 Intel IXDPG425 Development Platform
 
    This is basically and ADI Coyote board with a NEC EHCI controller
@@ -154,6 +163,7 @@ The IXP4xx work has been funded by Intel Corp. and MontaVista Software, Inc.
 
 The following people have contributed patches/comments/etc:
 
+Lennerty Buytenhek
 Lutz Jaenicke
 Justin Mayfield
 Robert E. Ranslam
@@ -161,4 +171,4 @@ Robert E. Ranslam
 
 -------------------------------------------------------------------------
 
-Last Update: 11/16/2004
+Last Update: 01/04/2005

MAINTAINERS

@@ -313,6 +313,20 @@ L:	linux-arm-kernel@lists.arm.linux.org.uk
 W:	http://www.arm.linux.org.uk/
 S:	Maintained
 
+ARM/S3C2410 ARM ARCHITECTURE
+P:	Ben Dooks
+M:	ben-s3c2410@fluff.org
+L:	linux-arm-kernel@lists.arm.linux.org.uk
+W:	http://www.fluff.org/ben/linux/
+S:	Maintained
+
+ARM/S3C2440 ARM ARCHITECTURE
+P:	Ben Dooks
+M:	ben-s3c2440@fluff.org
+L:	linux-arm-kernel@lists.arm.linux.org.uk
+W:	http://www.fluff.org/ben/linux/
+S:	Maintained
+
 ARPD SUPPORT
 P:	Jonathan Layes
 L:	linux-net@vger.kernel.org

arch/arm/mach-s3c2410/cpu.c

@@ -46,6 +46,7 @@ struct cpu_table {
 	unsigned long	idcode;
 	unsigned long	idmask;
 	void		(*map_io)(struct map_desc *mach_desc, int size);
+	void		(*init_uarts)(struct s3c2410_uartcfg *cfg, int no);
 	int		(*init)(void);
 	const char	*name;
 };
@@ -59,32 +60,36 @@ static const char name_s3c2440a[] = "S3C2440A";
 
 static struct cpu_table cpu_ids[] __initdata = {
 	{
-		.idcode	= 0x32410000,
-		.idmask = 0xffffffff,
-		.map_io = s3c2410_map_io,
-		.init   = s3c2410_init,
-		.name   = name_s3c2410
+		.idcode		= 0x32410000,
+		.idmask		= 0xffffffff,
+		.map_io		= s3c2410_map_io,
+		.init_uarts	= s3c2410_init_uarts,
+		.init		= s3c2410_init,
+		.name		= name_s3c2410
 	},
 	{
-		.idcode	= 0x32410002,
-		.idmask = 0xffffffff,
-		.map_io = s3c2410_map_io,
-		.init   = s3c2410_init,
-		.name   = name_s3c2410a
+		.idcode		= 0x32410002,
+		.idmask		= 0xffffffff,
+		.map_io		= s3c2410_map_io,
+		.init_uarts	= s3c2410_init_uarts,
+		.init		= s3c2410_init,
+		.name		= name_s3c2410a
 	},
 	{
-		.idcode	= 0x32440000,
-		.idmask = 0xffffffff,
-		.map_io = s3c2440_map_io,
-		.init   = s3c2440_init,
-		.name   = name_s3c2440
+		.idcode		= 0x32440000,
+		.idmask		= 0xffffffff,
+		.map_io		= s3c2440_map_io,
+		.init_uarts	= s3c2440_init_uarts,
+		.init		= s3c2440_init,
+		.name		= name_s3c2440
 	},
 	{
-		.idcode	= 0x32440001,
-		.idmask = 0xffffffff,
-		.map_io = s3c2440_map_io,
-		.init   = s3c2440_init,
-		.name   = name_s3c2440a
+		.idcode		= 0x32440001,
+		.idmask		= 0xffffffff,
+		.map_io		= s3c2440_map_io,
+		.init_uarts	= s3c2440_init_uarts,
+		.init		= s3c2440_init,
+		.name		= name_s3c2440a
 	}
 };
 
@@ -160,6 +165,16 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 	(cpu->map_io)(mach_desc, size);
 }
 
+void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+	if (cpu == NULL)
+		return;
+
+	if (cpu->init_uarts == NULL) {
+		printk(KERN_ERR "s3c24xx_init_uarts: cpu has no uart init\n");
+	} else
+		(cpu->init_uarts)(cfg, no);
+}
 static int __init s3c_arch_init(void)
 {
 	int ret;

arch/arm/mach-s3c2410/cpu.h

 /* arch/arm/mach-s3c2410/cpu.h
  *
- * Copyright (c) 2004 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2004-2005 Simtec Electronics
+ *	Ben Dooks <ben@simtec.co.uk>
  *
  * Header file for S3C24XX CPU support
  *
@@ -12,6 +12,7 @@
  * Modifications:
  *     24-Aug-2004 BJD  Start of generic S3C24XX support
  *     18-Oct-2004 BJD  Moved board struct into this file
+ *     04-Jan-2005 BJD  New uart initialisation
 */
 
 #define IODESC_ENT(x) { S3C2410_VA_##x, S3C2410_PA_##x, S3C2410_SZ_##x, MT_DEVICE }
@@ -22,10 +23,15 @@
 
 #define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000)
 
+/* forward declaration */
+struct s3c2410_uartcfg;
+
 #ifdef CONFIG_CPU_S3C2410
 extern  int s3c2410_init(void);
 extern void s3c2410_map_io(struct map_desc *mach_desc, int size);
+extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 #else
+#define s3c2410_init_uarts NULL
 #define s3c2410_map_io NULL
 #define s3c2410_init NULL
 #endif
@@ -33,13 +39,17 @@ extern void s3c2410_map_io(struct map_desc *mach_desc, int size);
 #ifdef CONFIG_CPU_S3C2440
 extern  int s3c2440_init(void);
 extern void s3c2440_map_io(struct map_desc *mach_desc, int size);
+extern void s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 #else
+#define s3c2440_init_uarts NULL
 #define s3c2440_map_io NULL
 #define s3c2440_init NULL
 #endif
 
 extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
 
+extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
 /* the board structure is used at first initialsation time
  * to get info such as the devices to register for this
  * board. This is done because platfrom_add_devices() cannot
@@ -55,5 +65,3 @@ struct s3c24xx_board {
 };
 
 extern void s3c24xx_set_board(struct s3c24xx_board *board);
-
-

arch/arm/mach-s3c2410/mach-bast.c

 /* linux/arch/arm/mach-s3c2410/mach-bast.c
  *
- * Copyright (c) 2003,2004 Simtec Electronics
+ * Copyright (c) 2003-2005 Simtec Electronics
  *   Ben Dooks <ben@simtec.co.uk>
  *
  * http://www.simtec.co.uk/products/EB2410ITX/
@@ -20,6 +20,7 @@
  *     18-Jan-2003 BJD  Added serial port configuration
  *     05-Oct-2004 BJD  Power management code
  *     04-Nov-2004 BJD  Updated serial port clocks
+ *     04-Jan-2004 BJD  New uart init call
 */
 
 #include <linux/kernel.h>
@@ -262,7 +263,7 @@ void __init bast_map_io(void)
 	s3c24xx_uclk.parent  = &s3c24xx_clkout1;
 
 	s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
-	s3c2410_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs));
+	s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs));
 	s3c24xx_set_board(&bast_board);
 	usb_simtec_init();
 }

arch/arm/mach-s3c2410/mach-h1940.c

 /* linux/arch/arm/mach-s3c2410/mach-h1940.c
  *
- * Copyright (c) 2003,2004 Simtec Electronics
+ * Copyright (c) 2003-2005 Simtec Electronics
  *   Ben Dooks <ben@simtec.co.uk>
  *
  * http://www.handhelds.org/projects/h1940.html
@@ -20,6 +20,7 @@
  *     04-Sep-2004 BJD  Changed uart init, renamed ipaq_ -> h1940_
  *     18-Oct-2004 BJD  Updated new board structure name
  *     04-Nov-2004 BJD  Change for new serial clock
+ *     04-Jan-2005 BJD  Updated uart init call
 */
 
 #include <linux/kernel.h>
@@ -102,7 +103,7 @@ static struct s3c24xx_board h1940_board __initdata = {
 void __init h1940_map_io(void)
 {
 	s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc));
-	s3c2410_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs));
+	s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs));
 	s3c24xx_set_board(&h1940_board);
 }
 

arch/arm/mach-s3c2410/mach-rx3715.c

@@ -95,7 +95,7 @@ void __init rx3715_map_io(void)
 	s3c24xx_xtal = 16934000;
 
 	s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
-	s3c2440_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
+	s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
 	s3c24xx_set_board(&rx3715_board);
 }
 

arch/arm/mach-s3c2410/mach-smdk2410.c

@@ -98,7 +98,7 @@ static struct s3c24xx_board smdk2410_board __initdata = {
 void __init smdk2410_map_io(void)
 {
 	s3c24xx_init_io(smdk2410_iodesc, ARRAY_SIZE(smdk2410_iodesc));
-	s3c2410_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
+	s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
 	s3c24xx_set_board(&smdk2410_board);
 }
 

arch/arm/mach-s3c2410/mach-vr1000.c

@@ -18,6 +18,7 @@
  *     05-Apr-2004 BJD  Copied to make mach-vr1000.c
  *     18-Oct-2004 BJD  Updated board struct
  *     04-Nov-2004 BJD  Clock and serial configuration update
+ *     04-Jan-2004 BJD  Updated uart init call
 */
 
 #include <linux/kernel.h>
@@ -204,7 +205,7 @@ void __init vr1000_map_io(void)
 	s3c24xx_uclk.parent  = &s3c24xx_clkout1;
 
 	s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
-	s3c2410_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
+	s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
 	s3c24xx_set_board(&vr1000_board);
 	usb_simtec_init();
 }

arch/arm/mach-s3c2410/s3c2410.h

@@ -14,17 +14,14 @@
  *     20-Aug-2004 BJD  Added s3c2410_board struct
  *     04-Sep-2004 BJD  Added s3c2410_init_uarts() call
  *     17-Oct-2004 BJD  Moved board out to cpu
+ *     04-Jan-2005 BJD  Changed uart init
 */
 
-struct s3c2410_uartcfg;
-
 extern void s3c2410_map_io(struct map_desc *, int count);
 
-extern void s3c2410_init_uarts(struct s3c2410_uartcfg *, int no);
-
 extern void s3c2410_init_irq(void);
 
 struct sys_timer;
 extern struct sys_timer s3c2410_timer;
 
-extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+

arch/arm/mach-s3c2410/s3c2440.c

@@ -59,6 +59,7 @@ static struct map_desc s3c2440_iodesc[] __initdata = {
 	IODESC_ENT(LCD),
 	IODESC_ENT(TIMER),
 	IODESC_ENT(ADC),
+	IODESC_ENT(WATCHDOG),
 };
 
 static struct resource s3c_uart0_resource[] = {
@@ -243,7 +244,7 @@ void __init s3c2440_map_io(struct map_desc *mach_desc, int size)
 	s3c24xx_hclk = s3c24xx_fclk / s3c2440_hdiv;
 	s3c24xx_pclk = s3c24xx_hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
 
-	/* print brieft summary of clocks, etc */
+	/* print brief summary of clocks, etc */
 
 	printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
 	       print_mhz(s3c24xx_fclk), print_mhz(s3c24xx_hclk),

arch/arm/mach-s3c2410/s3c2440.h

@@ -12,12 +12,9 @@
  * Modifications:
  *	24-Aug-2004 BJD  Start of S3C2440 CPU support
  *	04-Nov-2004 BJD  Added s3c2440_init_uarts()
+ *	04-Jan-2004 BJD  Moved uart init to cpu code
 */
 
-struct s3c2410_uartcfg;
-
 extern void s3c2440_init_irq(void);
 
 extern void s3c2440_init_time(void);
-
-extern void s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no);

arch/arm/mm/mm-armv.c

@@ -239,7 +239,8 @@ void free_pgd_slow(pgd_t *pgd)
 
 /*
  * Create a SECTION PGD between VIRT and PHYS in domain
- * DOMAIN with protection PROT
+ * DOMAIN with protection PROT.  This operates on half-
+ * pgdir entry increments.
  */
 static inline void
 alloc_init_section(unsigned long virt, unsigned long phys, int prot)
@@ -481,6 +482,9 @@ static void __init create_mapping(struct map_desc *md)
 		length -= PAGE_SIZE;
 	}
 
+	/*
+	 * A section mapping covers half a "pgdir" entry.
+	 */
 	while (length >= (PGDIR_SIZE / 2)) {
 		alloc_init_section(virt, virt + off, prot_sect);
 
@@ -522,6 +526,7 @@ void setup_mm_for_reboot(char mode)
 			pmdval |= PMD_BIT4;
 		pmd = pmd_offset(pgd + i, i << PGDIR_SHIFT);
 		set_pmd(pmd, __pmd(pmdval));
+		set_pmd(pmd + 1, __pmd(pmdval + 1 << (PGDIR_SHIFT - 1)));
 	}
 }
 

include/asm-arm/arch-pxa/pxa-regs.h

@@ -1580,6 +1580,7 @@
 #define SSCR0_EDSS		(1 << 20)	/* Extended Data Size Select */
 
 /* extra bits in PXA255, PXA26x and PXA27x SSP ports */
+#define SSCR0_PSP		(3 << 4)	/* PSP - Programmable Serial Protocol */
 #define SSCR1_TTELP		(1 << 31)	/* TXD Tristate Enable Last Phase */
 #define SSCR1_TTE		(1 << 30)	/* TXD Tristate Enable */
 #define SSCR1_EBCEI		(1 << 29)	/* Enable Bit Count Error interrupt */

include/asm-arm/pgtable.h

@@ -82,7 +82,7 @@
  * PMD_SHIFT determines the size of the area a second-level page table can map
  * PGDIR_SHIFT determines what a third-level page table entry can map
  */
-#define PMD_SHIFT		20
+#define PMD_SHIFT		21
 #define PGDIR_SHIFT		21
 
 #define LIBRARY_TEXT_START	0x0c000000