Commit 9883b83d authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  MIPS: Don't probe reserved EntryHi bits.
  MIPS: SNI: Correct NULL test
  MIPS: Fix __devinit __cpuinit confusion in cpu_cache_init
  MIPS: IP27: Make defconfig useful again.
  MIPS: Fixup of the r4k timer
parents a4b4df27 5b7efa89
This diff is collapsed.
...@@ -287,9 +287,9 @@ static inline int __cpu_has_fpu(void) ...@@ -287,9 +287,9 @@ static inline int __cpu_has_fpu(void)
static inline void cpu_probe_vmbits(struct cpuinfo_mips *c) static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
{ {
#ifdef __NEED_VMBITS_PROBE #ifdef __NEED_VMBITS_PROBE
write_c0_entryhi(0x3ffffffffffff000ULL); write_c0_entryhi(0x3fffffffffffe000ULL);
back_to_back_c0_hazard(); back_to_back_c0_hazard();
c->vmbits = fls64(read_c0_entryhi() & 0x3ffffffffffff000ULL); c->vmbits = fls64(read_c0_entryhi() & 0x3fffffffffffe000ULL);
#endif #endif
} }
......
...@@ -1501,6 +1501,7 @@ void __cpuinit per_cpu_trap_init(void) ...@@ -1501,6 +1501,7 @@ void __cpuinit per_cpu_trap_init(void)
cp0_perfcount_irq = -1; cp0_perfcount_irq = -1;
} else { } else {
cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ; cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
cp0_compare_irq_shift = cp0_compare_irq;
cp0_perfcount_irq = -1; cp0_perfcount_irq = -1;
} }
......
...@@ -174,7 +174,7 @@ static void octeon_flush_cache_page(struct vm_area_struct *vma, ...@@ -174,7 +174,7 @@ static void octeon_flush_cache_page(struct vm_area_struct *vma,
* Probe Octeon's caches * Probe Octeon's caches
* *
*/ */
static void __devinit probe_octeon(void) static void __cpuinit probe_octeon(void)
{ {
unsigned long icache_size; unsigned long icache_size;
unsigned long dcache_size; unsigned long dcache_size;
...@@ -235,7 +235,7 @@ static void __devinit probe_octeon(void) ...@@ -235,7 +235,7 @@ static void __devinit probe_octeon(void)
* Setup the Octeon cache flush routines * Setup the Octeon cache flush routines
* *
*/ */
void __devinit octeon_cache_init(void) void __cpuinit octeon_cache_init(void)
{ {
extern unsigned long ebase; extern unsigned long ebase;
extern char except_vec2_octeon; extern char except_vec2_octeon;
......
...@@ -155,7 +155,7 @@ static inline void setup_protection_map(void) ...@@ -155,7 +155,7 @@ static inline void setup_protection_map(void)
protection_map[15] = PAGE_SHARED; protection_map[15] = PAGE_SHARED;
} }
void __devinit cpu_cache_init(void) void __cpuinit cpu_cache_init(void)
{ {
if (cpu_has_3k_cache) { if (cpu_has_3k_cache) {
extern void __weak r3k_cache_init(void); extern void __weak r3k_cache_init(void);
......
...@@ -404,7 +404,7 @@ void __init sni_rm200_i8259_irqs(void) ...@@ -404,7 +404,7 @@ void __init sni_rm200_i8259_irqs(void)
if (!rm200_pic_master) if (!rm200_pic_master)
return; return;
rm200_pic_slave = ioremap_nocache(0x160000a0, 4); rm200_pic_slave = ioremap_nocache(0x160000a0, 4);
if (!rm200_pic_master) { if (!rm200_pic_slave) {
iounmap(rm200_pic_master); iounmap(rm200_pic_master);
return; return;
} }
......
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