Commit 992cf09b authored by Marcel Ziswiler's avatar Marcel Ziswiler Committed by Thierry Reding

ARM: tegra: colibri_t20: add missing pinmux

Explicitly add pinmux' for all T20 SoC ball groups now:
- Colibri Address/Data Bus (GMI) further pins used as GPIOs
- Colibri BL_ON
- Colibri EXT_IO*
- Colibri L_BIAS, LCD_M1 is muxed with LCD_DE today's display need DE,
  disable LCD_M1
- more Colibri LCD pins (L_* resp. LDD<*>)
- Colibri LCD (Optional 24 BPP Support)
- Colibri MMCCD
- uart_a_dsr and uart_a_dcd as GPIOs
- Colibri USB_CDET
- I2C3 (Optional)
- JTAG_RTCK
- LAN_RESET, LAN_EXT_WAKEUP and LAN_PME (All On-module)
- more NAND pins
- RESET_OUT
- THERMD_ALERT# (On-module), unlatched I2C address pin of LM95245
  temperature sensor therefore requires disabling for now
Signed-off-by: default avatarMarcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent a2cb59be
...@@ -29,6 +29,10 @@ hdmi@54280000 { ...@@ -29,6 +29,10 @@ hdmi@54280000 {
pinmux@70000014 { pinmux@70000014 {
state_default: pinmux { state_default: pinmux {
bl-on {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
ddc { ddc {
nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,tristate = <TEGRA_PIN_DISABLE>;
}; };
...@@ -37,10 +41,38 @@ hotplug-detect { ...@@ -37,10 +41,38 @@ hotplug-detect {
nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,tristate = <TEGRA_PIN_DISABLE>;
}; };
i2c {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
lcd {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
lm1 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
mmc { mmc {
nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,tristate = <TEGRA_PIN_DISABLE>;
}; };
mmccd {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
pwm-a-b {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
pwm-c-d {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
ssp {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
uart-a { uart-a {
nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,tristate = <TEGRA_PIN_DISABLE>;
}; };
...@@ -48,6 +80,14 @@ uart-a { ...@@ -48,6 +80,14 @@ uart-a {
uart-b { uart-b {
nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,tristate = <TEGRA_PIN_DISABLE>;
}; };
uart-c {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
usbh-pen {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
}; };
}; };
......
...@@ -75,20 +75,36 @@ pmc { ...@@ -75,20 +75,36 @@ pmc {
nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,tristate = <TEGRA_PIN_DISABLE>;
}; };
/* Colibri Address/Data Bus (GMI) */ /*
gpio-gmi { * Colibri Address/Data Bus (GMI)
nvidia,pins = "ata", "atc", "atd", "ate", * Note: spid and spie optionally used for SPI1
"dap1", "dap2", "dap4", "gpu", "irrx", */
"irtx", "spia", "spib", "spic"; gmi {
nvidia,pins = "atc", "atd", "ate", "dap1",
"dap2", "dap4", "gmd", "gpu",
"irrx", "irtx", "spia", "spib",
"spic", "spid", "spie", "uca",
"ucb";
nvidia,function = "gmi"; nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
/* Further pins may be used as GPIOs */
gmi-gpio1 {
nvidia,pins = "lpw0", "lsc1", "lsck", "lsda";
nvidia,function = "hdmi";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
gmi-gpio2 {
nvidia,pins = "lcsn", "ldc", "lm0", "lsdi";
nvidia,function = "rsvd4";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
}; };
/* Colibri BL_ON */ /* Colibri BL_ON */
bl-on { bl-on {
nvidia,pins = "dta"; nvidia,pins = "dta";
nvidia,function = "vi"; nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>; nvidia,tristate = <TEGRA_PIN_ENABLE>;
}; };
...@@ -113,8 +129,8 @@ ddc { ...@@ -113,8 +129,8 @@ ddc {
* Note: dtf optionally used for I2C3 * Note: dtf optionally used for I2C3
*/ */
ext-io { ext-io {
nvidia,pins = "dtf"; nvidia,pins = "dtf", "spdi";
nvidia,function = "i2c3"; nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>; nvidia,tristate = <TEGRA_PIN_ENABLE>;
}; };
...@@ -151,15 +167,31 @@ i2c { ...@@ -151,15 +167,31 @@ i2c {
nvidia,tristate = <TEGRA_PIN_ENABLE>; nvidia,tristate = <TEGRA_PIN_ENABLE>;
}; };
/*
* Colibri L_BIAS, LCD_M1 is muxed with LCD_DE
* today's display need DE, disable LCD_M1
*/
lm1 {
nvidia,pins = "lm1";
nvidia,function = "rsvd3";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
/* Colibri LCD (L_* resp. LDD<*>) */ /* Colibri LCD (L_* resp. LDD<*>) */
lcd { lcd {
nvidia,pins = "ld0", "ld1", "ld2", "ld3", nvidia,pins = "ld0", "ld1", "ld2", "ld3",
"ld4", "ld5", "ld6", "ld7", "ld4", "ld5", "ld6", "ld7",
"ld8", "ld9", "ld10", "ld11", "ld8", "ld9", "ld10", "ld11",
"ld12", "ld13", "ld14", "ld15", "ld12", "ld13", "ld14", "ld15",
"ld16", "ld17", "lhs", "lpw0", "ld16", "ld17", "lhs", "lsc0",
"lpw2", "lsc0", "lsc1", "lsck", "lspi", "lvs";
"lsda", "lspi", "lvs"; nvidia,function = "displaya";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
/* Colibri LCD (Optional 24 BPP Support) */
lcd-24 {
nvidia,pins = "ldi", "lhp0", "lhp1", "lhp2",
"lpp", "lvp1";
nvidia,function = "displaya"; nvidia,function = "displaya";
nvidia,tristate = <TEGRA_PIN_ENABLE>; nvidia,tristate = <TEGRA_PIN_ENABLE>;
}; };
...@@ -172,6 +204,14 @@ mmc { ...@@ -172,6 +204,14 @@ mmc {
nvidia,tristate = <TEGRA_PIN_ENABLE>; nvidia,tristate = <TEGRA_PIN_ENABLE>;
}; };
/* Colibri MMCCD */
mmccd {
nvidia,pins = "gmb";
nvidia,function = "gmi_int";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
/* Colibri MMC (Optional 8-bit) */ /* Colibri MMC (Optional 8-bit) */
mmc-8bit { mmc-8bit {
nvidia,pins = "gme"; nvidia,pins = "gme";
...@@ -220,6 +260,16 @@ uart-a { ...@@ -220,6 +260,16 @@ uart-a {
nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>; nvidia,tristate = <TEGRA_PIN_ENABLE>;
}; };
uart-a-dsr {
nvidia,pins = "lpw1";
nvidia,function = "rsvd3";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
uart-a-dcd {
nvidia,pins = "lpw2";
nvidia,function = "hdmi";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
/* Colibri UART-B */ /* Colibri UART-B */
uart-b { uart-b {
...@@ -237,12 +287,20 @@ uart-c { ...@@ -237,12 +287,20 @@ uart-c {
nvidia,tristate = <TEGRA_PIN_ENABLE>; nvidia,tristate = <TEGRA_PIN_ENABLE>;
}; };
/* Colibri USB_CDET */
usb-cdet {
nvidia,pins = "spdo";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
/* Colibri USBH_OC */ /* Colibri USBH_OC */
usbh-oc { usbh-oc {
nvidia,pins = "spih"; nvidia,pins = "spih";
nvidia,function = "spi2_alt"; nvidia,function = "spi2_alt";
nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,tristate = <TEGRA_PIN_ENABLE>;
}; };
/* Colibri USBH_PEN */ /* Colibri USBH_PEN */
...@@ -250,7 +308,7 @@ usbh-pen { ...@@ -250,7 +308,7 @@ usbh-pen {
nvidia,pins = "spig"; nvidia,pins = "spig";
nvidia,function = "spi2_alt"; nvidia,function = "spi2_alt";
nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,tristate = <TEGRA_PIN_ENABLE>;
}; };
/* Colibri VGA not supported */ /* Colibri VGA not supported */
...@@ -261,6 +319,33 @@ vga { ...@@ -261,6 +319,33 @@ vga {
nvidia,tristate = <TEGRA_PIN_ENABLE>; nvidia,tristate = <TEGRA_PIN_ENABLE>;
}; };
/* I2C3 (Optional) */
i2c3 {
nvidia,pins = "dtf";
nvidia,function = "i2c3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
/* JTAG_RTCK */
jtag-rtck {
nvidia,pins = "gpu7";
nvidia,function = "rtck";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
/*
* LAN_RESET, LAN_EXT_WAKEUP and LAN_PME
* (All On-module)
*/
gpio-gpv {
nvidia,pins = "gpv";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
/* /*
* LAN_V_BUS, VDD_FAULT, BATT_FAULT, WM9712 PENDOWN * LAN_V_BUS, VDD_FAULT, BATT_FAULT, WM9712 PENDOWN
* (All On-module); Colibri CAN_INT * (All On-module); Colibri CAN_INT
...@@ -274,7 +359,7 @@ gpio-dte { ...@@ -274,7 +359,7 @@ gpio-dte {
/* NAND (On-module) */ /* NAND (On-module) */
nand { nand {
nvidia,pins = "kbca", "kbcc", "kbcd", nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
"kbce", "kbcf"; "kbce", "kbcf";
nvidia,function = "nand"; nvidia,function = "nand";
nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,pull = <TEGRA_PIN_PULL_NONE>;
...@@ -297,6 +382,14 @@ i2cp { ...@@ -297,6 +382,14 @@ i2cp {
nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,tristate = <TEGRA_PIN_DISABLE>;
}; };
/* RESET_OUT */
reset-out {
nvidia,pins = "ata";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
/* /*
* SPI1 (Optional) * SPI1 (Optional)
* Note: spid and spie used for Colibri Address/Data * Note: spid and spie used for Colibri Address/Data
...@@ -308,6 +401,17 @@ spi1 { ...@@ -308,6 +401,17 @@ spi1 {
nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>; nvidia,tristate = <TEGRA_PIN_ENABLE>;
}; };
/*
* THERMD_ALERT# (On-module), unlatched I2C address pin
* of LM95245 temperature sensor therefore requires
* disabling for now
*/
lvp0 {
nvidia,pins = "lvp0";
nvidia,function = "rsvd3";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
}; };
}; };
......
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