Commit 99ba8b9b authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Vinod Koul

dmaengine: dw: Initialize channel before each transfer

In some cases DMA can be used only with a consumer which does runtime power
management and on the platforms, that have DMA auto power gating logic
(see comments in the drivers/acpi/acpi_lpss.c), may result in DMA losing
its context. Simple mitigation of this issue is to initialize channel
each time the consumer initiates a transfer.

Fixes: cfdf5b6c ("dw_dmac: add support for Lynxpoint DMA controllers")
Reported-by: default avatarTsuchiya Yuto <kitakar@gmail.com>
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=206403
Link: https://lore.kernel.org/r/20200705115620.51929-1-andriy.shevchenko@linux.intel.comSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent e3122822
...@@ -118,16 +118,11 @@ static void dwc_initialize(struct dw_dma_chan *dwc) ...@@ -118,16 +118,11 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
{ {
struct dw_dma *dw = to_dw_dma(dwc->chan.device); struct dw_dma *dw = to_dw_dma(dwc->chan.device);
if (test_bit(DW_DMA_IS_INITIALIZED, &dwc->flags))
return;
dw->initialize_chan(dwc); dw->initialize_chan(dwc);
/* Enable interrupts */ /* Enable interrupts */
channel_set_bit(dw, MASK.XFER, dwc->mask); channel_set_bit(dw, MASK.XFER, dwc->mask);
channel_set_bit(dw, MASK.ERROR, dwc->mask); channel_set_bit(dw, MASK.ERROR, dwc->mask);
set_bit(DW_DMA_IS_INITIALIZED, &dwc->flags);
} }
/*----------------------------------------------------------------------*/ /*----------------------------------------------------------------------*/
...@@ -954,8 +949,6 @@ static void dwc_issue_pending(struct dma_chan *chan) ...@@ -954,8 +949,6 @@ static void dwc_issue_pending(struct dma_chan *chan)
void do_dw_dma_off(struct dw_dma *dw) void do_dw_dma_off(struct dw_dma *dw)
{ {
unsigned int i;
dma_writel(dw, CFG, 0); dma_writel(dw, CFG, 0);
channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);
...@@ -966,9 +959,6 @@ void do_dw_dma_off(struct dw_dma *dw) ...@@ -966,9 +959,6 @@ void do_dw_dma_off(struct dw_dma *dw)
while (dma_readl(dw, CFG) & DW_CFG_DMA_EN) while (dma_readl(dw, CFG) & DW_CFG_DMA_EN)
cpu_relax(); cpu_relax();
for (i = 0; i < dw->dma.chancnt; i++)
clear_bit(DW_DMA_IS_INITIALIZED, &dw->chan[i].flags);
} }
void do_dw_dma_on(struct dw_dma *dw) void do_dw_dma_on(struct dw_dma *dw)
...@@ -1032,8 +1022,6 @@ static void dwc_free_chan_resources(struct dma_chan *chan) ...@@ -1032,8 +1022,6 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
/* Clear custom channel configuration */ /* Clear custom channel configuration */
memset(&dwc->dws, 0, sizeof(struct dw_dma_slave)); memset(&dwc->dws, 0, sizeof(struct dw_dma_slave));
clear_bit(DW_DMA_IS_INITIALIZED, &dwc->flags);
/* Disable interrupts */ /* Disable interrupts */
channel_clear_bit(dw, MASK.XFER, dwc->mask); channel_clear_bit(dw, MASK.XFER, dwc->mask);
channel_clear_bit(dw, MASK.BLOCK, dwc->mask); channel_clear_bit(dw, MASK.BLOCK, dwc->mask);
......
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