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Commit 9a5bcd47 authored by Eric Bernstein's avatar Eric Bernstein Committed by Alex Deucher
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drm/amd/display: check SR_WATERMARK regs prior to write 

Signed-off-by: default avatarEric Bernstein <eric.bernstein@amd.com>
Reviewed-by: default avatarCharlene Liu <Charlene.Liu@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2126732f
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Showing with 74 additions and 70 deletions
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
View file @ 9a5bcd47
...@@ -481,27 +481,26 @@ static void program_watermarks( ...@@ -481,27 +481,26 @@ static void program_watermarks(
"HW register value = 0x%x\n", "HW register value = 0x%x\n",
watermarks->a.pte_meta_urgent_ns, prog_wm_value); watermarks->a.pte_meta_urgent_ns, prog_wm_value);
if (REG(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A)) {
prog_wm_value = convert_and_clamp( prog_wm_value = convert_and_clamp(
watermarks->a.cstate_pstate.cstate_enter_plus_exit_ns, watermarks->a.cstate_pstate.cstate_enter_plus_exit_ns,
refclk_mhz, 0x1fffff); refclk_mhz, 0x1fffff);
REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, prog_wm_value);
REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, prog_wm_value); dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS,
dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS, "SR_ENTER_EXIT_WATERMARK_A calculated =%d\n"
"SR_ENTER_EXIT_WATERMARK_A calculated =%d\n" "HW register value = 0x%x\n",
"HW register value = 0x%x\n", watermarks->a.cstate_pstate.cstate_enter_plus_exit_ns, prog_wm_value);
watermarks->a.cstate_pstate.cstate_enter_plus_exit_ns, prog_wm_value);
prog_wm_value = convert_and_clamp(
prog_wm_value = convert_and_clamp( watermarks->a.cstate_pstate.cstate_exit_ns,
watermarks->a.cstate_pstate.cstate_exit_ns, refclk_mhz, 0x1fffff);
refclk_mhz, 0x1fffff); REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, prog_wm_value);
REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, prog_wm_value); dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS,
dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS, "SR_EXIT_WATERMARK_A calculated =%d\n"
"SR_EXIT_WATERMARK_A calculated =%d\n" "HW register value = 0x%x\n",
"HW register value = 0x%x\n", watermarks->a.cstate_pstate.cstate_exit_ns, prog_wm_value);
watermarks->a.cstate_pstate.cstate_exit_ns, prog_wm_value); }
prog_wm_value = convert_and_clamp( prog_wm_value = convert_and_clamp(
watermarks->a.cstate_pstate.pstate_change_ns, watermarks->a.cstate_pstate.pstate_change_ns,
...@@ -533,24 +532,26 @@ static void program_watermarks( ...@@ -533,24 +532,26 @@ static void program_watermarks(
watermarks->b.pte_meta_urgent_ns, prog_wm_value); watermarks->b.pte_meta_urgent_ns, prog_wm_value);
prog_wm_value = convert_and_clamp( if (REG(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B)) {
watermarks->b.cstate_pstate.cstate_enter_plus_exit_ns, prog_wm_value = convert_and_clamp(
refclk_mhz, 0x1fffff); watermarks->b.cstate_pstate.cstate_enter_plus_exit_ns,
REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, prog_wm_value); refclk_mhz, 0x1fffff);
dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS, REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, prog_wm_value);
"SR_ENTER_WATERMARK_B calculated =%d\n" dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS,
"HW register value = 0x%x\n", "SR_ENTER_WATERMARK_B calculated =%d\n"
watermarks->b.cstate_pstate.cstate_enter_plus_exit_ns, prog_wm_value); "HW register value = 0x%x\n",
watermarks->b.cstate_pstate.cstate_enter_plus_exit_ns, prog_wm_value);
prog_wm_value = convert_and_clamp( prog_wm_value = convert_and_clamp(
watermarks->b.cstate_pstate.cstate_exit_ns, watermarks->b.cstate_pstate.cstate_exit_ns,
refclk_mhz, 0x1fffff); refclk_mhz, 0x1fffff);
REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, prog_wm_value); REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, prog_wm_value);
dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS, dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS,
"SR_EXIT_WATERMARK_B calculated =%d\n" "SR_EXIT_WATERMARK_B calculated =%d\n"
"HW register value = 0x%x\n", "HW register value = 0x%x\n",
watermarks->b.cstate_pstate.cstate_exit_ns, prog_wm_value); watermarks->b.cstate_pstate.cstate_exit_ns, prog_wm_value);
}
prog_wm_value = convert_and_clamp( prog_wm_value = convert_and_clamp(
watermarks->b.cstate_pstate.pstate_change_ns, watermarks->b.cstate_pstate.pstate_change_ns,
...@@ -581,25 +582,26 @@ static void program_watermarks( ...@@ -581,25 +582,26 @@ static void program_watermarks(
watermarks->c.pte_meta_urgent_ns, prog_wm_value); watermarks->c.pte_meta_urgent_ns, prog_wm_value);
prog_wm_value = convert_and_clamp( if (REG(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C)) {
watermarks->c.cstate_pstate.cstate_enter_plus_exit_ns, prog_wm_value = convert_and_clamp(
refclk_mhz, 0x1fffff); watermarks->c.cstate_pstate.cstate_enter_plus_exit_ns,
REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, prog_wm_value); refclk_mhz, 0x1fffff);
dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS, REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, prog_wm_value);
"SR_ENTER_WATERMARK_C calculated =%d\n" dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS,
"HW register value = 0x%x\n", "SR_ENTER_WATERMARK_C calculated =%d\n"
watermarks->c.cstate_pstate.cstate_enter_plus_exit_ns, prog_wm_value); "HW register value = 0x%x\n",
watermarks->c.cstate_pstate.cstate_enter_plus_exit_ns, prog_wm_value);
prog_wm_value = convert_and_clamp( prog_wm_value = convert_and_clamp(
watermarks->c.cstate_pstate.cstate_exit_ns, watermarks->c.cstate_pstate.cstate_exit_ns,
refclk_mhz, 0x1fffff); refclk_mhz, 0x1fffff);
REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, prog_wm_value); REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, prog_wm_value);
dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS, dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS,
"SR_EXIT_WATERMARK_C calculated =%d\n" "SR_EXIT_WATERMARK_C calculated =%d\n"
"HW register value = 0x%x\n", "HW register value = 0x%x\n",
watermarks->c.cstate_pstate.cstate_exit_ns, prog_wm_value); watermarks->c.cstate_pstate.cstate_exit_ns, prog_wm_value);
}
prog_wm_value = convert_and_clamp( prog_wm_value = convert_and_clamp(
watermarks->c.cstate_pstate.pstate_change_ns, watermarks->c.cstate_pstate.pstate_change_ns,
...@@ -629,24 +631,26 @@ static void program_watermarks( ...@@ -629,24 +631,26 @@ static void program_watermarks(
watermarks->d.pte_meta_urgent_ns, prog_wm_value); watermarks->d.pte_meta_urgent_ns, prog_wm_value);
prog_wm_value = convert_and_clamp( if (REG(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D)) {
watermarks->d.cstate_pstate.cstate_enter_plus_exit_ns, prog_wm_value = convert_and_clamp(
refclk_mhz, 0x1fffff); watermarks->d.cstate_pstate.cstate_enter_plus_exit_ns,
REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, prog_wm_value); refclk_mhz, 0x1fffff);
dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS, REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, prog_wm_value);
"SR_ENTER_WATERMARK_D calculated =%d\n" dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS,
"HW register value = 0x%x\n", "SR_ENTER_WATERMARK_D calculated =%d\n"
watermarks->d.cstate_pstate.cstate_enter_plus_exit_ns, prog_wm_value); "HW register value = 0x%x\n",
watermarks->d.cstate_pstate.cstate_enter_plus_exit_ns, prog_wm_value);
prog_wm_value = convert_and_clamp( prog_wm_value = convert_and_clamp(
watermarks->d.cstate_pstate.cstate_exit_ns, watermarks->d.cstate_pstate.cstate_exit_ns,
refclk_mhz, 0x1fffff); refclk_mhz, 0x1fffff);
REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, prog_wm_value); REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, prog_wm_value);
dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS, dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS,
"SR_EXIT_WATERMARK_D calculated =%d\n" "SR_EXIT_WATERMARK_D calculated =%d\n"
"HW register value = 0x%x\n", "HW register value = 0x%x\n",
watermarks->d.cstate_pstate.cstate_exit_ns, prog_wm_value); watermarks->d.cstate_pstate.cstate_exit_ns, prog_wm_value);
}
prog_wm_value = convert_and_clamp( prog_wm_value = convert_and_clamp(
......
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