Commit 9ce2b991 authored by Felix Kuehling's avatar Felix Kuehling Committed by Alex Deucher

drm/amdgpu: Cast to uint64_t before left shift

Avoid potential integer overflows with left shift in huge-page mapping
code by casting the operand to uin64_t first.
Signed-off-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 04ac4b0e
...@@ -181,7 +181,7 @@ static unsigned amdgpu_vm_num_entries(struct amdgpu_device *adev, ...@@ -181,7 +181,7 @@ static unsigned amdgpu_vm_num_entries(struct amdgpu_device *adev,
if (level == adev->vm_manager.root_level) if (level == adev->vm_manager.root_level)
/* For the root directory */ /* For the root directory */
return round_up(adev->vm_manager.max_pfn, 1 << shift) >> shift; return round_up(adev->vm_manager.max_pfn, 1ULL << shift) >> shift;
else if (level != AMDGPU_VM_PTB) else if (level != AMDGPU_VM_PTB)
/* Everything in between */ /* Everything in between */
return 512; return 512;
...@@ -1666,10 +1666,10 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params, ...@@ -1666,10 +1666,10 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
} }
/* Looks good so far, calculate parameters for the update */ /* Looks good so far, calculate parameters for the update */
incr = AMDGPU_GPU_PAGE_SIZE << shift; incr = (uint64_t)AMDGPU_GPU_PAGE_SIZE << shift;
mask = amdgpu_vm_entries_mask(adev, cursor.level); mask = amdgpu_vm_entries_mask(adev, cursor.level);
pe_start = ((cursor.pfn >> shift) & mask) * 8; pe_start = ((cursor.pfn >> shift) & mask) * 8;
entry_end = (mask + 1) << shift; entry_end = (uint64_t)(mask + 1) << shift;
entry_end += cursor.pfn & ~(entry_end - 1); entry_end += cursor.pfn & ~(entry_end - 1);
entry_end = min(entry_end, end); entry_end = min(entry_end, end);
...@@ -1682,7 +1682,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params, ...@@ -1682,7 +1682,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
flags | AMDGPU_PTE_FRAG(frag)); flags | AMDGPU_PTE_FRAG(frag));
pe_start += nptes * 8; pe_start += nptes * 8;
dst += nptes * AMDGPU_GPU_PAGE_SIZE << shift; dst += (uint64_t)nptes * AMDGPU_GPU_PAGE_SIZE << shift;
frag_start = upd_end; frag_start = upd_end;
if (frag_start >= frag_end) { if (frag_start >= frag_end) {
......
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