[netdrvr ixgb] use standard kernel u8/u16/u32 types

drivers/net/ixgb/ixgb.h

@@ -135,11 +135,11 @@ struct ixgb_adapter {
 	struct timer_list watchdog_timer;
 	struct vlan_group *vlgrp;
 	char *id_string;
-	uint32_t bd_number;
-	uint32_t rx_buffer_len;
-	uint32_t part_num;
-	uint16_t link_speed;
-	uint16_t link_duplex;
+	u32 bd_number;
+	u32 rx_buffer_len;
+	u32 part_num;
+	u16 link_speed;
+	u16 link_duplex;
 	atomic_t irq_sem;
 	struct work_struct tx_timeout_task;
 
@@ -154,19 +154,19 @@ struct ixgb_adapter {
 	/* TX */
 	struct ixgb_desc_ring tx_ring;
 	unsigned long timeo_start;
-	uint32_t tx_cmd_type;
+	u32 tx_cmd_type;
 	int max_data_per_txd;
 	uint64_t hw_csum_tx_good;
 	uint64_t hw_csum_tx_error;
 	boolean_t tx_csum;
-	uint32_t tx_int_delay;
+	u32 tx_int_delay;
 	boolean_t tx_int_delay_enable;
 
 	/* RX */
 	struct ixgb_desc_ring rx_ring;
 	uint64_t hw_csum_rx_error;
 	uint64_t hw_csum_rx_good;
-	uint32_t rx_int_delay;
+	u32 rx_int_delay;
 	boolean_t raidc;
 	boolean_t rx_csum;
 
@@ -178,7 +178,7 @@ struct ixgb_adapter {
 	/* structs defined in ixgb_hw.h */
 	struct ixgb_hw hw;
 	struct ixgb_hw_stats stats;
-	uint32_t pci_state[16];
+	u32 pci_state[16];
 	char ifname[IFNAMSIZ];
 };
 

drivers/net/ixgb/ixgb_ee.c

@@ -28,10 +28,10 @@
 #include "ixgb_hw.h"
 #include "ixgb_ee.h"
 /* Local prototypes */
-static uint16_t ixgb_shift_in_bits(struct ixgb_hw *hw);
+static u16 ixgb_shift_in_bits(struct ixgb_hw *hw);
 
 static void ixgb_shift_out_bits(struct ixgb_hw *hw,
-				uint16_t data, uint16_t count);
+				u16 data, u16 count);
 static void ixgb_standby_eeprom(struct ixgb_hw *hw);
 
 static boolean_t ixgb_wait_eeprom_command(struct ixgb_hw *hw);
@@ -45,7 +45,7 @@ static void ixgb_cleanup_eeprom(struct ixgb_hw *hw);
  * eecd_reg - EECD's current value
  *****************************************************************************/
 static void
-ixgb_raise_clock(struct ixgb_hw *hw, uint32_t * eecd_reg)
+ixgb_raise_clock(struct ixgb_hw *hw, u32 * eecd_reg)
 {
 	/* Raise the clock input to the EEPROM (by setting the SK bit), and then
 	 *  wait 50 microseconds.
@@ -63,7 +63,7 @@ ixgb_raise_clock(struct ixgb_hw *hw, uint32_t * eecd_reg)
  * eecd_reg - EECD's current value
  *****************************************************************************/
 static void
-ixgb_lower_clock(struct ixgb_hw *hw, uint32_t * eecd_reg)
+ixgb_lower_clock(struct ixgb_hw *hw, u32 * eecd_reg)
 {
 	/* Lower the clock input to the EEPROM (by clearing the SK bit), and then 
 	 * wait 50 microseconds. 
@@ -82,10 +82,10 @@ ixgb_lower_clock(struct ixgb_hw *hw, uint32_t * eecd_reg)
  * count - number of bits to shift out
  *****************************************************************************/
 static void
-ixgb_shift_out_bits(struct ixgb_hw *hw, uint16_t data, uint16_t count)
+ixgb_shift_out_bits(struct ixgb_hw *hw, u16 data, u16 count)
 {
-	uint32_t eecd_reg;
-	uint32_t mask;
+	u32 eecd_reg;
+	u32 mask;
 
 	/* We need to shift "count" bits out to the EEPROM. So, value in the
 	 * "data" parameter will be shifted out to the EEPROM one bit at a time.
@@ -127,12 +127,12 @@ ixgb_shift_out_bits(struct ixgb_hw *hw, uint16_t data, uint16_t count)
  *
  * hw - Struct containing variables accessed by shared code
  *****************************************************************************/
-static uint16_t
+static u16
 ixgb_shift_in_bits(struct ixgb_hw *hw)
 {
-	uint32_t eecd_reg;
-	uint32_t i;
-	uint16_t data;
+	u32 eecd_reg;
+	u32 i;
+	u16 data;
 
 	/* In order to read a register from the EEPROM, we need to shift 16 bits 
 	 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
@@ -173,7 +173,7 @@ ixgb_shift_in_bits(struct ixgb_hw *hw)
 static void
 ixgb_setup_eeprom(struct ixgb_hw *hw)
 {
-	uint32_t eecd_reg;
+	u32 eecd_reg;
 
 	eecd_reg = IXGB_READ_REG(hw, EECD);
 
@@ -195,7 +195,7 @@ ixgb_setup_eeprom(struct ixgb_hw *hw)
 static void
 ixgb_standby_eeprom(struct ixgb_hw *hw)
 {
-	uint32_t eecd_reg;
+	u32 eecd_reg;
 
 	eecd_reg = IXGB_READ_REG(hw, EECD);
 
@@ -229,7 +229,7 @@ ixgb_standby_eeprom(struct ixgb_hw *hw)
 static void
 ixgb_clock_eeprom(struct ixgb_hw *hw)
 {
-	uint32_t eecd_reg;
+	u32 eecd_reg;
 
 	eecd_reg = IXGB_READ_REG(hw, EECD);
 
@@ -253,7 +253,7 @@ ixgb_clock_eeprom(struct ixgb_hw *hw)
 static void
 ixgb_cleanup_eeprom(struct ixgb_hw *hw)
 {
-	uint32_t eecd_reg;
+	u32 eecd_reg;
 
 	eecd_reg = IXGB_READ_REG(hw, EECD);
 
@@ -279,8 +279,8 @@ ixgb_cleanup_eeprom(struct ixgb_hw *hw)
 static boolean_t
 ixgb_wait_eeprom_command(struct ixgb_hw *hw)
 {
-	uint32_t eecd_reg;
-	uint32_t i;
+	u32 eecd_reg;
+	u32 i;
 
 	/* Toggle the CS line.  This in effect tells to EEPROM to actually execute 
 	 * the command in question.
@@ -319,13 +319,13 @@ ixgb_wait_eeprom_command(struct ixgb_hw *hw)
 boolean_t
 ixgb_validate_eeprom_checksum(struct ixgb_hw * hw)
 {
-	uint16_t checksum = 0;
-	uint16_t i;
+	u16 checksum = 0;
+	u16 i;
 
 	for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++)
 		checksum += ixgb_read_eeprom(hw, i);
 
-	if (checksum == (uint16_t) EEPROM_SUM)
+	if (checksum == (u16) EEPROM_SUM)
 		return (TRUE);
 	else
 		return (FALSE);
@@ -342,13 +342,13 @@ ixgb_validate_eeprom_checksum(struct ixgb_hw * hw)
 void
 ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
 {
-	uint16_t checksum = 0;
-	uint16_t i;
+	u16 checksum = 0;
+	u16 i;
 
 	for (i = 0; i < EEPROM_CHECKSUM_REG; i++)
 		checksum += ixgb_read_eeprom(hw, i);
 
-	checksum = (uint16_t) EEPROM_SUM - checksum;
+	checksum = (u16) EEPROM_SUM - checksum;
 
 	ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum);
 	return;
@@ -366,7 +366,7 @@ ixgb_update_eeprom_checksum(struct ixgb_hw *hw)
  *
  *****************************************************************************/
 void
-ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data)
+ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data)
 {
 	/*  Prepare the EEPROM for writing  */
 	ixgb_setup_eeprom(hw);
@@ -414,10 +414,10 @@ ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data)
  * Returns:
  *  The 16-bit value read from the eeprom
  *****************************************************************************/
-uint16_t
-ixgb_read_eeprom(struct ixgb_hw * hw, uint16_t offset)
+u16
+ixgb_read_eeprom(struct ixgb_hw * hw, u16 offset)
 {
-	uint16_t data;
+	u16 data;
 
 	/*  Prepare the EEPROM for reading  */
 	ixgb_setup_eeprom(hw);
@@ -451,8 +451,8 @@ ixgb_read_eeprom(struct ixgb_hw * hw, uint16_t offset)
 boolean_t
 ixgb_get_eeprom_data(struct ixgb_hw * hw)
 {
-	uint16_t i;
-	uint16_t checksum = 0;
+	u16 i;
+	u16 checksum = 0;
 	struct ixgb_ee_map_type *ee_map;
 
 	DEBUGFUNC("ixgb_get_eeprom_data");
@@ -461,13 +461,13 @@ ixgb_get_eeprom_data(struct ixgb_hw * hw)
 
 	DEBUGOUT("ixgb_ee: Reading eeprom data\n");
 	for (i = 0; i < IXGB_EEPROM_SIZE; i++) {
-		uint16_t ee_data;
+		u16 ee_data;
 		ee_data = ixgb_read_eeprom(hw, i);
 		checksum += ee_data;
 		hw->eeprom[i] = le16_to_cpu(ee_data);
 	}
 
-	if (checksum != (uint16_t) EEPROM_SUM) {
+	if (checksum != (u16) EEPROM_SUM) {
 		DEBUGOUT("ixgb_ee: Checksum invalid.\n");
 		return (FALSE);
 	}
@@ -514,7 +514,7 @@ ixgb_check_and_get_eeprom_data(struct ixgb_hw *hw)
  * Returns: None.
  ******************************************************************************/
 void
-ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t * mac_addr)
+ixgb_get_ee_mac_addr(struct ixgb_hw *hw, u8 * mac_addr)
 {
 	int i;
 	struct ixgb_ee_map_type *ee_map =
@@ -538,7 +538,7 @@ ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t * mac_addr)
  * Returns: 
  *          compatibility flags if EEPROM contents are valid, 0 otherwise
  ******************************************************************************/
-uint16_t
+u16
 ixgb_get_ee_compatibility(struct ixgb_hw *hw)
 {
 	struct ixgb_ee_map_type *ee_map =
@@ -558,7 +558,7 @@ ixgb_get_ee_compatibility(struct ixgb_hw *hw)
  * Returns: 
  *          PBA number if EEPROM contents are valid, 0 otherwise
  ******************************************************************************/
-uint32_t
+u32
 ixgb_get_ee_pba_number(struct ixgb_hw * hw)
 {
 	if (ixgb_check_and_get_eeprom_data(hw) == TRUE)
@@ -576,7 +576,7 @@ ixgb_get_ee_pba_number(struct ixgb_hw * hw)
  * Returns:
  *          Initialization Control Word 1 if EEPROM contents are valid, 0 otherwise
  ******************************************************************************/
-uint16_t
+u16
 ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw * hw)
 {
 	struct ixgb_ee_map_type *ee_map =
@@ -596,7 +596,7 @@ ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw * hw)
  * Returns: 
  *          Initialization Control Word 2 if EEPROM contents are valid, 0 otherwise
  ******************************************************************************/
-uint16_t
+u16
 ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw * hw)
 {
 	struct ixgb_ee_map_type *ee_map =
@@ -616,7 +616,7 @@ ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw * hw)
  * Returns: 
  *          Subsystem Id if EEPROM contents are valid, 0 otherwise
  ******************************************************************************/
-uint16_t
+u16
 ixgb_get_ee_subsystem_id(struct ixgb_hw * hw)
 {
 	struct ixgb_ee_map_type *ee_map =
@@ -636,7 +636,7 @@ ixgb_get_ee_subsystem_id(struct ixgb_hw * hw)
  * Returns: 
  *          Sub Vendor Id if EEPROM contents are valid, 0 otherwise
  ******************************************************************************/
-uint16_t
+u16
 ixgb_get_ee_subvendor_id(struct ixgb_hw * hw)
 {
 	struct ixgb_ee_map_type *ee_map =
@@ -656,7 +656,7 @@ ixgb_get_ee_subvendor_id(struct ixgb_hw * hw)
  * Returns: 
  *          Device Id if EEPROM contents are valid, 0 otherwise
  ******************************************************************************/
-uint16_t
+u16
 ixgb_get_ee_device_id(struct ixgb_hw * hw)
 {
 	struct ixgb_ee_map_type *ee_map =
@@ -676,7 +676,7 @@ ixgb_get_ee_device_id(struct ixgb_hw * hw)
  * Returns: 
  *          Device Id if EEPROM contents are valid, 0 otherwise
  ******************************************************************************/
-uint16_t
+u16
 ixgb_get_ee_vendor_id(struct ixgb_hw * hw)
 {
 	struct ixgb_ee_map_type *ee_map =
@@ -696,7 +696,7 @@ ixgb_get_ee_vendor_id(struct ixgb_hw * hw)
  * Returns: 
  *          SDP Register if EEPROM contents are valid, 0 otherwise
  ******************************************************************************/
-uint16_t
+u16
 ixgb_get_ee_swdpins_reg(struct ixgb_hw * hw)
 {
 	struct ixgb_ee_map_type *ee_map =
@@ -716,7 +716,7 @@ ixgb_get_ee_swdpins_reg(struct ixgb_hw * hw)
  * Returns: 
  *          D3 Power Management Bits if EEPROM contents are valid, 0 otherwise
  ******************************************************************************/
-uint8_t
+u8
 ixgb_get_ee_d3_power(struct ixgb_hw * hw)
 {
 	struct ixgb_ee_map_type *ee_map =
@@ -736,7 +736,7 @@ ixgb_get_ee_d3_power(struct ixgb_hw * hw)
  * Returns: 
  *          D0 Power Management Bits if EEPROM contents are valid, 0 otherwise
  ******************************************************************************/
-uint8_t
+u8
 ixgb_get_ee_d0_power(struct ixgb_hw * hw)
 {
 	struct ixgb_ee_map_type *ee_map =

drivers/net/ixgb/ixgb_ee.h

@@ -73,32 +73,32 @@
 
 /* EEPROM structure */
 struct ixgb_ee_map_type {
-	uint8_t mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];
-	uint16_t compatibility;
-	uint16_t reserved1[4];
-	uint32_t pba_number;
-	uint16_t init_ctrl_reg_1;
-	uint16_t subsystem_id;
-	uint16_t subvendor_id;
-	uint16_t device_id;
-	uint16_t vendor_id;
-	uint16_t init_ctrl_reg_2;
-	uint16_t oem_reserved[16];
-	uint16_t swdpins_reg;
-	uint16_t circuit_ctrl_reg;
-	uint8_t d3_power;
-	uint8_t d0_power;
-	uint16_t reserved2[28];
-	uint16_t checksum;
+	u8 mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];
+	u16 compatibility;
+	u16 reserved1[4];
+	u32 pba_number;
+	u16 init_ctrl_reg_1;
+	u16 subsystem_id;
+	u16 subvendor_id;
+	u16 device_id;
+	u16 vendor_id;
+	u16 init_ctrl_reg_2;
+	u16 oem_reserved[16];
+	u16 swdpins_reg;
+	u16 circuit_ctrl_reg;
+	u8 d3_power;
+	u8 d0_power;
+	u16 reserved2[28];
+	u16 checksum;
 };
 
 /* EEPROM Functions */
-uint16_t ixgb_read_eeprom(struct ixgb_hw *hw, uint16_t reg);
+u16 ixgb_read_eeprom(struct ixgb_hw *hw, u16 reg);
 
 boolean_t ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
 
 void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
 
-void ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t reg, uint16_t data);
+void ixgb_write_eeprom(struct ixgb_hw *hw, u16 reg, u16 data);
 
 #endif				/* IXGB_EE_H */

drivers/net/ixgb/ixgb_ethtool.c

@@ -91,7 +91,7 @@ static int
 ixgb_ethtool_promiscuous(struct ixgb_adapter *adapter,
 			 struct ethtool_pmode *pmode)
 {
-	uint32_t rctl = IXGB_READ_REG(&adapter->hw, RCTL);
+	u32 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
 
 	pmode->rctl_old = rctl;
 	if (pmode->upe)
@@ -112,7 +112,7 @@ ixgb_ethtool_promiscuous(struct ixgb_adapter *adapter,
 }
 #endif
 
-#define IXGB_REG_DUMP_LEN  136*sizeof(uint32_t)
+#define IXGB_REG_DUMP_LEN  136*sizeof(u32)
 static void
 ixgb_ethtool_gdrvinfo(struct ixgb_adapter *adapter,
 		      struct ethtool_drvinfo *drvinfo)
@@ -131,12 +131,12 @@ ixgb_ethtool_gdrvinfo(struct ixgb_adapter *adapter,
 #define IXGB_GET_STAT(_A_, _R_) _A_->stats._R_
 static void
 ixgb_ethtool_gregs(struct ixgb_adapter *adapter,
-		   struct ethtool_regs *regs, uint8_t * regs_buff)
+		   struct ethtool_regs *regs, u8 * regs_buff)
 {
 	struct ixgb_hw *hw = &adapter->hw;
-	uint32_t *reg = (uint32_t *) regs_buff;
-	uint32_t *reg_start = reg;
-	uint8_t i;
+	u32 *reg = (u32 *) regs_buff;
+	u32 *reg_start = reg;
+	u8 i;
 
 	regs->version =
 	    (adapter->hw.device_id << 16) | adapter->hw.subsystem_id;
@@ -273,13 +273,13 @@ ixgb_ethtool_gregs(struct ixgb_adapter *adapter,
 
 #if 0
 #endif
-	regs->len = (reg - reg_start) * sizeof (uint32_t);
+	regs->len = (reg - reg_start) * sizeof (u32);
 }
 #endif				/* ETHTOOL_GREGS */
 
 static int
 ixgb_ethtool_geeprom(struct ixgb_adapter *adapter,
-		     struct ethtool_eeprom *eeprom, uint16_t * eeprom_buff)
+		     struct ethtool_eeprom *eeprom, u16 * eeprom_buff)
 {
 	struct ixgb_hw *hw = &adapter->hw;
 	int i, max_len, first_word, last_word;
@@ -315,7 +315,7 @@ ixgb_ethtool_seeprom(struct ixgb_adapter *adapter,
 		     struct ethtool_eeprom *eeprom, void *user_data)
 {
 	struct ixgb_hw *hw = &adapter->hw;
-	uint16_t eeprom_buff[256];
+	u16 eeprom_buff[256];
 	int i, max_len, first_word, last_word;
 	void *ptr;
 
@@ -413,9 +413,9 @@ ixgb_ethtool_ioctl(struct net_device *netdev, struct ifreq *ifr)
 {
 	struct ixgb_adapter *adapter = netdev->priv;
 	void *addr = ifr->ifr_data;
-	uint32_t cmd;
+	u32 cmd;
 
-	if (get_user(cmd, (uint32_t *) addr))
+	if (get_user(cmd, (u32 *) addr))
 		return -EFAULT;
 
 	switch (cmd) {
@@ -467,7 +467,7 @@ ixgb_ethtool_ioctl(struct net_device *netdev, struct ifreq *ifr)
 #if defined(ETHTOOL_GREGS) && defined(ETHTOOL_GEEPROM)
 	case ETHTOOL_GREGS:{
 			struct ethtool_regs regs = { ETHTOOL_GREGS };
-			uint8_t regs_buff[IXGB_REG_DUMP_LEN];
+			u8 regs_buff[IXGB_REG_DUMP_LEN];
 
 			ixgb_ethtool_gregs(adapter, &regs, regs_buff);
 
@@ -513,7 +513,7 @@ ixgb_ethtool_ioctl(struct net_device *netdev, struct ifreq *ifr)
 
 	case ETHTOOL_GEEPROM:{
 			struct ethtool_eeprom eeprom = { ETHTOOL_GEEPROM };
-			uint16_t eeprom_buff[IXGB_EEPROM_SIZE];
+			u16 eeprom_buff[IXGB_EEPROM_SIZE];
 			void *ptr;
 			int err;
 

drivers/net/ixgb/ixgb_hw.c

@@ -34,24 +34,24 @@
 
 /*  Local function prototypes */
 
-static uint32_t ixgb_hash_mc_addr(struct ixgb_hw *hw, uint8_t * mc_addr);
+static u32 ixgb_hash_mc_addr(struct ixgb_hw *hw, u8 * mc_addr);
 
-static void ixgb_mta_set(struct ixgb_hw *hw, uint32_t hash_value);
+static void ixgb_mta_set(struct ixgb_hw *hw, u32 hash_value);
 
 static void ixgb_get_bus_info(struct ixgb_hw *hw);
 
-boolean_t mac_addr_valid(uint8_t * mac_addr);
+boolean_t mac_addr_valid(u8 * mac_addr);
 
 static boolean_t ixgb_link_reset(struct ixgb_hw *hw);
 
 static void ixgb_optics_reset(struct ixgb_hw *hw);
 
-uint32_t ixgb_mac_reset(struct ixgb_hw *hw);
+u32 ixgb_mac_reset(struct ixgb_hw *hw);
 
-uint32_t
+u32
 ixgb_mac_reset(struct ixgb_hw *hw)
 {
-	uint32_t ctrl_reg;
+	u32 ctrl_reg;
 
 	/* Setup up hardware to known state with RESET.  */
 	ctrl_reg = IXGB_CTRL0_RST | IXGB_CTRL0_SDP3_DIR |	/* All pins are Output=1 */
@@ -84,8 +84,8 @@ ixgb_mac_reset(struct ixgb_hw *hw)
 boolean_t
 ixgb_adapter_stop(struct ixgb_hw * hw)
 {
-	uint32_t ctrl_reg;
-	uint32_t icr_reg;
+	u32 ctrl_reg;
+	u32 icr_reg;
 
 	DEBUGFUNC("ixgb_adapter_stop");
 
@@ -153,8 +153,8 @@ ixgb_adapter_stop(struct ixgb_hw * hw)
 boolean_t
 ixgb_init_hw(struct ixgb_hw * hw)
 {
-	uint32_t i;
-	uint32_t ctrl_reg;
+	u32 i;
+	u32 ctrl_reg;
 	boolean_t status;
 
 	DEBUGFUNC("ixgb_init_hw");
@@ -235,7 +235,7 @@ ixgb_init_hw(struct ixgb_hw * hw)
 void
 ixgb_init_rx_addrs(struct ixgb_hw *hw)
 {
-	uint32_t i;
+	u32 i;
 
 	DEBUGFUNC("ixgb_init_rx_addrs");
 
@@ -294,12 +294,12 @@ ixgb_init_rx_addrs(struct ixgb_hw *hw)
  *****************************************************************************/
 void
 ixgb_mc_addr_list_update(struct ixgb_hw *hw,
-			 uint8_t * mc_addr_list,
-			 uint32_t mc_addr_count, uint32_t pad)
+			 u8 * mc_addr_list,
+			 u32 mc_addr_count, u32 pad)
 {
-	uint32_t hash_value;
-	uint32_t i;
-	uint32_t rar_used_count = 1;	/* RAR[0] is used for our MAC address */
+	u32 hash_value;
+	u32 i;
+	u32 rar_used_count = 1;	/* RAR[0] is used for our MAC address */
 
 	DEBUGFUNC("ixgb_mc_addr_list_update");
 
@@ -371,10 +371,10 @@ ixgb_mc_addr_list_update(struct ixgb_hw *hw,
  * Returns:
  *      The hash value
  *****************************************************************************/
-static uint32_t
-ixgb_hash_mc_addr(struct ixgb_hw *hw, uint8_t * mc_addr)
+static u32
+ixgb_hash_mc_addr(struct ixgb_hw *hw, u8 * mc_addr)
 {
-	uint32_t hash_value = 0;
+	u32 hash_value = 0;
 
 	DEBUGFUNC("ixgb_hash_mc_addr");
 
@@ -388,18 +388,18 @@ ixgb_hash_mc_addr(struct ixgb_hw *hw, uint8_t * mc_addr)
 	case 0:
 		/* [47:36] i.e. 0x563 for above example address */
 		hash_value =
-		    ((mc_addr[4] >> 4) | (((uint16_t) mc_addr[5]) << 4));
+		    ((mc_addr[4] >> 4) | (((u16) mc_addr[5]) << 4));
 		break;
 	case 1:		/* [46:35] i.e. 0xAC6 for above example address */
 		hash_value =
-		    ((mc_addr[4] >> 3) | (((uint16_t) mc_addr[5]) << 5));
+		    ((mc_addr[4] >> 3) | (((u16) mc_addr[5]) << 5));
 		break;
 	case 2:		/* [45:34] i.e. 0x5D8 for above example address */
 		hash_value =
-		    ((mc_addr[4] >> 2) | (((uint16_t) mc_addr[5]) << 6));
+		    ((mc_addr[4] >> 2) | (((u16) mc_addr[5]) << 6));
 		break;
 	case 3:		/* [43:32] i.e. 0x634 for above example address */
-		hash_value = ((mc_addr[4]) | (((uint16_t) mc_addr[5]) << 8));
+		hash_value = ((mc_addr[4]) | (((u16) mc_addr[5]) << 8));
 		break;
 	default:
 		/* Invalid mc_filter_type, what should we do? */
@@ -419,10 +419,10 @@ ixgb_hash_mc_addr(struct ixgb_hw *hw, uint8_t * mc_addr)
  * hash_value - Multicast address hash value
  *****************************************************************************/
 static void
-ixgb_mta_set(struct ixgb_hw *hw, uint32_t hash_value)
+ixgb_mta_set(struct ixgb_hw *hw, u32 hash_value)
 {
-	uint32_t hash_bit, hash_reg;
-	uint32_t mta_reg;
+	u32 hash_bit, hash_reg;
+	u32 mta_reg;
 
 	/* The MTA is a register array of 128 32-bit registers.  
 	 * It is treated like an array of 4096 bits.  We want to set 
@@ -452,21 +452,21 @@ ixgb_mta_set(struct ixgb_hw *hw, uint32_t hash_value)
  * index - Receive address register to write
  *****************************************************************************/
 void
-ixgb_rar_set(struct ixgb_hw *hw, uint8_t * addr, uint32_t index)
+ixgb_rar_set(struct ixgb_hw *hw, u8 * addr, u32 index)
 {
-	uint32_t rar_low, rar_high;
+	u32 rar_low, rar_high;
 
 	DEBUGFUNC("ixgb_rar_set");
 
 	/* HW expects these in little endian so we reverse the byte order
 	 * from network order (big endian) to little endian              
 	 */
-	rar_low = ((uint32_t) addr[0] |
-		   ((uint32_t) addr[1] << 8) |
-		   ((uint32_t) addr[2] << 16) | ((uint32_t) addr[3] << 24));
+	rar_low = ((u32) addr[0] |
+		   ((u32) addr[1] << 8) |
+		   ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
 
-	rar_high = ((uint32_t) addr[4] |
-		    ((uint32_t) addr[5] << 8) | IXGB_RAH_AV);
+	rar_high = ((u32) addr[4] |
+		    ((u32) addr[5] << 8) | IXGB_RAH_AV);
 
 	IXGB_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low);
 	IXGB_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high);
@@ -481,7 +481,7 @@ ixgb_rar_set(struct ixgb_hw *hw, uint8_t * addr, uint32_t index)
  * value - Value to write into VLAN filter table
  *****************************************************************************/
 void
-ixgb_write_vfta(struct ixgb_hw *hw, uint32_t offset, uint32_t value)
+ixgb_write_vfta(struct ixgb_hw *hw, u32 offset, u32 value)
 {
 	IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, value);
 	return;
@@ -495,7 +495,7 @@ ixgb_write_vfta(struct ixgb_hw *hw, uint32_t offset, uint32_t value)
 void
 ixgb_clear_vfta(struct ixgb_hw *hw)
 {
-	uint32_t offset;
+	u32 offset;
 
 	for (offset = 0; offset < IXGB_VLAN_FILTER_TBL_SIZE; offset++)
 		IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, 0);
@@ -511,8 +511,8 @@ ixgb_clear_vfta(struct ixgb_hw *hw)
 boolean_t
 ixgb_setup_fc(struct ixgb_hw * hw)
 {
-	uint32_t ctrl_reg;
-	uint32_t pap_reg = 0;	/* by default, assume no pause time */
+	u32 ctrl_reg;
+	u32 pap_reg = 0;	/* by default, assume no pause time */
 	boolean_t status = TRUE;
 
 	DEBUGFUNC("ixgb_setup_fc");
@@ -607,14 +607,14 @@ ixgb_setup_fc(struct ixgb_hw * hw)
  * This requires that first an address cycle command is sent, followed by a
  * read command.
  *****************************************************************************/
-uint16_t
+u16
 ixgb_read_phy_reg(struct ixgb_hw * hw,
-		  uint32_t reg_address,
-		  uint32_t phy_address, uint32_t device_type)
+		  u32 reg_address,
+		  u32 phy_address, u32 device_type)
 {
-	uint32_t i;
-	uint32_t data;
-	uint32_t command = 0;
+	u32 i;
+	u32 data;
+	u32 command = 0;
 
 	ASSERT(reg_address <= IXGB_MAX_PHY_REG_ADDRESS);
 	ASSERT(phy_address <= IXGB_MAX_PHY_ADDRESS);
@@ -677,7 +677,7 @@ ixgb_read_phy_reg(struct ixgb_hw * hw,
 	 */
 	data = IXGB_READ_REG(hw, MSRWD);
 	data >>= IXGB_MSRWD_READ_DATA_SHIFT;
-	return ((uint16_t) data);
+	return ((u16) data);
 }
 
 /******************************************************************************
@@ -698,18 +698,18 @@ ixgb_read_phy_reg(struct ixgb_hw * hw,
  *****************************************************************************/
 void
 ixgb_write_phy_reg(struct ixgb_hw *hw,
-		   uint32_t reg_address,
-		   uint32_t phy_address, uint32_t device_type, uint16_t data)
+		   u32 reg_address,
+		   u32 phy_address, u32 device_type, u16 data)
 {
-	uint32_t i;
-	uint32_t command = 0;
+	u32 i;
+	u32 command = 0;
 
 	ASSERT(reg_address <= IXGB_MAX_PHY_REG_ADDRESS);
 	ASSERT(phy_address <= IXGB_MAX_PHY_ADDRESS);
 	ASSERT(device_type <= IXGB_MAX_PHY_DEV_TYPE);
 
 	/* Put the data in the MDIO Read/Write Data register */
-	IXGB_WRITE_REG(hw, MSRWD, (uint32_t) data);
+	IXGB_WRITE_REG(hw, MSRWD, (u32) data);
 
 	/* Setup and write the address cycle command */
 	command = ((reg_address << IXGB_MSCA_NP_ADDR_SHIFT) |
@@ -776,8 +776,8 @@ ixgb_write_phy_reg(struct ixgb_hw *hw,
 void
 ixgb_check_for_link(struct ixgb_hw *hw)
 {
-	uint32_t status_reg;
-	uint32_t xpcss_reg;
+	u32 status_reg;
+	u32 xpcss_reg;
 
 	DEBUGFUNC("ixgb_check_for_link");
 
@@ -801,7 +801,7 @@ ixgb_check_for_link(struct ixgb_hw *hw)
 boolean_t
 ixgb_check_for_bad_link(struct ixgb_hw *hw)
 {
-	uint32_t newLFC, newRFC;
+	u32 newLFC, newRFC;
 	boolean_t bad_link_returncode = FALSE;
 
 	/* check for a bad reset that may have occured
@@ -827,7 +827,7 @@ ixgb_check_for_bad_link(struct ixgb_hw *hw)
 void
 ixgb_clear_hw_cntrs(struct ixgb_hw *hw)
 {
-	volatile uint32_t temp_reg;
+	volatile u32 temp_reg;
 
 	DEBUGFUNC("ixgb_clear_hw_cntrs");
 
@@ -908,7 +908,7 @@ ixgb_clear_hw_cntrs(struct ixgb_hw *hw)
 void
 ixgb_led_on(struct ixgb_hw *hw)
 {
-	uint32_t ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
+	u32 ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
 
 	/* To turn on the LED, clear software-definable pin 0 (SDP0). */
 	ctrl0_reg &= ~IXGB_CTRL0_SDP0;
@@ -924,7 +924,7 @@ ixgb_led_on(struct ixgb_hw *hw)
 void
 ixgb_led_off(struct ixgb_hw *hw)
 {
-	uint32_t ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
+	u32 ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
 
 	/* To turn off the LED, set software-definable pin 0 (SDP0). */
 	ctrl0_reg |= IXGB_CTRL0_SDP0;
@@ -940,7 +940,7 @@ ixgb_led_off(struct ixgb_hw *hw)
 static void
 ixgb_get_bus_info(struct ixgb_hw *hw)
 {
-	uint32_t status_reg;
+	u32 status_reg;
 
 	status_reg = IXGB_READ_REG(hw, STATUS);
 
@@ -980,7 +980,7 @@ ixgb_get_bus_info(struct ixgb_hw *hw)
  *
  *****************************************************************************/
 boolean_t
-mac_addr_valid(uint8_t * mac_addr)
+mac_addr_valid(u8 * mac_addr)
 {
 	boolean_t is_valid = TRUE;
 	DEBUGFUNC("mac_addr_valid");
@@ -1016,8 +1016,8 @@ boolean_t
 ixgb_link_reset(struct ixgb_hw * hw)
 {
 	boolean_t link_status = FALSE;
-	uint8_t wait_retries = MAX_RESET_ITERATIONS;
-	uint8_t lrst_retries = MAX_RESET_ITERATIONS;
+	u8 wait_retries = MAX_RESET_ITERATIONS;
+	u8 lrst_retries = MAX_RESET_ITERATIONS;
 
 	do {
 		IXGB_WRITE_REG(hw, CTRL0,
@@ -1043,7 +1043,7 @@ ixgb_link_reset(struct ixgb_hw * hw)
 void
 ixgb_optics_reset(struct ixgb_hw *hw)
 {
-	uint16_t mdio_reg;
+	u16 mdio_reg;
 
 	ixgb_write_phy_reg(hw,
 			   TXN17401_PMA_PMD_CR1,

drivers/net/ixgb/ixgb_hw.h

@@ -367,11 +367,11 @@ typedef enum {
 
 struct ixgb_rx_desc {
 	uint64_t buff_addr;
-	uint16_t length;
-	uint16_t reserved;
-	uint8_t status;
-	uint8_t errors;
-	uint16_t special;
+	u16 length;
+	u16 reserved;
+	u8 status;
+	u8 errors;
+	u16 special;
 };
 
 #define IXGB_RX_DESC_STATUS_DD    0x01
@@ -390,10 +390,10 @@ struct ixgb_rx_desc {
 
 struct ixgb_tx_desc {
 	uint64_t buff_addr;
-	uint32_t cmd_type_len;
-	uint8_t status;
-	uint8_t popts;
-	uint16_t vlan;
+	u32 cmd_type_len;
+	u8 status;
+	u8 popts;
+	u16 vlan;
 };
 
 #define IXGB_TX_DESC_CMD_EOP        0x01000000
@@ -410,16 +410,16 @@ struct ixgb_tx_desc {
 #define IXGB_TX_DESC_POPTS_TXSM 0x02
 
 struct ixgb_context_desc {
-	uint8_t ipcss;
-	uint8_t ipcso;
-	uint16_t ipcse;
-	uint8_t tucss;
-	uint8_t tucso;
-	uint16_t tucse;
-	uint32_t cmd_type_len;
-	uint8_t status;
-	uint8_t hdr_len;
-	uint16_t mss;
+	u8 ipcss;
+	u8 ipcso;
+	u16 ipcse;
+	u8 tucss;
+	u8 tucso;
+	u16 tucse;
+	u32 cmd_type_len;
+	u8 status;
+	u8 hdr_len;
+	u16 mss;
 };
 
 #define IXGB_CONTEXT_DESC_CMD_TCP 0x01000000
@@ -448,19 +448,19 @@ struct ixgb_context_desc {
  * This is a little-endian specific check.
  */
 #define IS_MULTICAST(Address) \
-    (boolean_t)(((uint8_t *)(Address))[0] & ((uint8_t)0x01))
+    (boolean_t)(((u8 *)(Address))[0] & ((u8)0x01))
 
 /*
  * Check whether an address is broadcast.
  */
 #define IS_BROADCAST(Address)               \
-    ((((uint8_t *)(Address))[0] == ((uint8_t)0xff)) && (((uint8_t *)(Address))[1] == ((uint8_t)0xff)))
+    ((((u8 *)(Address))[0] == ((u8)0xff)) && (((u8 *)(Address))[1] == ((u8)0xff)))
 
 /* Flow control parameters */
 struct ixgb_fc {
-	uint32_t high_water;	/* Flow Control High-water          */
-	uint32_t low_water;	/* Flow Control Low-water           */
-	uint16_t pause_time;	/* Flow Control Pause timer         */
+	u32 high_water;	/* Flow Control High-water          */
+	u32 low_water;	/* Flow Control Low-water           */
+	u16 pause_time;	/* Flow Control Pause timer         */
 	boolean_t send_xon;	/* Flow control send XON            */
 	ixgb_fc_type type;	/* Type of flow control             */
 };
@@ -480,32 +480,32 @@ struct ixgb_bus {
 };
 
 struct ixgb_hw {
-	uint8_t *hw_addr;	/* Base Address of the hardware     */
+	u8 *hw_addr;	/* Base Address of the hardware     */
 	void *back;		/* Pointer to OS-dependent struct   */
 	struct ixgb_fc fc;	/* Flow control parameters          */
 	struct ixgb_bus bus;	/* Bus parameters                   */
-	uint32_t phy_id;	/* Phy Identifier                   */
-	uint32_t phy_addr;	/* XGMII address of Phy             */
+	u32 phy_id;	/* Phy Identifier                   */
+	u32 phy_addr;	/* XGMII address of Phy             */
 	ixgb_mac_type mac_type;	/* Identifier for MAC controller    */
-	uint32_t max_frame_size;	/* Maximum frame size supported     */
-	uint32_t mc_filter_type;	/* Multicast filter hash type       */
-	uint32_t num_mc_addrs;	/* Number of current Multicast addrs */
-	uint8_t curr_mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];	/* Individual address currently programmed in MAC */
-	uint32_t num_tx_desc;	/* Number of Transmit descriptors   */
-	uint32_t num_rx_desc;	/* Number of Receive descriptors    */
-	uint32_t rx_buffer_size;	/* Size of Receive buffer           */
+	u32 max_frame_size;	/* Maximum frame size supported     */
+	u32 mc_filter_type;	/* Multicast filter hash type       */
+	u32 num_mc_addrs;	/* Number of current Multicast addrs */
+	u8 curr_mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];	/* Individual address currently programmed in MAC */
+	u32 num_tx_desc;	/* Number of Transmit descriptors   */
+	u32 num_rx_desc;	/* Number of Receive descriptors    */
+	u32 rx_buffer_size;	/* Size of Receive buffer           */
 	boolean_t link_up;	/* TRUE if link is valid            */
 	boolean_t adapter_stopped;	/* State of adapter                 */
-	uint16_t device_id;	/* device id from PCI configuration space */
-	uint16_t vendor_id;	/* vendor id from PCI configuration space */
-	uint8_t revision_id;	/* revision id from PCI configuration space */
-	uint16_t subsystem_vendor_id;	/* subsystem vendor id from PCI configuration space */
-	uint16_t subsystem_id;	/* subsystem id from PCI configuration space */
-	uint16_t pci_cmd_word;	/* PCI command register id from PCI configuration space */
-	uint16_t eeprom[IXGB_EEPROM_SIZE];	/* EEPROM contents read at init time  */
+	u16 device_id;	/* device id from PCI configuration space */
+	u16 vendor_id;	/* vendor id from PCI configuration space */
+	u8 revision_id;	/* revision id from PCI configuration space */
+	u16 subsystem_vendor_id;	/* subsystem vendor id from PCI configuration space */
+	u16 subsystem_id;	/* subsystem id from PCI configuration space */
+	u16 pci_cmd_word;	/* PCI command register id from PCI configuration space */
+	u16 eeprom[IXGB_EEPROM_SIZE];	/* EEPROM contents read at init time  */
 	uint64_t io_base;	/* Our I/O mapped location */
-	uint32_t lastLFC;
-	uint32_t lastRFC;
+	u32 lastLFC;
+	u32 lastRFC;
 };
 
 struct ixgb_hw_stats {
@@ -580,48 +580,48 @@ extern void ixgb_check_for_link(struct ixgb_hw *hw);
 extern boolean_t ixgb_check_for_bad_link(struct ixgb_hw *hw);
 extern boolean_t ixgb_setup_fc(struct ixgb_hw *hw);
 extern void ixgb_clear_hw_cntrs(struct ixgb_hw *hw);
-extern boolean_t mac_addr_valid(uint8_t * mac_addr);
+extern boolean_t mac_addr_valid(u8 * mac_addr);
 
-extern uint16_t ixgb_read_phy_reg(struct ixgb_hw *hw,
-				  uint32_t reg_addr,
-				  uint32_t phy_addr, uint32_t device_type);
+extern u16 ixgb_read_phy_reg(struct ixgb_hw *hw,
+				  u32 reg_addr,
+				  u32 phy_addr, u32 device_type);
 
 extern void ixgb_write_phy_reg(struct ixgb_hw *hw,
-			       uint32_t reg_addr,
-			       uint32_t phy_addr,
-			       uint32_t device_type, uint16_t data);
+			       u32 reg_addr,
+			       u32 phy_addr,
+			       u32 device_type, u16 data);
 
-extern void ixgb_rar_set(struct ixgb_hw *hw, uint8_t * addr, uint32_t index);
+extern void ixgb_rar_set(struct ixgb_hw *hw, u8 * addr, u32 index);
 
 /* Filters (multicast, vlan, receive) */
 extern void ixgb_mc_addr_list_update(struct ixgb_hw *hw,
-				     uint8_t * mc_addr_list,
-				     uint32_t mc_addr_count, uint32_t pad);
+				     u8 * mc_addr_list,
+				     u32 mc_addr_count, u32 pad);
 
 /* Vfta functions */
 extern void ixgb_write_vfta(struct ixgb_hw *hw,
-			    uint32_t offset, uint32_t value);
+			    u32 offset, u32 value);
 
 extern void ixgb_clear_vfta(struct ixgb_hw *hw);
 
 /* Access functions to eeprom data */
-void ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t * mac_addr);
-uint16_t ixgb_get_ee_compatibility(struct ixgb_hw *hw);
-uint32_t ixgb_get_ee_pba_number(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_subsystem_id(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_subvendor_id(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_device_id(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_vendor_id(struct ixgb_hw *hw);
-uint16_t ixgb_get_ee_swdpins_reg(struct ixgb_hw *hw);
-uint8_t ixgb_get_ee_d3_power(struct ixgb_hw *hw);
-uint8_t ixgb_get_ee_d0_power(struct ixgb_hw *hw);
+void ixgb_get_ee_mac_addr(struct ixgb_hw *hw, u8 * mac_addr);
+u16 ixgb_get_ee_compatibility(struct ixgb_hw *hw);
+u32 ixgb_get_ee_pba_number(struct ixgb_hw *hw);
+u16 ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw *hw);
+u16 ixgb_get_ee_init_ctrl_reg_2(struct ixgb_hw *hw);
+u16 ixgb_get_ee_subsystem_id(struct ixgb_hw *hw);
+u16 ixgb_get_ee_subvendor_id(struct ixgb_hw *hw);
+u16 ixgb_get_ee_device_id(struct ixgb_hw *hw);
+u16 ixgb_get_ee_vendor_id(struct ixgb_hw *hw);
+u16 ixgb_get_ee_swdpins_reg(struct ixgb_hw *hw);
+u8 ixgb_get_ee_d3_power(struct ixgb_hw *hw);
+u8 ixgb_get_ee_d0_power(struct ixgb_hw *hw);
 boolean_t ixgb_get_eeprom_data(struct ixgb_hw *hw);
 
 /* Everything else */
 void ixgb_led_on(struct ixgb_hw *hw);
 void ixgb_led_off(struct ixgb_hw *hw);
-void ixgb_write_pci_cfg(struct ixgb_hw *hw, uint32_t reg, uint16_t * value);
+void ixgb_write_pci_cfg(struct ixgb_hw *hw, u32 reg, u16 * value);
 
 #endif				/* _IXGB_HW_H_ */

drivers/net/ixgb/ixgb_main.c

@@ -95,8 +95,8 @@ static void ixgb_tx_timeout(struct net_device *netdev);
 static void ixgb_tx_timeout_task(struct net_device *netdev);
 static void ixgb_vlan_rx_register(struct net_device *netdev,
 				  struct vlan_group *grp);
-static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
-static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
+static void ixgb_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
+static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
 static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
 static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
 static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
@@ -118,7 +118,7 @@ static inline void ixgb_rx_checksum(struct ixgb_adapter *adapter,
 				    struct sk_buff *skb);
 static int ixgb_notify_reboot(struct notifier_block *, unsigned long event,
 			      void *ptr);
-static int ixgb_suspend(struct pci_dev *pdev, uint32_t state);
+static int ixgb_suspend(struct pci_dev *pdev, u32 state);
 
 struct notifier_block ixgb_notifier_reboot = {
 	.notifier_call	= ixgb_notify_reboot,
@@ -653,8 +653,8 @@ ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
 static void
 ixgb_configure_tx(struct ixgb_adapter *adapter)
 {
-	uint32_t tctl;
-	uint32_t tdlen = adapter->tx_ring.count * sizeof (struct ixgb_tx_desc);
+	u32 tctl;
+	u32 tdlen = adapter->tx_ring.count * sizeof (struct ixgb_tx_desc);
 	uint64_t tdba = adapter->tx_ring.dma;
 	struct ixgb_hw *hw = &adapter->hw;
 
@@ -751,7 +751,7 @@ ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
 static void
 ixgb_setup_rctl(struct ixgb_adapter *adapter)
 {
-	uint32_t rctl;
+	u32 rctl;
 
 	rctl = IXGB_READ_REG(&adapter->hw, RCTL);
 
@@ -795,10 +795,10 @@ static void
 ixgb_configure_rx(struct ixgb_adapter *adapter)
 {
 	uint64_t rdba = adapter->rx_ring.dma;
-	uint32_t rdlen = adapter->rx_ring.count * sizeof (struct ixgb_rx_desc);
+	u32 rdlen = adapter->rx_ring.count * sizeof (struct ixgb_rx_desc);
 	struct ixgb_hw *hw = &adapter->hw;
-	uint32_t rctl;
-	uint32_t rxcsum;
+	u32 rctl;
+	u32 rxcsum;
 
 	IXGB_DBG("ixgb_configure_rx\n");
 
@@ -820,7 +820,7 @@ ixgb_configure_rx(struct ixgb_adapter *adapter)
 	IXGB_WRITE_REG(hw, RDT, 0);
 
 	{
-		uint32_t rxdctl;
+		u32 rxdctl;
 		/* burst 16 or burst when RXT0 */
 		rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT
 		    | RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT
@@ -829,8 +829,8 @@ ixgb_configure_rx(struct ixgb_adapter *adapter)
 	}
 
 	if (adapter->raidc) {
-		uint32_t raidc;
-		uint8_t poll_threshold;
+		u32 raidc;
+		u8 poll_threshold;
 
 		/* Poll every rx_int_delay period, if RBD exists
 		 * Receive Backlog Detection is set to <threshold> 
@@ -1030,7 +1030,7 @@ ixgb_set_multi(struct net_device *netdev)
 {
 	struct ixgb_adapter *adapter = netdev->priv;
 	struct ixgb_hw *hw = &adapter->hw;
-	uint32_t rctl;
+	u32 rctl;
 	int i;
 	struct dev_mc_list *mc_ptr;
 
@@ -1053,7 +1053,7 @@ ixgb_set_multi(struct net_device *netdev)
 		rctl |= IXGB_RCTL_MPE;
 		IXGB_WRITE_REG(hw, RCTL, rctl);
 	} else {
-		uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
+		u8 mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
 
 		IXGB_WRITE_REG(hw, RCTL, rctl);
 
@@ -1148,8 +1148,8 @@ ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
 #ifdef NETIF_F_TSO
 	struct ixgb_context_desc *context_desc;
 	int i;
-	uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
-	uint16_t ipcse, tucse, mss;
+	u8 ipcss, ipcso, tucss, tucso, hdr_len;
+	u16 ipcse, tucse, mss;
 
 	if (likely(skb_shinfo(skb)->tso_size)) {
 		hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
@@ -1213,7 +1213,7 @@ ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
 {
 	struct ixgb_context_desc *context_desc;
 	int i;
-	uint8_t css, cso;
+	u8 css, cso;
 
 	if (likely(skb->ip_summed == CHECKSUM_HW)) {
 		css = skb->h.raw - skb->data;
@@ -1225,7 +1225,7 @@ ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
 		context_desc->tucso = cso;
 		context_desc->tucse = 0;
 		/* zero out any previously existing data in one instruction */
-		*(uint32_t *) & (context_desc->ipcss) = 0;
+		*(u32 *) & (context_desc->ipcss) = 0;
 		context_desc->status = 0;
 		context_desc->hdr_len = 0;
 		context_desc->mss = 0;
@@ -1320,9 +1320,9 @@ ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,
 {
 	struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
 	struct ixgb_tx_desc *tx_desc = NULL;
-	uint32_t cmd_type_len = adapter->tx_cmd_type;
-	uint8_t status = 0;
-	uint8_t popts = 0;
+	u32 cmd_type_len = adapter->tx_cmd_type;
+	u8 status = 0;
+	u8 popts = 0;
 	int i;
 
 	if (tx_flags & IXGB_TX_FLAGS_TSO) {
@@ -1486,7 +1486,7 @@ static int
 ixgb_change_mtu(struct net_device *netdev, int new_mtu)
 {
 	struct ixgb_adapter *adapter = netdev->priv;
-	uint32_t old_mtu = adapter->rx_buffer_len;
+	u32 old_mtu = adapter->rx_buffer_len;
 	int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
 
 	IXGB_DBG("ixgb_change_mtu\n");
@@ -1527,7 +1527,7 @@ ixgb_change_mtu(struct net_device *netdev, int new_mtu)
 
 		if (hw->max_frame_size >
 		    IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
-			uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
+			u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
 
 			if (!(ctrl0 & IXGB_CTRL0_JFE)) {
 				ctrl0 |= IXGB_CTRL0_JFE;
@@ -1727,7 +1727,7 @@ ixgb_intr(int irq, void *data, struct pt_regs *regs)
 	}
 #else
 	struct ixgb_hw *hw = &adapter->hw;
-	uint32_t icr;
+	u32 icr;
 	uint i = IXGB_MAX_INTR;
 	boolean_t rxdmt0 = FALSE;
 
@@ -1763,7 +1763,7 @@ static int
 ixgb_process_intr(struct net_device *netdev)
 {
 	struct ixgb_adapter *adapter = netdev->priv;
-	uint32_t icr;
+	u32 icr;
 	int i = IXGB_MAX_INTR;
 	int hasReceived = 0;
 
@@ -1816,7 +1816,7 @@ ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
 			tx_ring->buffer_info[i].skb = NULL;
 		}
 
-		*(uint32_t *) & (tx_desc->status) = 0;
+		*(u32 *) & (tx_desc->status) = 0;
 
 		i = (i + 1) % tx_ring->count;
 		tx_desc = IXGB_TX_DESC(*tx_ring, i);
@@ -1840,7 +1840,7 @@ ixgb_poll(struct net_device *netdev, int *budget)
 	struct pci_dev *pdev = adapter->pdev;
 	struct ixgb_rx_desc *rx_desc;
 	struct sk_buff *skb;
-	uint32_t length;
+	u32 length;
 	int i;
 	int received = 0;
 	int rx_work_limit = *budget;
@@ -1963,7 +1963,7 @@ ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
 	struct pci_dev *pdev = adapter->pdev;
 	struct ixgb_rx_desc *rx_desc;
 	struct sk_buff *skb;
-	uint32_t length;
+	u32 length;
 	int i;
 
 	i = rx_ring->next_to_clean;
@@ -2146,7 +2146,7 @@ static void
 ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
 {
 	struct ixgb_adapter *adapter = netdev->priv;
-	uint32_t ctrl, rctl;
+	u32 ctrl, rctl;
 
 	ixgb_irq_disable(adapter);
 	adapter->vlgrp = grp;
@@ -2184,10 +2184,10 @@ ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  **/
 
 static void
-ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
+ixgb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
 {
 	struct ixgb_adapter *adapter = netdev->priv;
-	uint32_t vfta, index;
+	u32 vfta, index;
 
 	/* add VID to filter table */
 
@@ -2204,10 +2204,10 @@ ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  **/
 
 static void
-ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
+ixgb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
 {
 	struct ixgb_adapter *adapter = netdev->priv;
-	uint32_t vfta, index;
+	u32 vfta, index;
 
 	ixgb_irq_disable(adapter);
 
@@ -2234,7 +2234,7 @@ ixgb_restore_vlan(struct ixgb_adapter *adapter)
 	ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
 
 	if (adapter->vlgrp) {
-		uint16_t vid;
+		u16 vid;
 		for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
 			if (!adapter->vlgrp->vlan_devices[vid])
 				continue;
@@ -2285,7 +2285,7 @@ ixgb_rx_checksum(struct ixgb_adapter *adapter,
  **/
 
 void
-ixgb_write_pci_cfg(struct ixgb_hw *hw, uint32_t reg, uint16_t * value)
+ixgb_write_pci_cfg(struct ixgb_hw *hw, u32 reg, u16 * value)
 {
 	struct ixgb_adapter *adapter = (struct ixgb_adapter *) hw->back;
 
@@ -2321,7 +2321,7 @@ ixgb_notify_reboot(struct notifier_block *nb, unsigned long event, void *p)
  * @param state power state to enter 
  **/
 static int
-ixgb_suspend(struct pci_dev *pdev, uint32_t state)
+ixgb_suspend(struct pci_dev *pdev, u32 state)
 {
 	struct net_device *netdev = pci_get_drvdata(pdev);
 	struct ixgb_adapter *adapter = netdev->priv;