Commit 9f13a1fd authored by Ben Hutchings's avatar Ben Hutchings Committed by Linus Torvalds

cpu: Register a generic CPU device on architectures that currently do not

frv, h8300, m68k, microblaze, openrisc, score, um and xtensa currently
do not register a CPU device.  Add the config option GENERIC_CPU_DEVICES
which causes a generic CPU device to be registered for each present CPU,
and make all these architectures select it.

Richard Weinberger <richard@nod.at> covered UML and suggested using
per_cpu.
Signed-off-by: default avatarBen Hutchings <ben@decadent.org.uk>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 024f7846
...@@ -8,6 +8,7 @@ config FRV ...@@ -8,6 +8,7 @@ config FRV
select HAVE_GENERIC_HARDIRQS select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW select GENERIC_IRQ_SHOW
select ARCH_HAVE_NMI_SAFE_CMPXCHG select ARCH_HAVE_NMI_SAFE_CMPXCHG
select GENERIC_CPU_DEVICES
config ZONE_DMA config ZONE_DMA
bool bool
......
...@@ -4,6 +4,7 @@ config H8300 ...@@ -4,6 +4,7 @@ config H8300
select HAVE_IDE select HAVE_IDE
select HAVE_GENERIC_HARDIRQS select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW select GENERIC_IRQ_SHOW
select GENERIC_CPU_DEVICES
config SYMBOL_PREFIX config SYMBOL_PREFIX
string string
......
...@@ -6,6 +6,7 @@ config M68K ...@@ -6,6 +6,7 @@ config M68K
select HAVE_GENERIC_HARDIRQS select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW select GENERIC_IRQ_SHOW
select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
select GENERIC_CPU_DEVICES
config RWSEM_GENERIC_SPINLOCK config RWSEM_GENERIC_SPINLOCK
bool bool
......
...@@ -18,6 +18,7 @@ config MICROBLAZE ...@@ -18,6 +18,7 @@ config MICROBLAZE
select GENERIC_IRQ_PROBE select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW select GENERIC_IRQ_SHOW
select GENERIC_PCI_IOMAP select GENERIC_PCI_IOMAP
select GENERIC_CPU_DEVICES
config SWAP config SWAP
def_bool n def_bool n
......
...@@ -15,6 +15,7 @@ config OPENRISC ...@@ -15,6 +15,7 @@ config OPENRISC
select GENERIC_IRQ_PROBE select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW select GENERIC_IRQ_SHOW
select GENERIC_IOMAP select GENERIC_IOMAP
select GENERIC_CPU_DEVICES
config MMU config MMU
def_bool y def_bool y
......
...@@ -8,6 +8,7 @@ config SCORE ...@@ -8,6 +8,7 @@ config SCORE
select HAVE_MEMBLOCK select HAVE_MEMBLOCK
select HAVE_MEMBLOCK_NODE_MAP select HAVE_MEMBLOCK_NODE_MAP
select ARCH_DISCARD_MEMBLOCK select ARCH_DISCARD_MEMBLOCK
select GENERIC_CPU_DEVICES
choice choice
prompt "System type" prompt "System type"
......
...@@ -8,6 +8,7 @@ config UML ...@@ -8,6 +8,7 @@ config UML
default y default y
select HAVE_GENERIC_HARDIRQS select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW select GENERIC_IRQ_SHOW
select GENERIC_CPU_DEVICES
config MMU config MMU
bool bool
......
...@@ -9,6 +9,7 @@ config XTENSA ...@@ -9,6 +9,7 @@ config XTENSA
select HAVE_IDE select HAVE_IDE
select HAVE_GENERIC_HARDIRQS select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW select GENERIC_IRQ_SHOW
select GENERIC_CPU_DEVICES
help help
Xtensa processors are 32-bit RISC machines designed by Tensilica Xtensa processors are 32-bit RISC machines designed by Tensilica
primarily for embedded systems. These processors are both primarily for embedded systems. These processors are both
......
...@@ -172,6 +172,10 @@ config SYS_HYPERVISOR ...@@ -172,6 +172,10 @@ config SYS_HYPERVISOR
bool bool
default n default n
config GENERIC_CPU_DEVICES
bool
default n
source "drivers/base/regmap/Kconfig" source "drivers/base/regmap/Kconfig"
config DMA_SHARED_BUFFER config DMA_SHARED_BUFFER
......
...@@ -11,6 +11,7 @@ ...@@ -11,6 +11,7 @@
#include <linux/device.h> #include <linux/device.h>
#include <linux/node.h> #include <linux/node.h>
#include <linux/gfp.h> #include <linux/gfp.h>
#include <linux/percpu.h>
#include "base.h" #include "base.h"
...@@ -275,11 +276,29 @@ bool cpu_is_hotpluggable(unsigned cpu) ...@@ -275,11 +276,29 @@ bool cpu_is_hotpluggable(unsigned cpu)
} }
EXPORT_SYMBOL_GPL(cpu_is_hotpluggable); EXPORT_SYMBOL_GPL(cpu_is_hotpluggable);
#ifdef CONFIG_GENERIC_CPU_DEVICES
static DEFINE_PER_CPU(struct cpu, cpu_devices);
#endif
static void __init cpu_dev_register_generic(void)
{
#ifdef CONFIG_GENERIC_CPU_DEVICES
int i;
for_each_possible_cpu(i) {
if (register_cpu(&per_cpu(cpu_devices, i), i))
panic("Failed to register CPU device");
}
#endif
}
void __init cpu_dev_init(void) void __init cpu_dev_init(void)
{ {
if (subsys_system_register(&cpu_subsys, cpu_root_attr_groups)) if (subsys_system_register(&cpu_subsys, cpu_root_attr_groups))
panic("Failed to register CPU subsystem"); panic("Failed to register CPU subsystem");
cpu_dev_register_generic();
#if defined(CONFIG_SCHED_MC) || defined(CONFIG_SCHED_SMT) #if defined(CONFIG_SCHED_MC) || defined(CONFIG_SCHED_SMT)
sched_create_sysfs_power_savings_entries(cpu_subsys.dev_root); sched_create_sysfs_power_savings_entries(cpu_subsys.dev_root);
#endif #endif
......
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