Commit 9f6bb3f5 authored by Kukjin Kim's avatar Kukjin Kim

ARM: S5P6440: Tidy register and disable clock usage

This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent cdb216de
......@@ -133,7 +133,7 @@ static struct clksrc_clk clk_pclk_low = {
* recommended to keep the following clocks disabled until the driver requests
* for enabling the clock.
*/
static struct clk init_clocks_disable[] = {
static struct clk init_clocks_off[] = {
{
.name = "nand",
.id = -1,
......@@ -602,8 +602,6 @@ static struct clk *clks[] __initdata = {
void __init s5p6440_register_clocks(void)
{
struct clk *clkp;
int ret;
int ptr;
s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
......@@ -614,16 +612,8 @@ void __init s5p6440_register_clocks(void)
s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
clkp = init_clocks_disable;
for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
ret = s3c24xx_register_clock(clkp);
if (ret < 0) {
printk(KERN_ERR "Failed to register clock %s (%d)\n",
clkp->name, ret);
}
(clkp->enable)(clkp, 0);
}
s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
s3c_pwmclk_init();
}
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