Commit a080bd99 authored by Chris Wilson's avatar Chris Wilson

drm/i915/gt: Update PMINTRMSK holding fw

If we use a non-forcewaked write to PMINTRMSK, it does not take effect
until much later, if at all, causing a loss of RPS interrupts and no GPU
reclocking, leaving the GPU running at the wrong frequency for long
periods of time.
Reported-by: default avatarFrancisco Jerez <currojerez@riseup.net>
Suggested-by: default avatarFrancisco Jerez <currojerez@riseup.net>
Fixes: 35cc7f32 ("drm/i915/gt: Use non-forcewake writes for RPS")
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Francisco Jerez <currojerez@riseup.net>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Andi Shyti <andi.shyti@intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@intel.com>
Reviewed-by: default avatarFrancisco Jerez <currojerez@riseup.net>
Cc: <stable@vger.kernel.org> # v5.6+
Link: https://patchwork.freedesktop.org/patch/msgid/20200415170318.16771-2-chris@chris-wilson.co.uk
parent 46495adc
...@@ -81,13 +81,14 @@ static void rps_enable_interrupts(struct intel_rps *rps) ...@@ -81,13 +81,14 @@ static void rps_enable_interrupts(struct intel_rps *rps)
events = (GEN6_PM_RP_UP_THRESHOLD | events = (GEN6_PM_RP_UP_THRESHOLD |
GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_THRESHOLD |
GEN6_PM_RP_DOWN_TIMEOUT); GEN6_PM_RP_DOWN_TIMEOUT);
WRITE_ONCE(rps->pm_events, events); WRITE_ONCE(rps->pm_events, events);
spin_lock_irq(&gt->irq_lock); spin_lock_irq(&gt->irq_lock);
gen6_gt_pm_enable_irq(gt, rps->pm_events); gen6_gt_pm_enable_irq(gt, rps->pm_events);
spin_unlock_irq(&gt->irq_lock); spin_unlock_irq(&gt->irq_lock);
set(gt->uncore, GEN6_PMINTRMSK, rps_pm_mask(rps, rps->cur_freq)); intel_uncore_write(gt->uncore,
GEN6_PMINTRMSK, rps_pm_mask(rps, rps->last_freq));
} }
static void gen6_rps_reset_interrupts(struct intel_rps *rps) static void gen6_rps_reset_interrupts(struct intel_rps *rps)
...@@ -120,7 +121,9 @@ static void rps_disable_interrupts(struct intel_rps *rps) ...@@ -120,7 +121,9 @@ static void rps_disable_interrupts(struct intel_rps *rps)
struct intel_gt *gt = rps_to_gt(rps); struct intel_gt *gt = rps_to_gt(rps);
WRITE_ONCE(rps->pm_events, 0); WRITE_ONCE(rps->pm_events, 0);
set(gt->uncore, GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u));
intel_uncore_write(gt->uncore,
GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u));
spin_lock_irq(&gt->irq_lock); spin_lock_irq(&gt->irq_lock);
gen6_gt_pm_disable_irq(gt, GEN6_PM_RPS_EVENTS); gen6_gt_pm_disable_irq(gt, GEN6_PM_RPS_EVENTS);
......
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