Commit a0a85ac4 authored by Dale Zhao's avatar Dale Zhao Committed by Alex Deucher

drm/amd/display: Disable pipe split for modes with borders

[Why]
For some special timing with border, like DMT 640*480 72Hz,
pipe split can't handle well. Thus, it will be black screen
for these special timing.

[How]
Disable pipe split for these timing with borders as W/A.
Signed-off-by: default avatarDale Zhao <dale.zhao@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8ae5b155
......@@ -2666,6 +2666,23 @@ int dcn20_validate_apply_pipe_split_flags(
if (plane_count > dc->res_pool->pipe_count / 2)
avoid_split = true;
/* W/A: Mode timing with borders may not work well with pipe split, avoid for this corner case */
for (i = 0; i < dc->res_pool->pipe_count; i++) {
struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
struct dc_crtc_timing timing;
if (!pipe->stream)
continue;
else {
timing = pipe->stream->timing;
if (timing.h_border_left + timing.h_border_right
+ timing.v_border_top + timing.v_border_bottom > 0) {
avoid_split = true;
break;
}
}
}
/* Avoid split loop looks for lowest voltage level that allows most unsplit pipes possible */
if (avoid_split) {
for (i = 0, pipe_idx = 0; i < dc->res_pool->pipe_count; i++) {
......
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