Commit a2f33da1 authored by Bjorn Helgaas's avatar Bjorn Helgaas Committed by Jesse Barnes

alpha/PCI: convert to pci_scan_root_bus() for correct root bus resources

Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus
resource fixups.  This fixes the problem of "early" and "header" quirks
seeing incorrect root bus resources.

v2: fix up conversion

CC: linux-alpha@vger.kernel.org
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent 7e00fe2e
...@@ -281,27 +281,9 @@ pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus) ...@@ -281,27 +281,9 @@ pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus)
void __devinit void __devinit
pcibios_fixup_bus(struct pci_bus *bus) pcibios_fixup_bus(struct pci_bus *bus)
{ {
/* Propagate hose info into the subordinate devices. */
struct pci_controller *hose = bus->sysdata;
struct pci_dev *dev = bus->self; struct pci_dev *dev = bus->self;
if (!dev) { if (pci_probe_only && dev &&
/* Root bus. */
u32 pci_mem_end;
u32 sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;
unsigned long end;
bus->resource[0] = hose->io_space;
bus->resource[1] = hose->mem_space;
/* Adjust hose mem_space limit to prevent PCI allocations
in the iommu windows. */
pci_mem_end = min((u32)__direct_map_base, sg_base) - 1;
end = hose->mem_space->start + pci_mem_end;
if (hose->mem_space->end > end)
hose->mem_space->end = end;
} else if (pci_probe_only &&
(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
pci_read_bridge_bases(bus); pci_read_bridge_bases(bus);
pcibios_fixup_device_resources(dev, bus); pcibios_fixup_device_resources(dev, bus);
...@@ -414,13 +396,31 @@ void __init ...@@ -414,13 +396,31 @@ void __init
common_init_pci(void) common_init_pci(void)
{ {
struct pci_controller *hose; struct pci_controller *hose;
struct list_head resources;
struct pci_bus *bus; struct pci_bus *bus;
int next_busno; int next_busno;
int need_domain_info = 0; int need_domain_info = 0;
u32 pci_mem_end;
u32 sg_base;
unsigned long end;
/* Scan all of the recorded PCI controllers. */ /* Scan all of the recorded PCI controllers. */
for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
bus = pci_scan_bus(next_busno, alpha_mv.pci_ops, hose); sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;
/* Adjust hose mem_space limit to prevent PCI allocations
in the iommu windows. */
pci_mem_end = min((u32)__direct_map_base, sg_base) - 1;
end = hose->mem_space->start + pci_mem_end;
if (hose->mem_space->end > end)
hose->mem_space->end = end;
INIT_LIST_HEAD(&resources);
pci_add_resource(&resources, hose->io_space);
pci_add_resource(&resources, hose->mem_space);
bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,
hose, &resources);
hose->bus = bus; hose->bus = bus;
hose->need_domain_info = need_domain_info; hose->need_domain_info = need_domain_info;
next_busno = bus->subordinate + 1; next_busno = bus->subordinate + 1;
......
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