Commit a34a3b72 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'omap-fixes-a-for-3.5rc' of...

Merge tag 'omap-fixes-a-for-3.5rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes

From Paul Walmsley (as per Tony Lindgren's request):
 "Some uncontroversial OMAP clock, hwmod, and compiler warning fixes for 3.5-rc"

* tag 'omap-fixes-a-for-3.5rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending:
  ARM: OMAP4: hwmod data: Force HDMI in no-idle while enabled
  ARM: OMAP2+: mux: fix sparse warning
  ARM: OMAP2+: CM: increase the module disable timeout
  ARM: OMAP4: clock data: add clockdomains for clocks used as main clocks
  ARM: OMAP4: hwmod data: fix 32k sync timer idle modes
  ARM: OMAP4+: hwmod: fix issue causing IPs not going back to Smart-Standby
  ARM: OMAP: PM: Lock clocks list while generating summary
parents e23d7096 dc57aef5
...@@ -84,6 +84,7 @@ static struct clk slimbus_clk = { ...@@ -84,6 +84,7 @@ static struct clk slimbus_clk = {
static struct clk sys_32k_ck = { static struct clk sys_32k_ck = {
.name = "sys_32k_ck", .name = "sys_32k_ck",
.clkdm_name = "prm_clkdm",
.rate = 32768, .rate = 32768,
.ops = &clkops_null, .ops = &clkops_null,
}; };
...@@ -512,6 +513,7 @@ static struct clk ddrphy_ck = { ...@@ -512,6 +513,7 @@ static struct clk ddrphy_ck = {
.name = "ddrphy_ck", .name = "ddrphy_ck",
.parent = &dpll_core_m2_ck, .parent = &dpll_core_m2_ck,
.ops = &clkops_null, .ops = &clkops_null,
.clkdm_name = "l3_emif_clkdm",
.fixed_div = 2, .fixed_div = 2,
.recalc = &omap_fixed_divisor_recalc, .recalc = &omap_fixed_divisor_recalc,
}; };
...@@ -769,6 +771,7 @@ static const struct clksel dpll_mpu_m2_div[] = { ...@@ -769,6 +771,7 @@ static const struct clksel dpll_mpu_m2_div[] = {
static struct clk dpll_mpu_m2_ck = { static struct clk dpll_mpu_m2_ck = {
.name = "dpll_mpu_m2_ck", .name = "dpll_mpu_m2_ck",
.parent = &dpll_mpu_ck, .parent = &dpll_mpu_ck,
.clkdm_name = "cm_clkdm",
.clksel = dpll_mpu_m2_div, .clksel = dpll_mpu_m2_div,
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_MPU, .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_MPU,
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK, .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
...@@ -1149,6 +1152,7 @@ static const struct clksel l3_div_div[] = { ...@@ -1149,6 +1152,7 @@ static const struct clksel l3_div_div[] = {
static struct clk l3_div_ck = { static struct clk l3_div_ck = {
.name = "l3_div_ck", .name = "l3_div_ck",
.parent = &div_core_ck, .parent = &div_core_ck,
.clkdm_name = "cm_clkdm",
.clksel = l3_div_div, .clksel = l3_div_div,
.clksel_reg = OMAP4430_CM_CLKSEL_CORE, .clksel_reg = OMAP4430_CM_CLKSEL_CORE,
.clksel_mask = OMAP4430_CLKSEL_L3_MASK, .clksel_mask = OMAP4430_CLKSEL_L3_MASK,
...@@ -2824,6 +2828,7 @@ static const struct clksel trace_clk_div_div[] = { ...@@ -2824,6 +2828,7 @@ static const struct clksel trace_clk_div_div[] = {
static struct clk trace_clk_div_ck = { static struct clk trace_clk_div_ck = {
.name = "trace_clk_div_ck", .name = "trace_clk_div_ck",
.parent = &pmd_trace_clk_mux_ck, .parent = &pmd_trace_clk_mux_ck,
.clkdm_name = "emu_sys_clkdm",
.clksel = trace_clk_div_div, .clksel = trace_clk_div_div,
.clksel_reg = OMAP4430_CM_EMU_DEBUGSS_CLKCTRL, .clksel_reg = OMAP4430_CM_EMU_DEBUGSS_CLKCTRL,
.clksel_mask = OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK, .clksel_mask = OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK,
......
...@@ -22,4 +22,15 @@ ...@@ -22,4 +22,15 @@
*/ */
#define MAX_MODULE_READY_TIME 2000 #define MAX_MODULE_READY_TIME 2000
/*
* MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
* the PRCM to request that a module enter the inactive state in the
* case of OMAP2 & 3. In the case of OMAP4 this is the max duration
* in microseconds for the module to reach the inactive state from
* a functional state.
* XXX FSUSB on OMAP4430 takes ~4ms to idle after reset during
* kernel init.
*/
#define MAX_MODULE_DISABLE_TIME 5000
#endif #endif
...@@ -313,9 +313,9 @@ int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_off ...@@ -313,9 +313,9 @@ int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_off
omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) == omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) ==
CLKCTRL_IDLEST_DISABLED), CLKCTRL_IDLEST_DISABLED),
MAX_MODULE_READY_TIME, i); MAX_MODULE_DISABLE_TIME, i);
return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; return (i < MAX_MODULE_DISABLE_TIME) ? 0 : -EBUSY;
} }
/** /**
......
...@@ -41,6 +41,7 @@ ...@@ -41,6 +41,7 @@
#include "control.h" #include "control.h"
#include "mux.h" #include "mux.h"
#include "prm.h" #include "prm.h"
#include "common.h"
#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */ #define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
#define OMAP_MUX_BASE_SZ 0x5ca #define OMAP_MUX_BASE_SZ 0x5ca
......
...@@ -530,7 +530,7 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) ...@@ -530,7 +530,7 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
_set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
/* XXX test pwrdm_get_wken for this hwmod's subsystem */ /* XXX test pwrdm_get_wken for this hwmod's subsystem */
......
...@@ -393,8 +393,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = { ...@@ -393,8 +393,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = {
.rev_offs = 0x0000, .rev_offs = 0x0000,
.sysc_offs = 0x0004, .sysc_offs = 0x0004,
.sysc_flags = SYSC_HAS_SIDLEMODE, .sysc_flags = SYSC_HAS_SIDLEMODE,
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | .idlemodes = (SIDLE_FORCE | SIDLE_NO),
SIDLE_SMART_WKUP),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
...@@ -854,6 +853,11 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { ...@@ -854,6 +853,11 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
.name = "dss_hdmi", .name = "dss_hdmi",
.class = &omap44xx_hdmi_hwmod_class, .class = &omap44xx_hdmi_hwmod_class,
.clkdm_name = "l3_dss_clkdm", .clkdm_name = "l3_dss_clkdm",
/*
* HDMI audio requires to use no-idle mode. Hence,
* set idle mode by software.
*/
.flags = HWMOD_SWSUP_SIDLE,
.mpu_irqs = omap44xx_dss_hdmi_irqs, .mpu_irqs = omap44xx_dss_hdmi_irqs,
.sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
.main_clk = "dss_48mhz_clk", .main_clk = "dss_48mhz_clk",
......
...@@ -461,6 +461,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused) ...@@ -461,6 +461,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused)
struct clk *c; struct clk *c;
struct clk *pa; struct clk *pa;
mutex_lock(&clocks_mutex);
seq_printf(s, "%-30s %-30s %-10s %s\n", seq_printf(s, "%-30s %-30s %-10s %s\n",
"clock-name", "parent-name", "rate", "use-count"); "clock-name", "parent-name", "rate", "use-count");
...@@ -469,6 +470,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused) ...@@ -469,6 +470,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused)
seq_printf(s, "%-30s %-30s %-10lu %d\n", seq_printf(s, "%-30s %-30s %-10lu %d\n",
c->name, pa ? pa->name : "none", c->rate, c->usecount); c->name, pa ? pa->name : "none", c->rate, c->usecount);
} }
mutex_unlock(&clocks_mutex);
return 0; return 0;
} }
......
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