Commit a4a78a97 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by David S. Miller

dt-bindings: net: dwmac-sun8i: Clean up clock delay chain descriptions

The clock delay chains found in the glue layer for dwmac-sun8i are only
used with RGMII PHYs. They are not intended for non-RGMII PHYs, such as
MII external PHYs or the internal PHY. Also, a recent SoC has a smaller
range of possible values for the delay chain.

This patch reformats the delay chain section of the device tree binding
to make it clear that the delay chains only apply to RGMII PHYs, and
make it easier to add the R40-specific bits later.
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 62150dfe
...@@ -28,10 +28,13 @@ Required properties: ...@@ -28,10 +28,13 @@ Required properties:
- allwinner,sun8i-a83t-system-controller - allwinner,sun8i-a83t-system-controller
Optional properties: Optional properties:
- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0) - allwinner,tx-delay-ps: TX clock delay chain value in ps.
- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0) Range is 0-700. Default is 0.
Both delay properties need to be a multiple of 100. They control the delay for - allwinner,rx-delay-ps: RX clock delay chain value in ps.
external PHY. Range is 0-3100. Default is 0.
Both delay properties need to be a multiple of 100. They control the
clock delay for external RGMII PHY. They do not apply to the internal
PHY or external non-RGMII PHYs.
Optional properties for the following compatibles: Optional properties for the following compatibles:
- "allwinner,sun8i-h3-emac", - "allwinner,sun8i-h3-emac",
......
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