Commit a51edf75 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'riscv/for-v5.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Paul Walmsley:
 "Four minor RISC-V-related changes:

   - Add support for the new clone3 syscall for RV64, relying on the
     generic support

   - Add DT data for the gigabit Ethernet controller on the SiFive FU540
     and the HiFive Unleashed board

   - Update MAINTAINERS to add me to the arch/riscv maintainers' list

   - Add support for PCIe message-signaled interrupts by reusing the
     generic header file"

* tag 'riscv/for-v5.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: dts: Add DT node for SiFive FU540 Ethernet controller driver
  riscv: include generic support for MSI irqdomains
  MAINTAINERS: Add Paul as a RISC-V maintainer
  riscv: enable sys_clone3 syscall for rv64
parents da3cc2e6 26091eef
...@@ -13725,6 +13725,7 @@ F: drivers/mtd/nand/raw/r852.c ...@@ -13725,6 +13725,7 @@ F: drivers/mtd/nand/raw/r852.c
F: drivers/mtd/nand/raw/r852.h F: drivers/mtd/nand/raw/r852.h
RISC-V ARCHITECTURE RISC-V ARCHITECTURE
M: Paul Walmsley <paul.walmsley@sifive.com>
M: Palmer Dabbelt <palmer@sifive.com> M: Palmer Dabbelt <palmer@sifive.com>
M: Albert Ou <aou@eecs.berkeley.edu> M: Albert Ou <aou@eecs.berkeley.edu>
L: linux-riscv@lists.infradead.org L: linux-riscv@lists.infradead.org
......
...@@ -217,5 +217,20 @@ qspi2: spi@10050000 { ...@@ -217,5 +217,20 @@ qspi2: spi@10050000 {
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
eth0: ethernet@10090000 {
compatible = "sifive,fu540-c000-gem";
interrupt-parent = <&plic0>;
interrupts = <53>;
reg = <0x0 0x10090000 0x0 0x2000
0x0 0x100a0000 0x0 0x1000>;
local-mac-address = [00 00 00 00 00 00];
clock-names = "pclk", "hclk";
clocks = <&prci PRCI_CLK_GEMGXLPLL>,
<&prci PRCI_CLK_GEMGXLPLL>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
}; };
}; };
...@@ -76,3 +76,12 @@ mmc@0 { ...@@ -76,3 +76,12 @@ mmc@0 {
disable-wp; disable-wp;
}; };
}; };
&eth0 {
status = "okay";
phy-mode = "gmii";
phy-handle = <&phy0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
};
...@@ -22,6 +22,7 @@ generic-y += kvm_para.h ...@@ -22,6 +22,7 @@ generic-y += kvm_para.h
generic-y += local.h generic-y += local.h
generic-y += local64.h generic-y += local64.h
generic-y += mm-arch-hooks.h generic-y += mm-arch-hooks.h
generic-y += msi.h
generic-y += percpu.h generic-y += percpu.h
generic-y += preempt.h generic-y += preempt.h
generic-y += sections.h generic-y += sections.h
......
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
#ifdef __LP64__ #ifdef __LP64__
#define __ARCH_WANT_NEW_STAT #define __ARCH_WANT_NEW_STAT
#define __ARCH_WANT_SET_GET_RLIMIT #define __ARCH_WANT_SET_GET_RLIMIT
#define __ARCH_WANT_SYS_CLONE3
#endif /* __LP64__ */ #endif /* __LP64__ */
#include <asm-generic/unistd.h> #include <asm-generic/unistd.h>
......
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