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nexedi
linux
Commits
a6175e89
Commit
a6175e89
authored
Jul 08, 2020
by
Linus Walleij
Browse files
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Merge branch 'lee-fixes' into devel
parents
ec75039d
a7a9ad23
Changes
8
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8 changed files
with
31 additions
and
25 deletions
+31
-25
drivers/gpio/gpio-altera.c
drivers/gpio/gpio-altera.c
+2
-1
drivers/gpio/gpio-it87.c
drivers/gpio/gpio-it87.c
+7
-7
drivers/gpio/gpio-mlxbf.c
drivers/gpio/gpio-mlxbf.c
+1
-1
drivers/gpio/gpio-mlxbf2.c
drivers/gpio/gpio-mlxbf2.c
+3
-1
drivers/gpio/gpio-pmic-eic-sprd.c
drivers/gpio/gpio-pmic-eic-sprd.c
+1
-1
drivers/gpio/gpio-sama5d2-piobu.c
drivers/gpio/gpio-sama5d2-piobu.c
+8
-8
drivers/gpio/gpio-syscon.c
drivers/gpio/gpio-syscon.c
+6
-6
drivers/gpio/gpiolib-of.c
drivers/gpio/gpiolib-of.c
+3
-0
No files found.
drivers/gpio/gpio-altera.c
View file @
a6175e89
...
...
@@ -24,6 +24,7 @@
* @interrupt_trigger : specifies the hardware configured IRQ trigger type
* (rising, falling, both, high)
* @mapped_irq : kernel mapped irq number.
* @irq_chip : IRQ chip configuration
*/
struct
altera_gpio_chip
{
struct
of_mm_gpio_chip
mmchip
;
...
...
@@ -69,7 +70,7 @@ static void altera_gpio_irq_mask(struct irq_data *d)
raw_spin_unlock_irqrestore
(
&
altera_gc
->
gpio_lock
,
flags
);
}
/*
*
/*
* This controller's IRQ type is synthesized in hardware, so this function
* just checks if the requested set_type matches the synthesized IRQ type
*/
...
...
drivers/gpio/gpio-it87.c
View file @
a6175e89
...
...
@@ -47,13 +47,13 @@
/**
* struct it87_gpio - it87-specific GPIO chip
* @chip the underlying gpio_chip structure
* @lock a lock to avoid races between operations
* @io_base base address for gpio ports
* @io_size size of the port rage starting from io_base.
* @output_base Super I/O register address for Output Enable register
* @simple_base Super I/O 'Simple I/O' Enable register
* @simple_size Super IO 'Simple I/O' Enable register size; this is
* @chip
:
the underlying gpio_chip structure
* @lock
:
a lock to avoid races between operations
* @io_base
:
base address for gpio ports
* @io_size
:
size of the port rage starting from io_base.
* @output_base
:
Super I/O register address for Output Enable register
* @simple_base
:
Super I/O 'Simple I/O' Enable register
* @simple_size
:
Super IO 'Simple I/O' Enable register size; this is
* required because IT87xx chips might only provide Simple I/O
* switches on a subset of lines, whereas the others keep the
* same status all time.
...
...
drivers/gpio/gpio-mlxbf.c
View file @
a6175e89
...
...
@@ -127,7 +127,7 @@ static int mlxbf_gpio_resume(struct platform_device *pdev)
}
#endif
static
const
struct
acpi_device_id
mlxbf_gpio_acpi_match
[]
=
{
static
const
struct
acpi_device_id
__maybe_unused
mlxbf_gpio_acpi_match
[]
=
{
{
"MLNXBF02"
,
0
},
{}
};
...
...
drivers/gpio/gpio-mlxbf2.c
View file @
a6175e89
...
...
@@ -149,6 +149,8 @@ static int mlxbf2_gpio_lock_acquire(struct mlxbf2_gpio_context *gs)
* Release the YU arm_gpio_lock after changing the direction mode.
*/
static
void
mlxbf2_gpio_lock_release
(
struct
mlxbf2_gpio_context
*
gs
)
__releases
(
&
gs
->
gc
.
bgpio_lock
)
__releases
(
yu_arm_gpio_lock_param
.
lock
)
{
writel
(
YU_ARM_GPIO_LOCK_RELEASE
,
yu_arm_gpio_lock_param
.
io
);
spin_unlock
(
&
gs
->
gc
.
bgpio_lock
);
...
...
@@ -309,7 +311,7 @@ static int mlxbf2_gpio_resume(struct platform_device *pdev)
}
#endif
static
const
struct
acpi_device_id
mlxbf2_gpio_acpi_match
[]
=
{
static
const
struct
acpi_device_id
__maybe_unused
mlxbf2_gpio_acpi_match
[]
=
{
{
"MLNXBF22"
,
0
},
{},
};
...
...
drivers/gpio/gpio-pmic-eic-sprd.c
View file @
a6175e89
...
...
@@ -48,7 +48,7 @@ enum {
* struct sprd_pmic_eic - PMIC EIC controller
* @chip: the gpio_chip structure.
* @intc: the irq_chip structure.
* @
regmap:
the regmap from the parent device.
* @
map:
the regmap from the parent device.
* @offset: the EIC controller's offset address of the PMIC.
* @reg: the array to cache the EIC registers.
* @buslock: for bus lock/sync and unlock.
...
...
drivers/gpio/gpio-sama5d2-piobu.c
View file @
a6175e89
...
...
@@ -49,7 +49,7 @@ struct sama5d2_piobu {
struct
regmap
*
regmap
;
};
/*
*
/*
* sama5d2_piobu_setup_pin() - prepares a pin for set_direction call
*
* Do not consider pin for tamper detection (normal and backup modes)
...
...
@@ -73,7 +73,7 @@ static int sama5d2_piobu_setup_pin(struct gpio_chip *chip, unsigned int pin)
return
regmap_update_bits
(
piobu
->
regmap
,
PIOBU_WKPR
,
mask
,
0
);
}
/*
*
/*
* sama5d2_piobu_write_value() - writes value & mask at the pin's PIOBU register
*/
static
int
sama5d2_piobu_write_value
(
struct
gpio_chip
*
chip
,
unsigned
int
pin
,
...
...
@@ -88,7 +88,7 @@ static int sama5d2_piobu_write_value(struct gpio_chip *chip, unsigned int pin,
return
regmap_update_bits
(
piobu
->
regmap
,
reg
,
mask
,
value
);
}
/*
*
/*
* sama5d2_piobu_read_value() - read the value with masking from the pin's PIOBU
* register
*/
...
...
@@ -108,7 +108,7 @@ static int sama5d2_piobu_read_value(struct gpio_chip *chip, unsigned int pin,
return
val
&
mask
;
}
/*
*
/*
* sama5d2_piobu_get_direction() - gpiochip get_direction
*/
static
int
sama5d2_piobu_get_direction
(
struct
gpio_chip
*
chip
,
...
...
@@ -123,7 +123,7 @@ static int sama5d2_piobu_get_direction(struct gpio_chip *chip,
GPIO_LINE_DIRECTION_OUT
;
}
/*
*
/*
* sama5d2_piobu_direction_input() - gpiochip direction_input
*/
static
int
sama5d2_piobu_direction_input
(
struct
gpio_chip
*
chip
,
...
...
@@ -132,7 +132,7 @@ static int sama5d2_piobu_direction_input(struct gpio_chip *chip,
return
sama5d2_piobu_write_value
(
chip
,
pin
,
PIOBU_DIRECTION
,
PIOBU_IN
);
}
/*
*
/*
* sama5d2_piobu_direction_output() - gpiochip direction_output
*/
static
int
sama5d2_piobu_direction_output
(
struct
gpio_chip
*
chip
,
...
...
@@ -147,7 +147,7 @@ static int sama5d2_piobu_direction_output(struct gpio_chip *chip,
val
);
}
/*
*
/*
* sama5d2_piobu_get() - gpiochip get
*/
static
int
sama5d2_piobu_get
(
struct
gpio_chip
*
chip
,
unsigned
int
pin
)
...
...
@@ -166,7 +166,7 @@ static int sama5d2_piobu_get(struct gpio_chip *chip, unsigned int pin)
return
!!
ret
;
}
/*
*
/*
* sama5d2_piobu_set() - gpiochip set
*/
static
void
sama5d2_piobu_set
(
struct
gpio_chip
*
chip
,
unsigned
int
pin
,
...
...
drivers/gpio/gpio-syscon.c
View file @
a6175e89
...
...
@@ -24,16 +24,16 @@
/**
* struct syscon_gpio_data - Configuration for the device.
* compatible: SYSCON driver compatible string.
* flags: Set of GPIO_SYSCON_FEAT_ flags:
*
@
compatible: SYSCON driver compatible string.
*
@
flags: Set of GPIO_SYSCON_FEAT_ flags:
* GPIO_SYSCON_FEAT_IN: GPIOs supports input,
* GPIO_SYSCON_FEAT_OUT: GPIOs supports output,
* GPIO_SYSCON_FEAT_DIR: GPIOs supports switch direction.
* bit_count: Number of bits used as GPIOs.
* dat_bit_offset: Offset (in bits) to the first GPIO bit.
* dir_bit_offset: Optional offset (in bits) to the first bit to switch
*
@
bit_count: Number of bits used as GPIOs.
*
@
dat_bit_offset: Offset (in bits) to the first GPIO bit.
*
@
dir_bit_offset: Optional offset (in bits) to the first bit to switch
* GPIO direction (Used with GPIO_SYSCON_FEAT_DIR flag).
* set: HW specific callback to assigns output value
*
@
set: HW specific callback to assigns output value
* for signal "offset"
*/
...
...
drivers/gpio/gpiolib-of.c
View file @
a6175e89
...
...
@@ -25,6 +25,9 @@
/**
* of_gpio_spi_cs_get_count() - special GPIO counting for SPI
* @dev: Consuming device
* @con_id: Function within the GPIO consumer
*
* Some elder GPIO controllers need special quirks. Currently we handle
* the Freescale GPIO controller with bindings that doesn't use the
* established "cs-gpios" for chip selects but instead rely on
...
...
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