Commit a6d9dbf5 authored by Robin Getz's avatar Robin Getz Committed by Mike Frysinger

Blackfin: show the whole accumulator in the pseudo DBG insn

Rather than print just part of the accumulator register, show the whole
40 bits.  This matches the simulator behavior better.
Signed-off-by: default avatarRobin Getz <robin.getz@analog.com>
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 5a132f7a
...@@ -158,7 +158,7 @@ bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode) ...@@ -158,7 +158,7 @@ bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode)
bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode) bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode)
{ {
int grp, fn, reg; int grp, fn, reg;
long value; long value, value1;
if ((opcode & 0xFF000000) != PseudoDbg_opcode) if ((opcode & 0xFF000000) != PseudoDbg_opcode)
return false; return false;
...@@ -168,11 +168,24 @@ bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode) ...@@ -168,11 +168,24 @@ bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode)
fn = ((opcode >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask); fn = ((opcode >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask);
reg = ((opcode >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask); reg = ((opcode >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask);
if (!fix_up_reg(fp, &value, grp, reg)) if (fn == 3 && (reg == 0 || reg == 1)) {
return false; if (!fix_up_reg(fp, &value, 4, 2 * reg))
return false;
if (!fix_up_reg(fp, &value1, 4, 2 * reg + 1))
return false;
pr_notice("DBG %s = %08lx\n", get_allreg_name(grp, reg), value); pr_notice("DBG A%i = %02lx%08lx\n", reg, value & 0xFF, value1);
fp->pc += 2;
return true;
fp->pc += 2; } else if (fn == 0) {
return true; if (!fix_up_reg(fp, &value, grp, reg))
return false;
pr_notice("DBG %s = %08lx\n", get_allreg_name(grp, reg), value);
fp->pc += 2;
return true;
}
return false;
} }
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