Commit a75af580 authored by H. Peter Anvin's avatar H. Peter Anvin

x86, mrst: make mrst_identify_cpu() an inline returning enum

We have an enum, might as well use it.  While we're at it, make it an
inline... there is really no point in calling a function for this
stuff.

LKML-Reference: <1274295685-6774-3-git-send-email-jacob.jun.pan@linux.intel.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
Acked-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
parent a875c019
...@@ -11,7 +11,6 @@ ...@@ -11,7 +11,6 @@
#ifndef _ASM_X86_MRST_H #ifndef _ASM_X86_MRST_H
#define _ASM_X86_MRST_H #define _ASM_X86_MRST_H
extern int pci_mrst_init(void); extern int pci_mrst_init(void);
extern int mrst_identify_cpu(void);
extern int mrst_timer_options __cpuinitdata; extern int mrst_timer_options __cpuinitdata;
int __init sfi_parse_mrtc(struct sfi_table_header *table); int __init sfi_parse_mrtc(struct sfi_table_header *table);
...@@ -27,6 +26,12 @@ enum mrst_cpu_type { ...@@ -27,6 +26,12 @@ enum mrst_cpu_type {
MRST_CPU_CHIP_PENWELL, MRST_CPU_CHIP_PENWELL,
}; };
extern enum mrst_cpu_type __mrst_cpu_chip;
static enum mrst_cpu_type mrst_identify_cpu(void)
{
return __mrst_cpu_chip;
}
enum mrst_timer_options { enum mrst_timer_options {
MRST_TIMER_DEFAULT, MRST_TIMER_DEFAULT,
MRST_TIMER_APBT_ONLY, MRST_TIMER_APBT_ONLY,
......
...@@ -50,7 +50,8 @@ int mrst_timer_options __cpuinitdata; ...@@ -50,7 +50,8 @@ int mrst_timer_options __cpuinitdata;
static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM]; static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM];
static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM]; static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM];
static int mrst_cpu_chip; enum mrst_cpu_type __mrst_cpu_chip;
EXPORT_SYMBOL_GPL(__mrst_cpu_chip);
int sfi_mtimer_num; int sfi_mtimer_num;
...@@ -233,25 +234,19 @@ void __init mrst_rtc_init(void) ...@@ -233,25 +234,19 @@ void __init mrst_rtc_init(void)
sfi_table_parse(SFI_SIG_MRTC, NULL, NULL, sfi_parse_mrtc); sfi_table_parse(SFI_SIG_MRTC, NULL, NULL, sfi_parse_mrtc);
} }
int mrst_identify_cpu(void)
{
return mrst_cpu_chip;
}
EXPORT_SYMBOL_GPL(mrst_identify_cpu);
void __cpuinit mrst_arch_setup(void) void __cpuinit mrst_arch_setup(void)
{ {
if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x27) if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x27)
mrst_cpu_chip = MRST_CPU_CHIP_PENWELL; __mrst_cpu_chip = MRST_CPU_CHIP_PENWELL;
else if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x26) else if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x26)
mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; __mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT;
else { else {
pr_err("Unknown Moorestown CPU (%d:%d), default to Lincroft\n", pr_err("Unknown Moorestown CPU (%d:%d), default to Lincroft\n",
boot_cpu_data.x86, boot_cpu_data.x86_model); boot_cpu_data.x86, boot_cpu_data.x86_model);
mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; __mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT;
} }
pr_debug("Moorestown CPU %s identified\n", pr_debug("Moorestown CPU %s identified\n",
(mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) ? (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) ?
"Lincroft" : "Penwell"); "Lincroft" : "Penwell");
} }
......
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