Commit aa056739 authored by Dave Jones's avatar Dave Jones

[AGPGART] More setup routine -> static struct conversions.

Again from Christoph Hellwig.
parent e544a3bd
...@@ -195,34 +195,30 @@ static struct aper_size_info_32 ali_generic_sizes[7] = ...@@ -195,34 +195,30 @@ static struct aper_size_info_32 ali_generic_sizes[7] =
{4, 1024, 0, 3} {4, 1024, 0, 3}
}; };
static int __init ali_generic_setup (struct pci_dev *pdev) struct agp_bridge_data ali_generic_bridge = {
{ .type = ALI_GENERIC,
agp_bridge->masks = ali_generic_masks; .masks = ali_generic_masks,
agp_bridge->aperture_sizes = (void *) ali_generic_sizes; .aperture_sizes = (void *)ali_generic_sizes,
agp_bridge->size_type = U32_APER_SIZE; .size_type = U32_APER_SIZE,
agp_bridge->num_aperture_sizes = 7; .num_aperture_sizes = 7,
agp_bridge->dev_private_data = NULL; .configure = ali_configure,
agp_bridge->needs_scratch_page = FALSE; .fetch_size = ali_fetch_size,
agp_bridge->configure = ali_configure; .cleanup = ali_cleanup,
agp_bridge->fetch_size = ali_fetch_size; .tlb_flush = ali_tlbflush,
agp_bridge->cleanup = ali_cleanup; .mask_memory = ali_mask_memory,
agp_bridge->tlb_flush = ali_tlbflush; .agp_enable = agp_generic_enable,
agp_bridge->mask_memory = ali_mask_memory; .cache_flush = ali_cache_flush,
agp_bridge->agp_enable = agp_generic_enable; .create_gatt_table = agp_generic_create_gatt_table,
agp_bridge->cache_flush = ali_cache_flush; .free_gatt_table = agp_generic_free_gatt_table,
agp_bridge->create_gatt_table = agp_generic_create_gatt_table; .insert_memory = agp_generic_insert_memory,
agp_bridge->free_gatt_table = agp_generic_free_gatt_table; .remove_memory = agp_generic_remove_memory,
agp_bridge->insert_memory = agp_generic_insert_memory; .alloc_by_type = agp_generic_alloc_by_type,
agp_bridge->remove_memory = agp_generic_remove_memory; .free_by_type = agp_generic_free_by_type,
agp_bridge->alloc_by_type = agp_generic_alloc_by_type; .agp_alloc_page = ali_alloc_page,
agp_bridge->free_by_type = agp_generic_free_by_type; .agp_destroy_page = ali_destroy_page,
agp_bridge->agp_alloc_page = ali_alloc_page; .suspend = agp_generic_suspend,
agp_bridge->agp_destroy_page = ali_destroy_page; .resume = agp_generic_resume,
agp_bridge->suspend = agp_generic_suspend; };
agp_bridge->resume = agp_generic_resume;
agp_bridge->cant_use_aperture = 0;
return 0;
}
struct agp_device_ids ali_agp_device_ids[] __initdata = struct agp_device_ids ali_agp_device_ids[] __initdata =
{ {
...@@ -266,93 +262,85 @@ struct agp_device_ids ali_agp_device_ids[] __initdata = ...@@ -266,93 +262,85 @@ struct agp_device_ids ali_agp_device_ids[] __initdata =
{ }, /* dummy final entry, always present */ { }, /* dummy final entry, always present */
}; };
/* scan table above for supported devices */
static int __init agp_lookup_host_bridge (struct pci_dev *pdev)
{
int j=0;
struct agp_device_ids *devs;
devs = ali_agp_device_ids;
while (devs[j].chipset_name != NULL) {
if (pdev->device == devs[j].device_id) {
if (pdev->device == PCI_DEVICE_ID_AL_M1621) {
u8 hidden_1621_id;
pci_read_config_byte(pdev, 0xFB, &hidden_1621_id);
switch (hidden_1621_id) {
case 0x31:
devs[j].chipset_name="M1631";
break;
case 0x32:
devs[j].chipset_name="M1632";
break;
case 0x41:
devs[j].chipset_name="M1641";
break;
case 0x43:
break;
case 0x47:
devs[j].chipset_name="M1647";
break;
case 0x51:
devs[j].chipset_name="M1651";
break;
default:
break;
}
}
printk (KERN_INFO PFX "Detected ALi %s chipset\n", devs[j].chipset_name);
if (devs[j].chipset != 0)
agp_bridge->type = devs[j].chipset;
else
agp_bridge->type = ALI_GENERIC;
if (devs[j].chipset_setup != NULL)
return devs[j].chipset_setup(pdev);
else
return ali_generic_setup(pdev);
}
j++;
}
/* try init anyway, if user requests it */
if (agp_try_unsupported) {
printk(KERN_WARNING PFX "Trying generic ALi routines"
" for device id: %04x\n", pdev->device);
agp_bridge->type = ALI_GENERIC;
return ali_generic_setup(pdev);
}
printk(KERN_ERR PFX "Unsupported ALi chipset (device id: %04x),"
" you might want to try agp_try_unsupported=1.\n", pdev->device);
return -ENODEV;
}
static struct agp_driver ali_agp_driver = { static struct agp_driver ali_agp_driver = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
}; };
static int __init agp_ali_probe (struct pci_dev *dev, const struct pci_device_id *ent) static int __init agp_ali_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{ {
u8 cap_ptr = 0; struct agp_device_ids *devs = ali_agp_device_ids;
u8 hidden_1621_id, cap_ptr;
int j;
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP); cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
if (cap_ptr == 0) if (!cap_ptr)
return -ENODEV; return -ENODEV;
/* probe for known chipsets */ /* probe for known chipsets */
if (agp_lookup_host_bridge(dev) != -ENODEV) { for (j = 0; devs[j].chipset_name; j++) {
agp_bridge->dev = dev; if (pdev->device == devs[j].device_id)
agp_bridge->capndx = cap_ptr; goto found;
/* Fill in the mode register */
pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+PCI_AGP_STATUS, &agp_bridge->mode);
ali_agp_driver.dev = dev;
agp_register_driver(&ali_agp_driver);
return 0;
} }
return -ENODEV;
if (!agp_try_unsupported) {
printk(KERN_ERR PFX
"Unsupported ALi chipset (device id: %04x),"
" you might want to try agp_try_unsupported=1.\n",
pdev->device);
return -ENODEV;
}
printk(KERN_WARNING PFX "Trying generic ALi routines"
" for device id: %04x\n", pdev->device);
goto generic;
found:
switch (pdev->device == PCI_DEVICE_ID_AL_M1621) {
case PCI_DEVICE_ID_AL_M1541:
ali_generic_bridge.type = ALI_M1541;
break;
case PCI_DEVICE_ID_AL_M1621:
pci_read_config_byte(pdev, 0xFB, &hidden_1621_id);
switch (hidden_1621_id) {
case 0x31:
devs[j].chipset_name = "M1631";
break;
case 0x32:
devs[j].chipset_name = "M1632";
break;
case 0x41:
devs[j].chipset_name = "M1641";
break;
case 0x43:
break;
case 0x47:
devs[j].chipset_name = "M1647";
break;
case 0x51:
devs[j].chipset_name = "M1651";
break;
default:
break;
}
}
printk(KERN_INFO PFX "Detected ALi %s chipset\n",
devs[j].chipset_name);
generic:
ali_generic_bridge.dev = pdev;
ali_generic_bridge.capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(pdev,
ali_generic_bridge.capndx+PCI_AGP_STATUS,
&ali_generic_bridge.mode);
memcpy(agp_bridge, &ali_generic_bridge, sizeof(struct agp_bridge_data));
ali_agp_driver.dev = pdev;
agp_register_driver(&ali_agp_driver);
return 0;
} }
static struct pci_device_id agp_ali_pci_table[] __initdata = { static struct pci_device_id agp_ali_pci_table[] __initdata = {
...@@ -377,13 +365,7 @@ static struct __initdata pci_driver agp_ali_pci_driver = { ...@@ -377,13 +365,7 @@ static struct __initdata pci_driver agp_ali_pci_driver = {
static int __init agp_ali_init(void) static int __init agp_ali_init(void)
{ {
int ret_val; return pci_module_init(&agp_ali_pci_driver);
ret_val = pci_module_init(&agp_ali_pci_driver);
if (ret_val)
agp_bridge->type = NOT_SUPPORTED;
return ret_val;
} }
static void __exit agp_ali_cleanup(void) static void __exit agp_ali_cleanup(void)
......
...@@ -129,21 +129,53 @@ static int alpha_core_agp_remove_memory(agp_memory *mem, off_t pg_start, ...@@ -129,21 +129,53 @@ static int alpha_core_agp_remove_memory(agp_memory *mem, off_t pg_start,
static struct agp_driver alpha_core_agp_driver = { static struct agp_driver alpha_core_agp_driver = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
}; };
struct agp_bridge_data alpha_core_agp_bridge = {
.type = ALPHA_CORE_AGP,
.masks = alpha_core_agp_masks,
.aperture_sizes = aper_size,
.current_size = aper_size, /* only one entry */
.size_type = FIXED_APER_SIZE,
.num_aperture_sizes = 1,
.dev_private_data = agp,
.configure = alpha_core_agp_configure,
.fetch_size = alpha_core_agp_fetch_size,
.cleanup = alpha_core_agp_cleanup,
.tlb_flush = alpha_core_agp_tlbflush,
.mask_memory = alpha_core_agp_mask_memory,
.agp_enable = alpha_core_agp_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = alpha_core_agp_nop,
.free_gatt_table = alpha_core_agp_nop,
.insert_memory = alpha_core_agp_insert_memory,
.remove_memory = alpha_core_agp_remove_memory,
.alloc_by_type = agp_generic_alloc_by_type,
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.mode = agp->capability.lw,
.cant_use_aperture = 1,
.vm_ops = &alpha_core_agp_vm_ops,
};
int __init int __init
alpha_core_agp_setup(void) alpha_core_agp_setup(void)
{ {
alpha_agp_info *agp = alpha_mv.agp_info(); alpha_agp_info *agp = alpha_mv.agp_info();
struct pci_dev *pdev; /* faked */
struct aper_size_info_fixed *aper_size; struct aper_size_info_fixed *aper_size;
if (!agp) return -ENODEV; if (!agp)
if (agp->ops->setup(agp)) return -ENODEV; return -ENODEV;
if (agp->ops->setup(agp))
return -ENODEV;
/* /*
* Build the aperture size descriptor * Build the aperture size descriptor
*/ */
aper_size = alpha_core_agp_sizes; aper_size = alpha_core_agp_sizes;
if (!aper_size) return -ENOMEM; if (!aper_size)
return -ENOMEM;
aper_size->size = agp->aperture.size / (1024 * 1024); aper_size->size = agp->aperture.size / (1024 * 1024);
aper_size->num_entries = agp->aperture.size / PAGE_SIZE; aper_size->num_entries = agp->aperture.size / PAGE_SIZE;
aper_size->page_order = ffs(aper_size->num_entries / 1024) - 1; aper_size->page_order = ffs(aper_size->num_entries / 1024) - 1;
...@@ -151,43 +183,18 @@ alpha_core_agp_setup(void) ...@@ -151,43 +183,18 @@ alpha_core_agp_setup(void)
/* /*
* Build a fake pci_dev struct * Build a fake pci_dev struct
*/ */
if (!(agp_bridge->dev = kmalloc(sizeof(struct pci_dev), GFP_KERNEL))) { pdev = kmalloc(sizeof(struct pci_dev), GFP_KERNEL);
if (!pdev)
return -ENOMEM; return -ENOMEM;
} pdev->vendor = 0xffff;
agp_bridge->dev->vendor = 0xffff; pdev->device = 0xffff;
agp_bridge->dev->device = 0xffff; pdev->sysdata = agp->hose;
agp_bridge->dev->sysdata = agp->hose;
/* alpha_core_agp_bridge.dev = pdev;
* Fill in the rest of the agp_bridge struct memcpy(agp_bridge, &alpha_core_agp_bridge,
*/ sizeof(struct agp_bridge_data));
agp_bridge->masks = alpha_core_agp_masks;
agp_bridge->aperture_sizes = aper_size; alpha_core_agp_driver.dev = pdev;
agp_bridge->current_size = aper_size; /* only one entry */
agp_bridge->size_type = FIXED_APER_SIZE;
agp_bridge->num_aperture_sizes = 1;
agp_bridge->dev_private_data = agp;
agp_bridge->needs_scratch_page = FALSE;
agp_bridge->configure = alpha_core_agp_configure;
agp_bridge->fetch_size = alpha_core_agp_fetch_size;
agp_bridge->cleanup = alpha_core_agp_cleanup;
agp_bridge->tlb_flush = alpha_core_agp_tlbflush;
agp_bridge->mask_memory = alpha_core_agp_mask_memory;
agp_bridge->agp_enable = alpha_core_agp_enable;
agp_bridge->cache_flush = global_cache_flush;
agp_bridge->create_gatt_table = alpha_core_agp_nop;
agp_bridge->free_gatt_table = alpha_core_agp_nop;
agp_bridge->insert_memory = alpha_core_agp_insert_memory;
agp_bridge->remove_memory = alpha_core_agp_remove_memory;
agp_bridge->alloc_by_type = agp_generic_alloc_by_type;
agp_bridge->free_by_type = agp_generic_free_by_type;
agp_bridge->agp_alloc_page = agp_generic_alloc_page;
agp_bridge->agp_destroy_page = agp_generic_destroy_page;
agp_bridge->mode = agp->capability.lw;
agp_bridge->cant_use_aperture = 1;
agp_bridge->vm_ops = &alpha_core_agp_vm_ops;
alpha_core_agp_driver.dev = agp_bridge->dev;
agp_register_driver(&alpha_core_agp_driver); agp_register_driver(&alpha_core_agp_driver);
printk(KERN_INFO "Detected AGP on hose %d\n", agp->hose->index); printk(KERN_INFO "Detected AGP on hose %d\n", agp->hose->index);
return 0; return 0;
...@@ -195,13 +202,9 @@ alpha_core_agp_setup(void) ...@@ -195,13 +202,9 @@ alpha_core_agp_setup(void)
static int __init agp_alpha_core_init(void) static int __init agp_alpha_core_init(void)
{ {
int ret_val = -ENODEV; if (alpha_mv.agp_info)
if (alpha_mv.agp_info) { return alpha_core_agp_setup();
agp_bridge->type = ALPHA_CORE_AGP; return -ENODEV;
ret_val = alpha_core_agp_setup();
}
return ret_val;
} }
static void __exit agp_alpha_core_cleanup(void) static void __exit agp_alpha_core_cleanup(void)
......
...@@ -355,34 +355,31 @@ static struct gatt_mask amd_irongate_masks[] = ...@@ -355,34 +355,31 @@ static struct gatt_mask amd_irongate_masks[] =
{.mask = 0x00000001, .type = 0} {.mask = 0x00000001, .type = 0}
}; };
static int __init amd_irongate_setup (struct pci_dev *pdev) struct agp_bridge_data amd_irongate_bridge = {
{ .type = AMD_GENERIC,
agp_bridge->masks = amd_irongate_masks; .masks = amd_irongate_masks,
agp_bridge->aperture_sizes = (void *) amd_irongate_sizes; .aperture_sizes = (void *)amd_irongate_sizes,
agp_bridge->size_type = LVL2_APER_SIZE; .size_type = LVL2_APER_SIZE,
agp_bridge->num_aperture_sizes = 7; .num_aperture_sizes = 7,
agp_bridge->dev_private_data = (void *) &amd_irongate_private; .dev_private_data = (void *)&amd_irongate_private,
agp_bridge->needs_scratch_page = FALSE; .configure = amd_irongate_configure,
agp_bridge->configure = amd_irongate_configure; .fetch_size = amd_irongate_fetch_size,
agp_bridge->fetch_size = amd_irongate_fetch_size; .cleanup = amd_irongate_cleanup,
agp_bridge->cleanup = amd_irongate_cleanup; .tlb_flush = amd_irongate_tlbflush,
agp_bridge->tlb_flush = amd_irongate_tlbflush; .mask_memory = amd_irongate_mask_memory,
agp_bridge->mask_memory = amd_irongate_mask_memory; .agp_enable = agp_generic_enable,
agp_bridge->agp_enable = agp_generic_enable; .cache_flush = global_cache_flush,
agp_bridge->cache_flush = global_cache_flush; .create_gatt_table = amd_create_gatt_table,
agp_bridge->create_gatt_table = amd_create_gatt_table; .free_gatt_table = amd_free_gatt_table,
agp_bridge->free_gatt_table = amd_free_gatt_table; .insert_memory = amd_insert_memory,
agp_bridge->insert_memory = amd_insert_memory; .remove_memory = amd_remove_memory,
agp_bridge->remove_memory = amd_remove_memory; .alloc_by_type = agp_generic_alloc_by_type,
agp_bridge->alloc_by_type = agp_generic_alloc_by_type; .free_by_type = agp_generic_free_by_type,
agp_bridge->free_by_type = agp_generic_free_by_type; .agp_alloc_page = agp_generic_alloc_page,
agp_bridge->agp_alloc_page = agp_generic_alloc_page; .agp_destroy_page = agp_generic_destroy_page,
agp_bridge->agp_destroy_page = agp_generic_destroy_page; .suspend = agp_generic_suspend,
agp_bridge->suspend = agp_generic_suspend; .resume = agp_generic_resume,
agp_bridge->resume = agp_generic_resume; };
agp_bridge->cant_use_aperture = 0;
return 0;
}
struct agp_device_ids amd_agp_device_ids[] __initdata = struct agp_device_ids amd_agp_device_ids[] __initdata =
{ {
...@@ -401,66 +398,56 @@ struct agp_device_ids amd_agp_device_ids[] __initdata = ...@@ -401,66 +398,56 @@ struct agp_device_ids amd_agp_device_ids[] __initdata =
{ }, /* dummy final entry, always present */ { }, /* dummy final entry, always present */
}; };
static struct agp_driver amd_k7_agp_driver = {
.owner = THIS_MODULE,
};
/* scan table above for supported devices */ /* Supported Device Scanning routine */
static int __init agp_lookup_host_bridge (struct pci_dev *pdev) static int __init agp_amdk7_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{ {
int j=0; struct agp_device_ids *devs = amd_agp_device_ids;
struct agp_device_ids *devs; u8 cap_ptr;
int j;
devs = amd_agp_device_ids;
while (devs[j].chipset_name != NULL) { cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
if (pdev->device == devs[j].device_id) { if (!cap_ptr)
printk (KERN_INFO PFX "Detected AMD %s chipset\n", devs[j].chipset_name); return -ENODEV;
agp_bridge->type = AMD_GENERIC;
if (devs[j].chipset_setup != NULL) for (j = 0; devs[j].chipset_name; j++) {
return devs[j].chipset_setup(pdev); if (pdev->device == devs[j].device_id) {
else printk (KERN_INFO PFX "Detected AMD %s chipset\n",
return amd_irongate_setup(pdev); devs[j].chipset_name);
amd_irongate_bridge.type = devs[j].chipset;
goto found;
} }
j++;
} }
/* try init anyway, if user requests it */ if (!agp_try_unsupported) {
if (agp_try_unsupported) { printk(KERN_ERR PFX
printk(KERN_WARNING PFX "Trying generic AMD routines" "Unsupported AMD chipset (device id: %04x),"
" for device id: %04x\n", pdev->device); " you might want to try agp_try_unsupported=1.\n",
agp_bridge->type = AMD_GENERIC; pdev->device);
return amd_irongate_setup(pdev); return -ENODEV;
} }
printk(KERN_ERR PFX "Unsupported AMD chipset (device id: %04x)," printk(KERN_WARNING PFX "Trying generic AMD routines"
" you might want to try agp_try_unsupported=1.\n", pdev->device); " for device id: %04x\n", pdev->device);
return -ENODEV;
}
found:
amd_irongate_bridge.dev = pdev;
amd_irongate_bridge.capndx = cap_ptr;
static struct agp_driver amd_k7_agp_driver = { /* Fill in the mode register */
.owner = THIS_MODULE, pci_read_config_dword(pdev,
}; amd_irongate_bridge.capndx+PCI_AGP_STATUS,
&amd_irongate_bridge.mode);
/* Supported Device Scanning routine */ memcpy(agp_bridge, &amd_irongate_bridge, sizeof(struct agp_bridge_data));
static int __init agp_amdk7_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
u8 cap_ptr = 0;
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP); amd_k7_agp_driver.dev = pdev;
if (cap_ptr == 0) agp_register_driver(&amd_k7_agp_driver);
return -ENODEV; return 0;
if (agp_lookup_host_bridge(dev) != -ENODEV) {
agp_bridge->dev = dev;
agp_bridge->capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+PCI_AGP_STATUS, &agp_bridge->mode);
amd_k7_agp_driver.dev = dev;
agp_register_driver(&amd_k7_agp_driver);
return 0;
}
return -ENODEV;
} }
static struct pci_device_id agp_amdk7_pci_table[] __initdata = { static struct pci_device_id agp_amdk7_pci_table[] __initdata = {
...@@ -485,13 +472,7 @@ static struct __initdata pci_driver agp_amdk7_pci_driver = { ...@@ -485,13 +472,7 @@ static struct __initdata pci_driver agp_amdk7_pci_driver = {
static int __init agp_amdk7_init(void) static int __init agp_amdk7_init(void)
{ {
int ret_val; return pci_module_init(&agp_amdk7_pci_driver);
ret_val = pci_module_init(&agp_amdk7_pci_driver);
if (ret_val)
agp_bridge->type = NOT_SUPPORTED;
return ret_val;
} }
static void __exit agp_amdk7_cleanup(void) static void __exit agp_amdk7_cleanup(void)
......
...@@ -227,74 +227,71 @@ static struct gatt_mask amd_8151_masks[] = ...@@ -227,74 +227,71 @@ static struct gatt_mask amd_8151_masks[] =
{.mask = 0x00000001, .type = 0} {.mask = 0x00000001, .type = 0}
}; };
struct agp_bridge_data amd_8151_bridge = {
static int __init amd_8151_setup (struct pci_dev *pdev) .masks = amd_8151_masks,
{ .aperture_sizes = (void *)amd_8151_sizes,
struct pci_dev *dev; .size_type = U32_APER_SIZE,
int i=0; .num_aperture_sizes = 7,
.configure = amd_8151_configure,
agp_bridge->masks = amd_8151_masks; .fetch_size = amd_x86_64_fetch_size,
agp_bridge->aperture_sizes = (void *) amd_8151_sizes; .cleanup = amd_8151_cleanup,
agp_bridge->size_type = U32_APER_SIZE; .tlb_flush = amd_x86_64_tlbflush,
agp_bridge->num_aperture_sizes = 7; .mask_memory = amd_8151_mask_memory,
agp_bridge->dev_private_data = NULL; .agp_enable = agp_generic_enable,
agp_bridge->needs_scratch_page = FALSE; .cache_flush = global_cache_flush,
agp_bridge->configure = amd_8151_configure; .create_gatt_table = agp_generic_create_gatt_table,
agp_bridge->fetch_size = amd_x86_64_fetch_size; .free_gatt_table = agp_generic_free_gatt_table,
agp_bridge->cleanup = amd_8151_cleanup; .insert_memory = x86_64_insert_memory,
agp_bridge->tlb_flush = amd_x86_64_tlbflush; .remove_memory = agp_generic_remove_memory,
agp_bridge->mask_memory = amd_8151_mask_memory; .alloc_by_type = agp_generic_alloc_by_type,
agp_bridge->agp_enable = agp_generic_enable; .free_by_type = agp_generic_free_by_type,
agp_bridge->cache_flush = global_cache_flush; .agp_alloc_page = agp_generic_alloc_page,
agp_bridge->create_gatt_table = agp_generic_create_gatt_table; .agp_destroy_page = agp_generic_destroy_page,
agp_bridge->free_gatt_table = agp_generic_free_gatt_table; .suspend = agp_generic_suspend,
agp_bridge->insert_memory = x86_64_insert_memory; .resume = agp_generic_resume,
agp_bridge->remove_memory = agp_generic_remove_memory; };
agp_bridge->alloc_by_type = agp_generic_alloc_by_type;
agp_bridge->free_by_type = agp_generic_free_by_type;
agp_bridge->agp_alloc_page = agp_generic_alloc_page;
agp_bridge->agp_destroy_page = agp_generic_destroy_page;
agp_bridge->suspend = agp_generic_suspend;
agp_bridge->resume = agp_generic_resume;
agp_bridge->cant_use_aperture = 0;
/* cache pci_devs of northbridges. */
pci_for_each_dev(dev) {
if (dev->bus->number==0 && PCI_FUNC(dev->devfn)==3 &&
(PCI_SLOT(dev->devfn) >=24) && (PCI_SLOT(dev->devfn) <=31)) {
hammers[i++] = dev;
nr_garts = i;
if (i==MAX_HAMMER_GARTS)
return 0;
}
}
return 0;
}
static struct agp_driver amd_k8_agp_driver = { static struct agp_driver amd_k8_agp_driver = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
}; };
static int __init agp_amdk8_probe (struct pci_dev *dev, const struct pci_device_id *ent) static int __init agp_amdk8_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{ {
u8 cap_ptr = 0; struct pci_dev *loop_dev;
u8 cap_ptr;
int i = 0;
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP); cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
if (cap_ptr == 0) if (!cap_ptr)
return -ENODEV; return -ENODEV;
printk (KERN_INFO PFX "Detected Opteron/Athlon64 on-CPU GART\n"); printk(KERN_INFO PFX "Detected Opteron/Athlon64 on-CPU GART\n");
agp_bridge->dev = dev; amd_8151_bridge.dev = pdev;
agp_bridge->capndx = cap_ptr; amd_8151_bridge.capndx = cap_ptr;
/* Fill in the mode register */ /* Fill in the mode register */
pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+PCI_AGP_STATUS, &agp_bridge->mode); pci_read_config_dword(pdev,
amd_8151_setup(dev); amd_8151_bridge.capndx+PCI_AGP_STATUS,
amd_k8_agp_driver.dev = dev; &amd_8151_bridge.mode);
/* cache pci_devs of northbridges. */
pci_for_each_dev(loop_dev) {
if (loop_dev->bus->number == 0 &&
PCI_FUNC(loop_dev->devfn) == 3 &&
PCI_SLOT(loop_dev->devfn) >=24 &&
PCI_SLOT(loop_dev->devfn) <=31) {
hammers[i++] = loop_dev;
nr_garts = i;
if (i == MAX_HAMMER_GARTS)
return 0;
}
}
memcpy(agp_bridge, &amd_8151_bridge, sizeof(struct agp_bridge_data));
amd_k8_agp_driver.dev = pdev;
agp_register_driver(&amd_k8_agp_driver); agp_register_driver(&amd_k8_agp_driver);
return 0; return 0;
} }
...@@ -322,15 +319,7 @@ static struct __initdata pci_driver agp_amdk8_pci_driver = { ...@@ -322,15 +319,7 @@ static struct __initdata pci_driver agp_amdk8_pci_driver = {
/* Not static due to IOMMU code calling it early. */ /* Not static due to IOMMU code calling it early. */
int __init agp_amdk8_init(void) int __init agp_amdk8_init(void)
{ {
int ret_val; return pci_module_init(&agp_amdk8_pci_driver);
ret_val = pci_module_init(&agp_amdk8_pci_driver);
if (ret_val)
agp_bridge->type = NOT_SUPPORTED;
agp_bridge->type = AMD_8151;
return ret_val;
} }
static void __exit agp_amdk8_cleanup(void) static void __exit agp_amdk8_cleanup(void)
......
...@@ -328,58 +328,54 @@ static unsigned long hp_zx1_mask_memory(unsigned long addr, int type) ...@@ -328,58 +328,54 @@ static unsigned long hp_zx1_mask_memory(unsigned long addr, int type)
return HP_ZX1_PDIR_VALID_BIT | addr; return HP_ZX1_PDIR_VALID_BIT | addr;
} }
static int __init hp_zx1_setup (struct pci_dev *pdev __attribute__((unused))) struct agp_bridge_data hp_zx1_bridge = {
{ .type = HP_ZX1,
agp_bridge->masks = hp_zx1_masks; .masks = hp_zx1_masks,
agp_bridge->dev_private_data = NULL; .size_type = FIXED_APER_SIZE,
agp_bridge->size_type = FIXED_APER_SIZE; .configure = hp_zx1_configure,
agp_bridge->needs_scratch_page = FALSE; .fetch_size = hp_zx1_fetch_size,
agp_bridge->configure = hp_zx1_configure; .cleanup = hp_zx1_cleanup,
agp_bridge->fetch_size = hp_zx1_fetch_size; .tlb_flush = hp_zx1_tlbflush,
agp_bridge->cleanup = hp_zx1_cleanup; .mask_memory = hp_zx1_mask_memory,
agp_bridge->tlb_flush = hp_zx1_tlbflush; .agp_enable = agp_generic_enable,
agp_bridge->mask_memory = hp_zx1_mask_memory; .cache_flush = global_cache_flush,
agp_bridge->agp_enable = agp_generic_enable; .create_gatt_table = hp_zx1_create_gatt_table,
agp_bridge->cache_flush = global_cache_flush; .free_gatt_table = hp_zx1_free_gatt_table,
agp_bridge->create_gatt_table = hp_zx1_create_gatt_table; .insert_memory = hp_zx1_insert_memory,
agp_bridge->free_gatt_table = hp_zx1_free_gatt_table; .remove_memory = hp_zx1_remove_memory,
agp_bridge->insert_memory = hp_zx1_insert_memory; .alloc_by_type = agp_generic_alloc_by_type,
agp_bridge->remove_memory = hp_zx1_remove_memory; .free_by_type = agp_generic_free_by_type,
agp_bridge->alloc_by_type = agp_generic_alloc_by_type; .agp_alloc_page = agp_generic_alloc_page,
agp_bridge->free_by_type = agp_generic_free_by_type; .agp_destroy_page = agp_generic_destroy_page,
agp_bridge->agp_alloc_page = agp_generic_alloc_page; .cant_use_aperture = 1,
agp_bridge->agp_destroy_page = agp_generic_destroy_page; };
agp_bridge->cant_use_aperture = 1;
return hp_zx1_ioc_init();
}
static int __init agp_find_supported_device(struct pci_dev *dev) static struct agp_driver hp_agp_driver = {
.owner = THIS_MODULE,
};
static int __init agp_hp_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{ {
agp_bridge->dev = dev; int error;
/* ZX1 LBAs can be either PCI or AGP bridges */ /* ZX1 LBAs can be either PCI or AGP bridges */
if (pci_find_capability(dev, PCI_CAP_ID_AGP)) { if (!pci_find_capability(pdev, PCI_CAP_ID_AGP))
printk(KERN_INFO PFX "Detected HP ZX1 AGP chipset at %s\n", return -ENODEV;
dev->slot_name);
agp_bridge->type = HP_ZX1;
agp_bridge->dev = dev;
return hp_zx1_setup(dev);
}
return -ENODEV;
}
static struct agp_driver hp_agp_driver = { printk(KERN_INFO PFX "Detected HP ZX1 AGP chipset at %s\n",
.owner = THIS_MODULE, pdev->slot_name);
};
static int __init agp_hp_probe (struct pci_dev *dev, const struct pci_device_id *ent) error = hp_zx1_ioc_init();
{ if (error)
if (agp_find_supported_device(dev) == 0) { return error;
hp_agp_driver.dev = dev; hp_zx1_bridge.dev = pdev;
agp_register_driver(&hp_agp_driver);
return 0; memcpy(agp_bridge, &hp_zx1_bridge, sizeof(struct agp_bridge_data));
}
return -ENODEV; hp_agp_driver.dev = pdev;
agp_register_driver(&hp_agp_driver);
return 0;
} }
static struct pci_device_id agp_hp_pci_table[] __initdata = { static struct pci_device_id agp_hp_pci_table[] __initdata = {
...@@ -404,13 +400,7 @@ static struct __initdata pci_driver agp_hp_pci_driver = { ...@@ -404,13 +400,7 @@ static struct __initdata pci_driver agp_hp_pci_driver = {
static int __init agp_hp_init(void) static int __init agp_hp_init(void)
{ {
int ret_val; return pci_module_init(&agp_hp_pci_driver);
ret_val = pci_module_init(&agp_hp_pci_driver);
if (ret_val)
agp_bridge->type = NOT_SUPPORTED;
return ret_val;
} }
static void __exit agp_hp_cleanup(void) static void __exit agp_hp_cleanup(void)
......
...@@ -523,58 +523,57 @@ static unsigned long i460_mask_memory (unsigned long addr, int type) ...@@ -523,58 +523,57 @@ static unsigned long i460_mask_memory (unsigned long addr, int type)
| (((addr & ~((1 << I460_IO_PAGE_SHIFT) - 1)) & 0xffffff000) >> 12)); | (((addr & ~((1 << I460_IO_PAGE_SHIFT) - 1)) & 0xffffff000) >> 12));
} }
static int __init intel_i460_setup (struct pci_dev *pdev __attribute__((unused))) struct agp_bridge_data intel_i460_bridge = {
{ .masks = i460_masks,
agp_bridge->masks = i460_masks; .aperture_sizes = (void *)i460_sizes,
agp_bridge->aperture_sizes = (void *) i460_sizes; .size_type = U8_APER_SIZE,
agp_bridge->size_type = U8_APER_SIZE; .num_aperture_sizes = 3,
agp_bridge->num_aperture_sizes = 3; .configure = i460_configure,
agp_bridge->dev_private_data = NULL; .fetch_size = i460_fetch_size,
agp_bridge->needs_scratch_page = FALSE; .cleanup = i460_cleanup,
agp_bridge->configure = i460_configure; .tlb_flush = i460_tlb_flush,
agp_bridge->fetch_size = i460_fetch_size; .mask_memory = i460_mask_memory,
agp_bridge->cleanup = i460_cleanup; .agp_enable = agp_generic_enable,
agp_bridge->tlb_flush = i460_tlb_flush; .cache_flush = global_cache_flush,
agp_bridge->mask_memory = i460_mask_memory; .create_gatt_table = i460_create_gatt_table,
agp_bridge->agp_enable = agp_generic_enable; .free_gatt_table = i460_free_gatt_table,
agp_bridge->cache_flush = global_cache_flush;
agp_bridge->create_gatt_table = i460_create_gatt_table;
agp_bridge->free_gatt_table = i460_free_gatt_table;
#if I460_LARGE_IO_PAGES #if I460_LARGE_IO_PAGES
agp_bridge->insert_memory = i460_insert_memory; .insert_memory = i460_insert_memory,
agp_bridge->remove_memory = i460_remove_memory; .remove_memory = i460_remove_memory,
agp_bridge->agp_alloc_page = i460_alloc_page; .agp_alloc_page = i460_alloc_page,
agp_bridge->agp_destroy_page = i460_destroy_page; .agp_destroy_page = i460_destroy_page,
#else #else
agp_bridge->insert_memory = i460_insert_memory_small_io_page; .insert_memory = i460_insert_memory_small_io_page,
agp_bridge->remove_memory = i460_remove_memory_small_io_page; .remove_memory = i460_remove_memory_small_io_page,
agp_bridge->agp_alloc_page = agp_generic_alloc_page; .agp_alloc_page = agp_generic_alloc_page,
agp_bridge->agp_destroy_page = agp_generic_destroy_page; .agp_destroy_page = agp_generic_destroy_page,
#endif #endif
agp_bridge->alloc_by_type = agp_generic_alloc_by_type; .alloc_by_type = agp_generic_alloc_by_type,
agp_bridge->free_by_type = agp_generic_free_by_type; .free_by_type = agp_generic_free_by_type,
agp_bridge->suspend = agp_generic_suspend; .suspend = agp_generic_suspend,
agp_bridge->resume = agp_generic_resume; .resume = agp_generic_resume,
agp_bridge->cant_use_aperture = 1; .cant_use_aperture = 1,
return 0; };
}
static struct agp_driver i460_agp_driver = { static struct agp_driver i460_agp_driver = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
}; };
static int __init agp_intel_i460_probe (struct pci_dev *dev, const struct pci_device_id *ent) static int __init agp_intel_i460_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{ {
u8 cap_ptr = 0; u8 cap_ptr;
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP); cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
if (cap_ptr == 0) if (!cap_ptr)
return -ENODEV; return -ENODEV;
agp_bridge->dev = dev; intel_i460_bridge.dev = pdev;
agp_bridge->capndx = cap_ptr; intel_i460_bridge.capndx = cap_ptr;
intel_i460_setup(dev);
i460_agp_driver.dev = dev; memcpy(agp_bridge, &intel_i460_bridge, sizeof(struct agp_bridge_data));
i460_agp_driver.dev = pdev;
agp_register_driver(&i460_agp_driver); agp_register_driver(&i460_agp_driver);
return 0; return 0;
} }
...@@ -601,13 +600,7 @@ static struct __initdata pci_driver agp_intel_i460_pci_driver = { ...@@ -601,13 +600,7 @@ static struct __initdata pci_driver agp_intel_i460_pci_driver = {
static int __init agp_intel_i460_init(void) static int __init agp_intel_i460_init(void)
{ {
int ret_val; return pci_module_init(&agp_intel_i460_pci_driver);
ret_val = pci_module_init(&agp_intel_i460_pci_driver);
if (ret_val)
agp_bridge->type = NOT_SUPPORTED;
return ret_val;
} }
static void __exit agp_intel_i460_cleanup(void) static void __exit agp_intel_i460_cleanup(void)
......
...@@ -86,164 +86,136 @@ static struct gatt_mask sis_generic_masks[] = ...@@ -86,164 +86,136 @@ static struct gatt_mask sis_generic_masks[] =
{.mask = 0x00000000, .type = 0} {.mask = 0x00000000, .type = 0}
}; };
static int __init sis_generic_setup (struct pci_dev *pdev) struct agp_bridge_data sis_generic_bridge = {
{ .type = SIS_GENERIC,
agp_bridge->masks = sis_generic_masks; .masks = sis_generic_masks,
agp_bridge->aperture_sizes = (void *) sis_generic_sizes; .aperture_sizes = (void *)sis_generic_sizes,
agp_bridge->size_type = U8_APER_SIZE; .size_type = U8_APER_SIZE,
agp_bridge->num_aperture_sizes = 7; .num_aperture_sizes = 7,
agp_bridge->dev_private_data = NULL; .configure = sis_configure,
agp_bridge->needs_scratch_page = FALSE; .fetch_size = sis_fetch_size,
agp_bridge->configure = sis_configure; .cleanup = sis_cleanup,
agp_bridge->fetch_size = sis_fetch_size; .tlb_flush = sis_tlbflush,
agp_bridge->cleanup = sis_cleanup; .mask_memory = sis_mask_memory,
agp_bridge->tlb_flush = sis_tlbflush; .agp_enable = agp_generic_enable,
agp_bridge->mask_memory = sis_mask_memory; .cache_flush = global_cache_flush,
agp_bridge->agp_enable = agp_generic_enable; .create_gatt_table = agp_generic_create_gatt_table,
agp_bridge->cache_flush = global_cache_flush; .free_gatt_table = agp_generic_free_gatt_table,
agp_bridge->create_gatt_table = agp_generic_create_gatt_table; .insert_memory = agp_generic_insert_memory,
agp_bridge->free_gatt_table = agp_generic_free_gatt_table; .remove_memory = agp_generic_remove_memory,
agp_bridge->insert_memory = agp_generic_insert_memory; .alloc_by_type = agp_generic_alloc_by_type,
agp_bridge->remove_memory = agp_generic_remove_memory; .free_by_type = agp_generic_free_by_type,
agp_bridge->alloc_by_type = agp_generic_alloc_by_type; .agp_alloc_page = agp_generic_alloc_page,
agp_bridge->free_by_type = agp_generic_free_by_type; .agp_destroy_page = agp_generic_destroy_page,
agp_bridge->agp_alloc_page = agp_generic_alloc_page; .suspend = agp_generic_suspend,
agp_bridge->agp_destroy_page = agp_generic_destroy_page; .resume = agp_generic_resume,
agp_bridge->suspend = agp_generic_suspend; };
agp_bridge->resume = agp_generic_resume;
agp_bridge->cant_use_aperture = 0;
return 0;
}
struct agp_device_ids sis_agp_device_ids[] __initdata = struct agp_device_ids sis_agp_device_ids[] __initdata =
{ {
{ {
.device_id = PCI_DEVICE_ID_SI_740, .device_id = PCI_DEVICE_ID_SI_740,
.chipset = SIS_GENERIC,
.chipset_name = "740", .chipset_name = "740",
}, },
{ {
.device_id = PCI_DEVICE_ID_SI_650, .device_id = PCI_DEVICE_ID_SI_650,
.chipset = SIS_GENERIC,
.chipset_name = "650", .chipset_name = "650",
}, },
{ {
.device_id = PCI_DEVICE_ID_SI_651, .device_id = PCI_DEVICE_ID_SI_651,
.chipset = SIS_GENERIC,
.chipset_name = "651", .chipset_name = "651",
}, },
{ {
.device_id = PCI_DEVICE_ID_SI_645, .device_id = PCI_DEVICE_ID_SI_645,
.chipset = SIS_GENERIC,
.chipset_name = "645", .chipset_name = "645",
}, },
{ {
.device_id = PCI_DEVICE_ID_SI_646, .device_id = PCI_DEVICE_ID_SI_646,
.chipset = SIS_GENERIC,
.chipset_name = "646", .chipset_name = "646",
}, },
{ {
.device_id = PCI_DEVICE_ID_SI_735, .device_id = PCI_DEVICE_ID_SI_735,
.chipset = SIS_GENERIC,
.chipset_name = "735", .chipset_name = "735",
}, },
{ {
.device_id = PCI_DEVICE_ID_SI_745, .device_id = PCI_DEVICE_ID_SI_745,
.chipset = SIS_GENERIC,
.chipset_name = "745", .chipset_name = "745",
}, },
{ {
.device_id = PCI_DEVICE_ID_SI_730, .device_id = PCI_DEVICE_ID_SI_730,
.chipset = SIS_GENERIC,
.chipset_name = "730", .chipset_name = "730",
}, },
{ {
.device_id = PCI_DEVICE_ID_SI_630, .device_id = PCI_DEVICE_ID_SI_630,
.chipset = SIS_GENERIC,
.chipset_name = "630", .chipset_name = "630",
}, },
{ {
.device_id = PCI_DEVICE_ID_SI_540, .device_id = PCI_DEVICE_ID_SI_540,
.chipset = SIS_GENERIC,
.chipset_name = "540", .chipset_name = "540",
}, },
{ {
.device_id = PCI_DEVICE_ID_SI_620, .device_id = PCI_DEVICE_ID_SI_620,
.chipset = SIS_GENERIC,
.chipset_name = "620", .chipset_name = "620",
}, },
{ {
.device_id = PCI_DEVICE_ID_SI_530, .device_id = PCI_DEVICE_ID_SI_530,
.chipset = SIS_GENERIC,
.chipset_name = "530", .chipset_name = "530",
}, },
{ {
.device_id = PCI_DEVICE_ID_SI_550, .device_id = PCI_DEVICE_ID_SI_550,
.chipset = SIS_GENERIC,
.chipset_name = "550", .chipset_name = "550",
}, },
{ }, /* dummy final entry, always present */ { }, /* dummy final entry, always present */
}; };
/* scan table above for supported devices */ static struct agp_driver sis_agp_driver = {
static int __init agp_lookup_host_bridge (struct pci_dev *pdev) .owner = THIS_MODULE,
};
static int __init agp_sis_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{ {
int j=0; struct agp_device_ids *devs = sis_agp_device_ids;
struct agp_device_ids *devs; u8 cap_ptr;
int j;
devs = sis_agp_device_ids;
cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
if (!cap_ptr)
return -ENODEV;
while (devs[j].chipset_name != NULL) { /* probe for known chipsets */
for (j = 0; devs[j].chipset_name; j++) {
if (pdev->device == devs[j].device_id) { if (pdev->device == devs[j].device_id) {
printk (KERN_INFO PFX "Detected SiS %s chipset\n", printk(KERN_INFO PFX "Detected SiS %s chipset\n",
devs[j].chipset_name); devs[j].chipset_name);
agp_bridge->type = devs[j].chipset; goto found;
if (devs[j].chipset_setup != NULL)
return devs[j].chipset_setup(pdev);
else
return sis_generic_setup(pdev);
} }
j++;
} }
/* try init anyway, if user requests it */ if (!agp_try_unsupported) {
if (agp_try_unsupported) { printk(KERN_ERR PFX
printk(KERN_WARNING PFX "Trying generic SiS routines" "Unsupported SiS chipset (device id: %04x),"
" for device id: %04x\n", pdev->device); " you might want to try agp_try_unsupported=1.\n",
agp_bridge->type = SIS_GENERIC; pdev->device);
return sis_generic_setup(pdev); return -ENODEV;
} }
printk(KERN_ERR PFX "Unsupported SiS chipset (device id: %04x)," printk(KERN_WARNING PFX "Trying generic SiS routines"
" you might want to try agp_try_unsupported=1.\n", pdev->device); " for device id: %04x\n", pdev->device);
return -ENODEV;
}
static struct agp_driver sis_agp_driver = {
.owner = THIS_MODULE,
};
static int __init agp_sis_probe (struct pci_dev *dev, const struct pci_device_id *ent) found:
{ sis_generic_bridge.dev = pdev;
u8 cap_ptr = 0; sis_generic_bridge.capndx = cap_ptr;
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP); /* Fill in the mode register */
if (cap_ptr == 0) pci_read_config_dword(pdev, sis_generic_bridge.capndx+PCI_AGP_STATUS,
return -ENODEV; &sis_generic_bridge.mode);
/* probe for known chipsets */ memcpy(agp_bridge, &sis_generic_bridge,
if (agp_lookup_host_bridge(dev) != -ENODEV) { sizeof(struct agp_bridge_data));
agp_bridge->dev = dev; sis_agp_driver.dev = pdev;
agp_bridge->capndx = cap_ptr; agp_register_driver(&sis_agp_driver);
/* Fill in the mode register */ return 0;
pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+PCI_AGP_STATUS, &agp_bridge->mode);
sis_agp_driver.dev = dev;
agp_register_driver(&sis_agp_driver);
return 0;
}
return -ENODEV;
} }
static struct pci_device_id agp_sis_pci_table[] __initdata = { static struct pci_device_id agp_sis_pci_table[] __initdata = {
...@@ -268,13 +240,7 @@ static struct __initdata pci_driver agp_sis_pci_driver = { ...@@ -268,13 +240,7 @@ static struct __initdata pci_driver agp_sis_pci_driver = {
static int __init agp_sis_init(void) static int __init agp_sis_init(void)
{ {
int ret_val; return pci_module_init(&agp_sis_pci_driver);
ret_val = pci_module_init(&agp_sis_pci_driver);
if (ret_val)
agp_bridge->type = NOT_SUPPORTED;
return ret_val;
} }
static void __exit agp_sis_cleanup(void) static void __exit agp_sis_cleanup(void)
......
...@@ -420,120 +420,95 @@ static void serverworks_agp_enable(u32 mode) ...@@ -420,120 +420,95 @@ static void serverworks_agp_enable(u32 mode)
agp_device_command(command, 0); agp_device_command(command, 0);
} }
static int __init serverworks_setup (struct pci_dev *pdev) struct agp_bridge_data sworks_bridge = {
{ .type = SVWRKS_GENERIC,
u32 temp; .masks = serverworks_masks,
u32 temp2; .aperture_sizes = (void *)serverworks_sizes,
.size_type = LVL2_APER_SIZE,
serverworks_private.svrwrks_dev = pdev; .num_aperture_sizes = 7,
.dev_private_data = &serverworks_private,
agp_bridge->masks = serverworks_masks; .configure = serverworks_configure,
agp_bridge->aperture_sizes = (void *) serverworks_sizes; .fetch_size = serverworks_fetch_size,
agp_bridge->size_type = LVL2_APER_SIZE; .cleanup = serverworks_cleanup,
agp_bridge->num_aperture_sizes = 7; .tlb_flush = serverworks_tlbflush,
agp_bridge->dev_private_data = (void *) &serverworks_private; .mask_memory = serverworks_mask_memory,
agp_bridge->needs_scratch_page = TRUE; .agp_enable = serverworks_agp_enable,
agp_bridge->configure = serverworks_configure; .cache_flush = global_cache_flush,
agp_bridge->fetch_size = serverworks_fetch_size; .create_gatt_table = serverworks_create_gatt_table,
agp_bridge->cleanup = serverworks_cleanup; .free_gatt_table = serverworks_free_gatt_table,
agp_bridge->tlb_flush = serverworks_tlbflush; .insert_memory = serverworks_insert_memory,
agp_bridge->mask_memory = serverworks_mask_memory; .remove_memory = serverworks_remove_memory,
agp_bridge->agp_enable = serverworks_agp_enable; .alloc_by_type = agp_generic_alloc_by_type,
agp_bridge->cache_flush = global_cache_flush; .free_by_type = agp_generic_free_by_type,
agp_bridge->create_gatt_table = serverworks_create_gatt_table; .agp_alloc_page = agp_generic_alloc_page,
agp_bridge->free_gatt_table = serverworks_free_gatt_table; .agp_destroy_page = agp_generic_destroy_page,
agp_bridge->insert_memory = serverworks_insert_memory; .suspend = agp_generic_suspend,
agp_bridge->remove_memory = serverworks_remove_memory; .resume = agp_generic_resume,
agp_bridge->alloc_by_type = agp_generic_alloc_by_type; };
agp_bridge->free_by_type = agp_generic_free_by_type;
agp_bridge->agp_alloc_page = agp_generic_alloc_page;
agp_bridge->agp_destroy_page = agp_generic_destroy_page;
agp_bridge->suspend = agp_generic_suspend;
agp_bridge->resume = agp_generic_resume;
agp_bridge->cant_use_aperture = 0;
pci_read_config_dword(agp_bridge->dev,
SVWRKS_APSIZE,
&temp);
serverworks_private.gart_addr_ofs = 0x10;
if(temp & PCI_BASE_ADDRESS_MEM_TYPE_64) {
pci_read_config_dword(agp_bridge->dev,
SVWRKS_APSIZE + 4,
&temp2);
if(temp2 != 0) {
printk("Detected 64 bit aperture address, but top "
"bits are not zero. Disabling agp\n");
return -ENODEV;
}
serverworks_private.mm_addr_ofs = 0x18;
} else {
serverworks_private.mm_addr_ofs = 0x14;
}
pci_read_config_dword(agp_bridge->dev,
serverworks_private.mm_addr_ofs,
&temp);
if(temp & PCI_BASE_ADDRESS_MEM_TYPE_64) {
pci_read_config_dword(agp_bridge->dev,
serverworks_private.mm_addr_ofs + 4,
&temp2);
if(temp2 != 0) {
printk("Detected 64 bit MMIO address, but top "
"bits are not zero. Disabling agp\n");
return -ENODEV;
}
}
return 0;
}
static struct agp_driver serverworks_agp_driver = {
.owner = THIS_MODULE,
};
static int __init agp_find_supported_device(struct pci_dev *dev) static int __init agp_serverworks_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{ {
struct pci_dev *bridge_dev; struct pci_dev *bridge_dev;
u32 temp, temp2;
/* Everything is on func 1 here so we are hardcoding function one */ /* Everything is on func 1 here so we are hardcoding function one */
bridge_dev = pci_find_slot ((unsigned int)dev->bus->number, PCI_DEVFN(0, 1)); bridge_dev = pci_find_slot((unsigned int)pdev->bus->number,
if(bridge_dev == NULL) { PCI_DEVFN(0, 1));
if (!bridge_dev) {
printk(KERN_INFO PFX "agpgart: Detected a Serverworks " printk(KERN_INFO PFX "agpgart: Detected a Serverworks "
"Chipset, but could not find the secondary " "Chipset, but could not find the secondary "
"device.\n"); "device.\n");
return -ENODEV; return -ENODEV;
} }
agp_bridge->dev = dev; sworks_bridge.dev = pdev;
switch (dev->device) { switch (pdev->device) {
case PCI_DEVICE_ID_SERVERWORKS_HE: case PCI_DEVICE_ID_SERVERWORKS_HE:
case PCI_DEVICE_ID_SERVERWORKS_LE: case PCI_DEVICE_ID_SERVERWORKS_LE:
case 0x0007: case 0x0007:
agp_bridge->type = SVWRKS_GENERIC; break;
return serverworks_setup(bridge_dev);
default: default:
if(agp_try_unsupported) { if (!agp_try_unsupported)
agp_bridge->type = SVWRKS_GENERIC; return -ENODEV;
return serverworks_setup(bridge_dev);
}
break; break;
} }
return -ENODEV;
}
static struct agp_driver serverworks_agp_driver = { serverworks_private.svrwrks_dev = bridge_dev;
.owner = THIS_MODULE, serverworks_private.gart_addr_ofs = 0x10;
};
pci_read_config_dword(pdev, SVWRKS_APSIZE, &temp);
if (temp & PCI_BASE_ADDRESS_MEM_TYPE_64) {
pci_read_config_dword(pdev, SVWRKS_APSIZE + 4, &temp2);
if (temp2 != 0) {
printk("Detected 64 bit aperture address, but top "
"bits are not zero. Disabling agp\n");
return -ENODEV;
}
serverworks_private.mm_addr_ofs = 0x18;
} else
serverworks_private.mm_addr_ofs = 0x14;
static int __init agp_serverworks_probe (struct pci_dev *dev, const struct pci_device_id *ent) pci_read_config_dword(pdev, serverworks_private.mm_addr_ofs, &temp);
{ if (temp & PCI_BASE_ADDRESS_MEM_TYPE_64) {
if (agp_find_supported_device(dev) == 0) { pci_read_config_dword(pdev,
serverworks_agp_driver.dev = dev; serverworks_private.mm_addr_ofs + 4, &temp2);
agp_register_driver(&serverworks_agp_driver); if (temp2 != 0) {
return 0; printk("Detected 64 bit MMIO address, but top "
"bits are not zero. Disabling agp\n");
return -ENODEV;
}
} }
return -ENODEV;
memcpy(agp_bridge, &sworks_bridge, sizeof(struct agp_bridge_data));
serverworks_agp_driver.dev = pdev;
agp_register_driver(&serverworks_agp_driver);
return 0;
} }
static struct pci_device_id agp_serverworks_pci_table[] __initdata = { static struct pci_device_id agp_serverworks_pci_table[] __initdata = {
...@@ -558,13 +533,7 @@ static struct __initdata pci_driver agp_serverworks_pci_driver = { ...@@ -558,13 +533,7 @@ static struct __initdata pci_driver agp_serverworks_pci_driver = {
static int __init agp_serverworks_init(void) static int __init agp_serverworks_init(void)
{ {
int ret_val; return pci_module_init(&agp_serverworks_pci_driver);
ret_val = pci_module_init(&agp_serverworks_pci_driver);
if (ret_val)
agp_bridge->type = NOT_SUPPORTED;
return ret_val;
} }
static void __exit agp_serverworks_cleanup(void) static void __exit agp_serverworks_cleanup(void)
......
...@@ -174,99 +174,55 @@ static struct aper_size_info_16 via_generic_agp3_sizes[11] = ...@@ -174,99 +174,55 @@ static struct aper_size_info_16 via_generic_agp3_sizes[11] =
{ 2048, 524288, 9, 1<<11} /* 2GB <- Max supported */ { 2048, 524288, 9, 1<<11} /* 2GB <- Max supported */
}; };
struct agp_bridge_data via_generic_agp3_bridge = {
.type = VIA_GENERIC,
.masks = via_generic_masks,
.aperture_sizes = (void *)via_generic_agp3_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 10,
.configure = via_configure_agp3,
.fetch_size = via_fetch_size_agp3,
.cleanup = via_cleanup_agp3,
.tlb_flush = via_tlbflush_agp3,
.mask_memory = via_mask_memory,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
.free_gatt_table = agp_generic_free_gatt_table,
.insert_memory = agp_generic_insert_memory,
.remove_memory = agp_generic_remove_memory,
.alloc_by_type = agp_generic_alloc_by_type,
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
static int __init via_generic_agp3_setup (struct pci_dev *pdev) struct agp_bridge_data via_generic_bridge = {
{ .type = VIA_GENERIC,
agp_bridge->dev = pdev; .masks = via_generic_masks,
agp_bridge->type = VIA_GENERIC; .aperture_sizes = (void *)via_generic_sizes,
agp_bridge->masks = via_generic_masks; .size_type = U8_APER_SIZE,
agp_bridge->aperture_sizes = (void *) via_generic_agp3_sizes; .num_aperture_sizes = 7,
agp_bridge->size_type = U16_APER_SIZE; .configure = via_configure,
agp_bridge->num_aperture_sizes = 10; .fetch_size = via_fetch_size,
agp_bridge->dev_private_data = NULL; .cleanup = via_cleanup,
agp_bridge->needs_scratch_page = FALSE; .tlb_flush = via_tlbflush,
agp_bridge->agp_enable = agp_generic_enable; .mask_memory = via_mask_memory,
agp_bridge->configure = via_configure_agp3; .agp_enable = agp_generic_enable,
agp_bridge->fetch_size = via_fetch_size_agp3; .cache_flush = global_cache_flush,
agp_bridge->cleanup = via_cleanup_agp3; .create_gatt_table = agp_generic_create_gatt_table,
agp_bridge->tlb_flush = via_tlbflush_agp3; .free_gatt_table = agp_generic_free_gatt_table,
agp_bridge->mask_memory = via_mask_memory; .insert_memory = agp_generic_insert_memory,
agp_bridge->cache_flush = global_cache_flush; .remove_memory = agp_generic_remove_memory,
agp_bridge->create_gatt_table = agp_generic_create_gatt_table; .alloc_by_type = agp_generic_alloc_by_type,
agp_bridge->free_gatt_table = agp_generic_free_gatt_table; .free_by_type = agp_generic_free_by_type,
agp_bridge->insert_memory = agp_generic_insert_memory; .agp_alloc_page = agp_generic_alloc_page,
agp_bridge->remove_memory = agp_generic_remove_memory; .agp_destroy_page = agp_generic_destroy_page,
agp_bridge->alloc_by_type = agp_generic_alloc_by_type; .suspend = agp_generic_suspend,
agp_bridge->free_by_type = agp_generic_free_by_type; .resume = agp_generic_resume,
agp_bridge->agp_alloc_page = agp_generic_alloc_page; };
agp_bridge->agp_destroy_page = agp_generic_destroy_page;
agp_bridge->suspend = agp_generic_suspend;
agp_bridge->resume = agp_generic_resume;
agp_bridge->cant_use_aperture = 0;
return 0;
}
static int __init via_generic_setup (struct pci_dev *pdev)
{
/* Garg, there are KT400s with KT266 IDs. */
if (pdev->device == PCI_DEVICE_ID_VIA_8367_0) {
/* Is there a KT400 subsystem ? */
if (pdev->subsystem_device==PCI_DEVICE_ID_VIA_8377_0) {
u8 reg;
printk (KERN_INFO PFX "Found KT400 in disguise as a KT266.\n");
/* Check AGP compatibility mode. */
pci_read_config_byte(pdev, VIA_AGPSEL, &reg);
if ((reg & (1<<1))==0)
return via_generic_agp3_setup(pdev);
/* Its in 2.0 mode, drop through. */
}
}
agp_bridge->masks = via_generic_masks;
agp_bridge->aperture_sizes = (void *) via_generic_sizes;
agp_bridge->size_type = U8_APER_SIZE;
agp_bridge->num_aperture_sizes = 7;
agp_bridge->dev_private_data = NULL;
agp_bridge->needs_scratch_page = FALSE;
agp_bridge->configure = via_configure;
agp_bridge->fetch_size = via_fetch_size;
agp_bridge->cleanup = via_cleanup;
agp_bridge->tlb_flush = via_tlbflush;
agp_bridge->mask_memory = via_mask_memory;
agp_bridge->agp_enable = agp_generic_enable;
agp_bridge->cache_flush = global_cache_flush;
agp_bridge->create_gatt_table = agp_generic_create_gatt_table;
agp_bridge->free_gatt_table = agp_generic_free_gatt_table;
agp_bridge->insert_memory = agp_generic_insert_memory;
agp_bridge->remove_memory = agp_generic_remove_memory;
agp_bridge->alloc_by_type = agp_generic_alloc_by_type;
agp_bridge->free_by_type = agp_generic_free_by_type;
agp_bridge->agp_alloc_page = agp_generic_alloc_page;
agp_bridge->agp_destroy_page = agp_generic_destroy_page;
agp_bridge->suspend = agp_generic_suspend;
agp_bridge->resume = agp_generic_resume;
agp_bridge->cant_use_aperture = 0;
return 0;
}
/* The KT400 does magick to put the AGP bridge compliant with the same
* standards version as the graphics card. */
static int __init via_kt400_setup(struct pci_dev *pdev)
{
u8 reg;
pci_read_config_byte(pdev, VIA_AGPSEL, &reg);
/* Check AGP 2.0 compatibility mode. */
if ((reg & (1<<1))==0)
return via_generic_agp3_setup(pdev);
return via_generic_setup(pdev);
}
static struct agp_device_ids via_agp_device_ids[] __initdata = static struct agp_device_ids via_agp_device_ids[] __initdata =
{ {
...@@ -353,7 +309,6 @@ static struct agp_device_ids via_agp_device_ids[] __initdata = ...@@ -353,7 +309,6 @@ static struct agp_device_ids via_agp_device_ids[] __initdata =
{ {
.device_id = PCI_DEVICE_ID_VIA_8377_0, .device_id = PCI_DEVICE_ID_VIA_8377_0,
.chipset_name = "Apollo Pro KT400", .chipset_name = "Apollo Pro KT400",
.chipset_setup = via_kt400_setup,
}, },
/* VT8604 / VT8605 / VT8603 / TwisterT /* VT8604 / VT8605 / VT8603 / TwisterT
...@@ -408,69 +363,83 @@ static struct agp_device_ids via_agp_device_ids[] __initdata = ...@@ -408,69 +363,83 @@ static struct agp_device_ids via_agp_device_ids[] __initdata =
{ }, /* dummy final entry, always present */ { }, /* dummy final entry, always present */
}; };
static struct agp_driver via_agp_driver = {
.owner = THIS_MODULE,
};
/* scan table above for supported devices */ static int __init agp_via_probe(struct pci_dev *pdev,
static int __init agp_lookup_host_bridge (struct pci_dev *pdev) const struct pci_device_id *ent)
{ {
int j=0; struct agp_device_ids *devs = via_agp_device_ids;
struct agp_device_ids *devs; struct agp_bridge_data *bridge = &via_generic_bridge;
int j = 0;
devs = via_agp_device_ids; u8 cap_ptr, reg;
while (devs[j].chipset_name != NULL) { cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
if (pdev->device == devs[j].device_id) { if (!cap_ptr)
printk (KERN_INFO PFX "Detected VIA %s chipset\n", devs[j].chipset_name); return -ENODEV;
agp_bridge->type = VIA_GENERIC;
if (devs[j].chipset_setup != NULL) /* probe for known chipsets */
return devs[j].chipset_setup(pdev); for (j = 0; devs[j].chipset_name; j++) {
else if (pdev->device == devs[j].device_id) {
return via_generic_setup(pdev); printk (KERN_INFO PFX "Detected VIA %s chipset\n",
devs[j].chipset_name);
goto found;
} }
j++;
} }
/* try init anyway, if user requests it */
if (agp_try_unsupported) { if (agp_try_unsupported) {
printk(KERN_WARNING PFX "Trying generic VIA routines" printk(KERN_ERR PFX
" for device id: %04x\n", pdev->device); "Unsupported VIA chipset (device id: %04x),"
agp_bridge->type = VIA_GENERIC; " you might want to try agp_try_unsupported=1.\n",
return via_generic_setup(pdev); pdev->device);
return -ENODEV;
} }
printk(KERN_ERR PFX "Unsupported VIA chipset (device id: %04x)," printk(KERN_WARNING PFX "Trying generic VIA routines"
" you might want to try agp_try_unsupported=1.\n", pdev->device); " for device id: %04x\n", pdev->device);
return -ENODEV;
}
found:
switch (pdev->device) {
case PCI_DEVICE_ID_VIA_8367_0:
/*
* Garg, there are KT400s with KT266 IDs.
*/
/* Is there a KT400 subsystem ? */
if (pdev->subsystem_device != PCI_DEVICE_ID_VIA_8377_0)
break;
printk(KERN_INFO PFX "Found KT400 in disguise as a KT266.\n");
/*FALLTHROUGH*/
case PCI_DEVICE_ID_VIA_8377_0:
/*
* The KT400 does magick to put the AGP bridge compliant
* with the same standards version as the graphics card.
*/
pci_read_config_byte(pdev, VIA_AGPSEL, &reg);
/* Check AGP 2.0 compatibility mode. */
if ((reg & (1<<1))==0) {
bridge = &via_generic_agp3_bridge;
break;
}
}
static struct agp_driver via_agp_driver = {
.owner = THIS_MODULE,
};
bridge->dev = pdev;
bridge->capndx = cap_ptr;
static int __init agp_via_probe (struct pci_dev *dev, const struct pci_device_id *ent) /* Fill in the mode register */
{ pci_read_config_dword(pdev,
u8 cap_ptr = 0; bridge->capndx+PCI_AGP_STATUS, &bridge->mode);
cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP); memcpy(agp_bridge, bridge, sizeof(struct agp_bridge_data));
if (cap_ptr == 0)
return -ENODEV;
/* probe for known chipsets */ via_agp_driver.dev = pdev;
if (agp_lookup_host_bridge (dev) != -ENODEV) { agp_register_driver(&via_agp_driver);
agp_bridge->dev = dev; return 0;
agp_bridge->capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+PCI_AGP_STATUS, &agp_bridge->mode);
via_agp_driver.dev = dev;
agp_register_driver(&via_agp_driver);
return 0;
}
return -ENODEV;
} }
static struct pci_device_id agp_via_pci_table[] __initdata = { static struct pci_device_id agp_via_pci_table[] __initdata = {
{ {
.class = (PCI_CLASS_BRIDGE_HOST << 8), .class = (PCI_CLASS_BRIDGE_HOST << 8),
...@@ -495,13 +464,7 @@ static struct __initdata pci_driver agp_via_pci_driver = { ...@@ -495,13 +464,7 @@ static struct __initdata pci_driver agp_via_pci_driver = {
static int __init agp_via_init(void) static int __init agp_via_init(void)
{ {
int ret_val; return pci_module_init(&agp_via_pci_driver);
ret_val = pci_module_init(&agp_via_pci_driver);
if (ret_val)
agp_bridge->type = NOT_SUPPORTED;
return ret_val;
} }
......
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