Revert "drm/amd/display: skip dsc config for navi10 bring up"

This reverts commit 9e14d4f1.

optc dsc config was causing warnings due to missing register
definitions. With the registers restored, the function can
be re-enabled

The reverted commit also disabled sanity checks and dsc
power gating. The sanity check warnings are not associated
with dsc, and power gating on dsc still has an issue on
non-dsc monitors where the dsc hardware block is never init
and so cannot respond to power gating requests. Therefore,
those are left as is
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c

@@ -191,15 +191,6 @@ void optc2_set_dsc_config(struct timing_generator *optc,
 					uint32_t dsc_slice_width)
 {
 	struct optc *optc1 = DCN10TG_FROM_TG(optc);
-	uint32_t data_format = 0;
-	/* skip if dsc mode is not changed */
-	data_format = dm_read_reg(CTX, REG(OPTC_DATA_FORMAT_CONTROL));
-
-	data_format = data_format & 0x30; /* bit5:4 */
-	data_format = data_format >> 4;
-
-	if (data_format == dsc_mode)
-		return;
 
 	REG_UPDATE(OPTC_DATA_FORMAT_CONTROL,
 		OPTC_DSC_MODE, dsc_mode);