Commit ab344828 authored by Gleb Natapov's avatar Gleb Natapov Committed by Marcelo Tosatti

KVM: x86: fix checking of cr0 validity

Move to/from Control Registers chapter of Intel SDM says.  "Reserved bits
in CR0 remain clear after any load of those registers; attempts to set
them have no impact". Control Register chapter says "Bits 63:32 of CR0 are
reserved and must be written with zeros. Writing a nonzero value to any
of the upper 32 bits results in a general-protection exception, #GP(0)."

This patch tries to implement this twisted logic.
Signed-off-by: default avatarGleb Natapov <gleb@redhat.com>
Reported-by: default avatarLorenzo Martignoni <martignlo@gmail.com>
Signed-off-by: default avatarMarcelo Tosatti <mtosatti@redhat.com>
parent f0f4b930
...@@ -430,12 +430,16 @@ void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) ...@@ -430,12 +430,16 @@ void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
{ {
cr0 |= X86_CR0_ET; cr0 |= X86_CR0_ET;
if (cr0 & CR0_RESERVED_BITS) { #ifdef CONFIG_X86_64
if (cr0 & 0xffffffff00000000UL) {
printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n", printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
cr0, kvm_read_cr0(vcpu)); cr0, kvm_read_cr0(vcpu));
kvm_inject_gp(vcpu, 0); kvm_inject_gp(vcpu, 0);
return; return;
} }
#endif
cr0 &= ~CR0_RESERVED_BITS;
if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) { if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n"); printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
......
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