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Commit ac51596f authored by Ben Skeggs's avatar Ben Skeggs
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drm/nouveau/ibus: cosmetic changes 

This is purely preparation for upcoming commits, there should be no
code changes here.
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 5b920d92
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Inline Side-by-side
Showing with 97 additions and 109 deletions
drivers/gpu/drm/nouveau/include/nvkm/subdev/ibus.h
View file @ ac51596f
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
#include <core/subdev.h> #include <core/subdev.h>
struct nvkm_ibus { struct nvkm_ibus {
struct nvkm_subdev base; struct nvkm_subdev subdev;
}; };
static inline struct nvkm_ibus * static inline struct nvkm_ibus *
...@@ -16,11 +16,11 @@ nvkm_ibus(void *obj) ...@@ -16,11 +16,11 @@ nvkm_ibus(void *obj)
nvkm_subdev_create_((p), (e), (o), 0, "PIBUS", "ibus", \ nvkm_subdev_create_((p), (e), (o), 0, "PIBUS", "ibus", \
sizeof(**d), (void **)d) sizeof(**d), (void **)d)
#define nvkm_ibus_destroy(p) \ #define nvkm_ibus_destroy(p) \
nvkm_subdev_destroy(&(p)->base) nvkm_subdev_destroy(&(p)->subdev)
#define nvkm_ibus_init(p) \ #define nvkm_ibus_init(p) \
nvkm_subdev_init(&(p)->base) nvkm_subdev_init(&(p)->subdev)
#define nvkm_ibus_fini(p,s) \ #define nvkm_ibus_fini(p,s) \
nvkm_subdev_fini(&(p)->base, (s)) nvkm_subdev_fini(&(p)->subdev, (s))
#define _nvkm_ibus_dtor _nvkm_subdev_dtor #define _nvkm_ibus_dtor _nvkm_subdev_dtor
#define _nvkm_ibus_init _nvkm_subdev_init #define _nvkm_ibus_init _nvkm_subdev_init
......
drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c
View file @ ac51596f
...@@ -23,55 +23,51 @@ ...@@ -23,55 +23,51 @@
*/ */
#include <subdev/ibus.h> #include <subdev/ibus.h>
struct gf100_ibus_priv {
struct nvkm_ibus base;
};
static void static void
gf100_ibus_intr_hub(struct gf100_ibus_priv *priv, int i) gf100_ibus_intr_hub(struct nvkm_ibus *ibus, int i)
{ {
u32 addr = nv_rd32(priv, 0x122120 + (i * 0x0400)); u32 addr = nv_rd32(ibus, 0x122120 + (i * 0x0400));
u32 data = nv_rd32(priv, 0x122124 + (i * 0x0400)); u32 data = nv_rd32(ibus, 0x122124 + (i * 0x0400));
u32 stat = nv_rd32(priv, 0x122128 + (i * 0x0400)); u32 stat = nv_rd32(ibus, 0x122128 + (i * 0x0400));
nv_error(priv, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat); nv_error(ibus, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
nv_mask(priv, 0x122128 + (i * 0x0400), 0x00000200, 0x00000000); nv_mask(ibus, 0x122128 + (i * 0x0400), 0x00000200, 0x00000000);
} }
static void static void
gf100_ibus_intr_rop(struct gf100_ibus_priv *priv, int i) gf100_ibus_intr_rop(struct nvkm_ibus *ibus, int i)
{ {
u32 addr = nv_rd32(priv, 0x124120 + (i * 0x0400)); u32 addr = nv_rd32(ibus, 0x124120 + (i * 0x0400));
u32 data = nv_rd32(priv, 0x124124 + (i * 0x0400)); u32 data = nv_rd32(ibus, 0x124124 + (i * 0x0400));
u32 stat = nv_rd32(priv, 0x124128 + (i * 0x0400)); u32 stat = nv_rd32(ibus, 0x124128 + (i * 0x0400));
nv_error(priv, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat); nv_error(ibus, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
nv_mask(priv, 0x124128 + (i * 0x0400), 0x00000200, 0x00000000); nv_mask(ibus, 0x124128 + (i * 0x0400), 0x00000200, 0x00000000);
} }
static void static void
gf100_ibus_intr_gpc(struct gf100_ibus_priv *priv, int i) gf100_ibus_intr_gpc(struct nvkm_ibus *ibus, int i)
{ {
u32 addr = nv_rd32(priv, 0x128120 + (i * 0x0400)); u32 addr = nv_rd32(ibus, 0x128120 + (i * 0x0400));
u32 data = nv_rd32(priv, 0x128124 + (i * 0x0400)); u32 data = nv_rd32(ibus, 0x128124 + (i * 0x0400));
u32 stat = nv_rd32(priv, 0x128128 + (i * 0x0400)); u32 stat = nv_rd32(ibus, 0x128128 + (i * 0x0400));
nv_error(priv, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat); nv_error(ibus, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
nv_mask(priv, 0x128128 + (i * 0x0400), 0x00000200, 0x00000000); nv_mask(ibus, 0x128128 + (i * 0x0400), 0x00000200, 0x00000000);
} }
static void static void
gf100_ibus_intr(struct nvkm_subdev *subdev) gf100_ibus_intr(struct nvkm_subdev *subdev)
{ {
struct gf100_ibus_priv *priv = (void *)subdev; struct nvkm_ibus *ibus = (void *)subdev;
u32 intr0 = nv_rd32(priv, 0x121c58); u32 intr0 = nv_rd32(ibus, 0x121c58);
u32 intr1 = nv_rd32(priv, 0x121c5c); u32 intr1 = nv_rd32(ibus, 0x121c5c);
u32 hubnr = nv_rd32(priv, 0x121c70); u32 hubnr = nv_rd32(ibus, 0x121c70);
u32 ropnr = nv_rd32(priv, 0x121c74); u32 ropnr = nv_rd32(ibus, 0x121c74);
u32 gpcnr = nv_rd32(priv, 0x121c78); u32 gpcnr = nv_rd32(ibus, 0x121c78);
u32 i; u32 i;
for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) { for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) {
u32 stat = 0x00000100 << i; u32 stat = 0x00000100 << i;
if (intr0 & stat) { if (intr0 & stat) {
gf100_ibus_intr_hub(priv, i); gf100_ibus_intr_hub(ibus, i);
intr0 &= ~stat; intr0 &= ~stat;
} }
} }
...@@ -79,7 +75,7 @@ gf100_ibus_intr(struct nvkm_subdev *subdev) ...@@ -79,7 +75,7 @@ gf100_ibus_intr(struct nvkm_subdev *subdev)
for (i = 0; (intr0 & 0xffff0000) && i < ropnr; i++) { for (i = 0; (intr0 & 0xffff0000) && i < ropnr; i++) {
u32 stat = 0x00010000 << i; u32 stat = 0x00010000 << i;
if (intr0 & stat) { if (intr0 & stat) {
gf100_ibus_intr_rop(priv, i); gf100_ibus_intr_rop(ibus, i);
intr0 &= ~stat; intr0 &= ~stat;
} }
} }
...@@ -87,7 +83,7 @@ gf100_ibus_intr(struct nvkm_subdev *subdev) ...@@ -87,7 +83,7 @@ gf100_ibus_intr(struct nvkm_subdev *subdev)
for (i = 0; intr1 && i < gpcnr; i++) { for (i = 0; intr1 && i < gpcnr; i++) {
u32 stat = 0x00000001 << i; u32 stat = 0x00000001 << i;
if (intr1 & stat) { if (intr1 & stat) {
gf100_ibus_intr_gpc(priv, i); gf100_ibus_intr_gpc(ibus, i);
intr1 &= ~stat; intr1 &= ~stat;
} }
} }
...@@ -98,15 +94,15 @@ gf100_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine, ...@@ -98,15 +94,15 @@ gf100_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size, struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject) struct nvkm_object **pobject)
{ {
struct gf100_ibus_priv *priv; struct nvkm_ibus *ibus;
int ret; int ret;
ret = nvkm_ibus_create(parent, engine, oclass, &priv); ret = nvkm_ibus_create(parent, engine, oclass, &ibus);
*pobject = nv_object(priv); *pobject = nv_object(ibus);
if (ret) if (ret)
return ret; return ret;
nv_subdev(priv)->intr = gf100_ibus_intr; nv_subdev(ibus)->intr = gf100_ibus_intr;
return 0; return 0;
} }
......
drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c
View file @ ac51596f
...@@ -23,55 +23,51 @@ ...@@ -23,55 +23,51 @@
*/ */
#include <subdev/ibus.h> #include <subdev/ibus.h>
struct gk104_ibus_priv {
struct nvkm_ibus base;
};
static void static void
gk104_ibus_intr_hub(struct gk104_ibus_priv *priv, int i) gk104_ibus_intr_hub(struct nvkm_ibus *ibus, int i)
{ {
u32 addr = nv_rd32(priv, 0x122120 + (i * 0x0800)); u32 addr = nv_rd32(ibus, 0x122120 + (i * 0x0800));
u32 data = nv_rd32(priv, 0x122124 + (i * 0x0800)); u32 data = nv_rd32(ibus, 0x122124 + (i * 0x0800));
u32 stat = nv_rd32(priv, 0x122128 + (i * 0x0800)); u32 stat = nv_rd32(ibus, 0x122128 + (i * 0x0800));
nv_error(priv, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat); nv_error(ibus, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
nv_mask(priv, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000); nv_mask(ibus, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000);
} }
static void static void
gk104_ibus_intr_rop(struct gk104_ibus_priv *priv, int i) gk104_ibus_intr_rop(struct nvkm_ibus *ibus, int i)
{ {
u32 addr = nv_rd32(priv, 0x124120 + (i * 0x0800)); u32 addr = nv_rd32(ibus, 0x124120 + (i * 0x0800));
u32 data = nv_rd32(priv, 0x124124 + (i * 0x0800)); u32 data = nv_rd32(ibus, 0x124124 + (i * 0x0800));
u32 stat = nv_rd32(priv, 0x124128 + (i * 0x0800)); u32 stat = nv_rd32(ibus, 0x124128 + (i * 0x0800));
nv_error(priv, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat); nv_error(ibus, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
nv_mask(priv, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000); nv_mask(ibus, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000);
} }
static void static void
gk104_ibus_intr_gpc(struct gk104_ibus_priv *priv, int i) gk104_ibus_intr_gpc(struct nvkm_ibus *ibus, int i)
{ {
u32 addr = nv_rd32(priv, 0x128120 + (i * 0x0800)); u32 addr = nv_rd32(ibus, 0x128120 + (i * 0x0800));
u32 data = nv_rd32(priv, 0x128124 + (i * 0x0800)); u32 data = nv_rd32(ibus, 0x128124 + (i * 0x0800));
u32 stat = nv_rd32(priv, 0x128128 + (i * 0x0800)); u32 stat = nv_rd32(ibus, 0x128128 + (i * 0x0800));
nv_error(priv, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat); nv_error(ibus, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
nv_mask(priv, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000); nv_mask(ibus, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000);
} }
static void static void
gk104_ibus_intr(struct nvkm_subdev *subdev) gk104_ibus_intr(struct nvkm_subdev *subdev)
{ {
struct gk104_ibus_priv *priv = (void *)subdev; struct nvkm_ibus *ibus = (void *)subdev;
u32 intr0 = nv_rd32(priv, 0x120058); u32 intr0 = nv_rd32(ibus, 0x120058);
u32 intr1 = nv_rd32(priv, 0x12005c); u32 intr1 = nv_rd32(ibus, 0x12005c);
u32 hubnr = nv_rd32(priv, 0x120070); u32 hubnr = nv_rd32(ibus, 0x120070);
u32 ropnr = nv_rd32(priv, 0x120074); u32 ropnr = nv_rd32(ibus, 0x120074);
u32 gpcnr = nv_rd32(priv, 0x120078); u32 gpcnr = nv_rd32(ibus, 0x120078);
u32 i; u32 i;
for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) { for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) {
u32 stat = 0x00000100 << i; u32 stat = 0x00000100 << i;
if (intr0 & stat) { if (intr0 & stat) {
gk104_ibus_intr_hub(priv, i); gk104_ibus_intr_hub(ibus, i);
intr0 &= ~stat; intr0 &= ~stat;
} }
} }
...@@ -79,7 +75,7 @@ gk104_ibus_intr(struct nvkm_subdev *subdev) ...@@ -79,7 +75,7 @@ gk104_ibus_intr(struct nvkm_subdev *subdev)
for (i = 0; (intr0 & 0xffff0000) && i < ropnr; i++) { for (i = 0; (intr0 & 0xffff0000) && i < ropnr; i++) {
u32 stat = 0x00010000 << i; u32 stat = 0x00010000 << i;
if (intr0 & stat) { if (intr0 & stat) {
gk104_ibus_intr_rop(priv, i); gk104_ibus_intr_rop(ibus, i);
intr0 &= ~stat; intr0 &= ~stat;
} }
} }
...@@ -87,7 +83,7 @@ gk104_ibus_intr(struct nvkm_subdev *subdev) ...@@ -87,7 +83,7 @@ gk104_ibus_intr(struct nvkm_subdev *subdev)
for (i = 0; intr1 && i < gpcnr; i++) { for (i = 0; intr1 && i < gpcnr; i++) {
u32 stat = 0x00000001 << i; u32 stat = 0x00000001 << i;
if (intr1 & stat) { if (intr1 & stat) {
gk104_ibus_intr_gpc(priv, i); gk104_ibus_intr_gpc(ibus, i);
intr1 &= ~stat; intr1 &= ~stat;
} }
} }
...@@ -96,16 +92,16 @@ gk104_ibus_intr(struct nvkm_subdev *subdev) ...@@ -96,16 +92,16 @@ gk104_ibus_intr(struct nvkm_subdev *subdev)
static int static int
gk104_ibus_init(struct nvkm_object *object) gk104_ibus_init(struct nvkm_object *object)
{ {
struct gk104_ibus_priv *priv = (void *)object; struct nvkm_ibus *ibus = (void *)object;
int ret = nvkm_ibus_init(&priv->base); int ret = nvkm_ibus_init(ibus);
if (ret == 0) { if (ret == 0) {
nv_mask(priv, 0x122318, 0x0003ffff, 0x00001000); nv_mask(ibus, 0x122318, 0x0003ffff, 0x00001000);
nv_mask(priv, 0x12231c, 0x0003ffff, 0x00000200); nv_mask(ibus, 0x12231c, 0x0003ffff, 0x00000200);
nv_mask(priv, 0x122310, 0x0003ffff, 0x00000800); nv_mask(ibus, 0x122310, 0x0003ffff, 0x00000800);
nv_mask(priv, 0x122348, 0x0003ffff, 0x00000100); nv_mask(ibus, 0x122348, 0x0003ffff, 0x00000100);
nv_mask(priv, 0x1223b0, 0x0003ffff, 0x00000fff); nv_mask(ibus, 0x1223b0, 0x0003ffff, 0x00000fff);
nv_mask(priv, 0x122348, 0x0003ffff, 0x00000200); nv_mask(ibus, 0x122348, 0x0003ffff, 0x00000200);
nv_mask(priv, 0x122358, 0x0003ffff, 0x00002880); nv_mask(ibus, 0x122358, 0x0003ffff, 0x00002880);
} }
return ret; return ret;
} }
...@@ -115,15 +111,15 @@ gk104_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine, ...@@ -115,15 +111,15 @@ gk104_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size, struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject) struct nvkm_object **pobject)
{ {
struct gk104_ibus_priv *priv; struct nvkm_ibus *ibus;
int ret; int ret;
ret = nvkm_ibus_create(parent, engine, oclass, &priv); ret = nvkm_ibus_create(parent, engine, oclass, &ibus);
*pobject = nv_object(priv); *pobject = nv_object(ibus);
if (ret) if (ret)
return ret; return ret;
nv_subdev(priv)->intr = gk104_ibus_intr; nv_subdev(ibus)->intr = gk104_ibus_intr;
return 0; return 0;
} }
......
drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk20a.c
View file @ ac51596f
...@@ -22,61 +22,57 @@ ...@@ -22,61 +22,57 @@
#include <subdev/ibus.h> #include <subdev/ibus.h>
#include <subdev/timer.h> #include <subdev/timer.h>
struct gk20a_ibus_priv {
struct nvkm_ibus base;
};
static void static void
gk20a_ibus_init_priv_ring(struct gk20a_ibus_priv *priv) gk20a_ibus_init_ibus_ring(struct nvkm_ibus *ibus)
{ {
nv_mask(priv, 0x137250, 0x3f, 0); nv_mask(ibus, 0x137250, 0x3f, 0);
nv_mask(priv, 0x000200, 0x20, 0); nv_mask(ibus, 0x000200, 0x20, 0);
usleep_range(20, 30); usleep_range(20, 30);
nv_mask(priv, 0x000200, 0x20, 0x20); nv_mask(ibus, 0x000200, 0x20, 0x20);
nv_wr32(priv, 0x12004c, 0x4); nv_wr32(ibus, 0x12004c, 0x4);
nv_wr32(priv, 0x122204, 0x2); nv_wr32(ibus, 0x122204, 0x2);
nv_rd32(priv, 0x122204); nv_rd32(ibus, 0x122204);
/* /*
* Bug: increase clock timeout to avoid operation failure at high * Bug: increase clock timeout to avoid operation failure at high
* gpcclk rate. * gpcclk rate.
*/ */
nv_wr32(priv, 0x122354, 0x800); nv_wr32(ibus, 0x122354, 0x800);
nv_wr32(priv, 0x128328, 0x800); nv_wr32(ibus, 0x128328, 0x800);
nv_wr32(priv, 0x124320, 0x800); nv_wr32(ibus, 0x124320, 0x800);
} }
static void static void
gk20a_ibus_intr(struct nvkm_subdev *subdev) gk20a_ibus_intr(struct nvkm_subdev *subdev)
{ {
struct gk20a_ibus_priv *priv = (void *)subdev; struct nvkm_ibus *ibus = (void *)subdev;
u32 status0 = nv_rd32(priv, 0x120058); u32 status0 = nv_rd32(ibus, 0x120058);
if (status0 & 0x7) { if (status0 & 0x7) {
nv_debug(priv, "resetting priv ring\n"); nv_debug(ibus, "resetting ibus ring\n");
gk20a_ibus_init_priv_ring(priv); gk20a_ibus_init_ibus_ring(ibus);
} }
/* Acknowledge interrupt */ /* Acknowledge interrupt */
nv_mask(priv, 0x12004c, 0x2, 0x2); nv_mask(ibus, 0x12004c, 0x2, 0x2);
if (!nv_wait(subdev, 0x12004c, 0x3f, 0x00)) if (!nv_wait(subdev, 0x12004c, 0x3f, 0x00))
nv_warn(priv, "timeout waiting for ringmaster ack\n"); nv_warn(ibus, "timeout waiting for ringmaster ack\n");
} }
static int static int
gk20a_ibus_init(struct nvkm_object *object) gk20a_ibus_init(struct nvkm_object *object)
{ {
struct gk20a_ibus_priv *priv = (void *)object; struct nvkm_ibus *ibus = (void *)object;
int ret; int ret;
ret = _nvkm_ibus_init(object); ret = _nvkm_ibus_init(object);
if (ret) if (ret)
return ret; return ret;
gk20a_ibus_init_priv_ring(priv); gk20a_ibus_init_ibus_ring(ibus);
return 0; return 0;
} }
...@@ -86,15 +82,15 @@ gk20a_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine, ...@@ -86,15 +82,15 @@ gk20a_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size, struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject) struct nvkm_object **pobject)
{ {
struct gk20a_ibus_priv *priv; struct nvkm_ibus *ibus;
int ret; int ret;
ret = nvkm_ibus_create(parent, engine, oclass, &priv); ret = nvkm_ibus_create(parent, engine, oclass, &ibus);
*pobject = nv_object(priv); *pobject = nv_object(ibus);
if (ret) if (ret)
return ret; return ret;
nv_subdev(priv)->intr = gk20a_ibus_intr; nv_subdev(ibus)->intr = gk20a_ibus_intr;
return 0; return 0;
} }
......
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