Commit accdab6d authored by Olof Johansson's avatar Olof Johansson

Merge tag 'imx-soc-5.10' of...

Merge tag 'imx-soc-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc

i.MX SoC update for 5.10:

- A series from Fabio Estevam to remove legacy non-DT i.MX platforms
  support and related board files. This is a natural move, as the
  platforms had been converted to DT for years, and we have not seen
  any users around these legacy non-DT support for a while.
- Enable cpufreq support for i.MX7ULP platform.

* tag 'imx-soc-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (26 commits)
  clk: imx: imx35: Remove mx35_clocks_init()
  clk: imx: imx31: Remove mx31_clocks_init()
  clk: imx: imx27: Remove mx27_clocks_init()
  ARM: imx: Remove unused definitions
  ARM: imx35: Retrieve the IIM base address from devicetree
  ARM: imx3: Retrieve the AVIC base address from devicetree
  ARM: imx3: Retrieve the CCM base address from devicetree
  ARM: imx31: Retrieve the IIM base address from devicetree
  ARM: imx27: Retrieve the CCM base address from devicetree
  ARM: imx27: Retrieve the SYSCTRL base address from devicetree
  ARM: imx: Remove remnant board file support pieces
  ARM: imx: Remove imx device directory
  ARM: imx: Remove iomux-v3 board code
  ARM: imx3: Remove imx3 soc_init()
  ARM: imx31: Remove remaining i.MX31 board code
  ARM: imx27: Retrieve AVIC base address from devicetree
  ARM: imx27: Get rid of mm-imx27.c
  ARM: imx27: Remove iomux-v1 board code
  ARM: imx27: Remove imx27_soc_init()
  ARM: imx7ulp: enable cpufreq
  ...

Link: https://lore.kernel.org/r/20200923073009.23678-2-shawnguo@kernel.orgSigned-off-by: default avatarOlof Johansson <olof@lixom.net>
parents a4f07008 fb956b3e
......@@ -20,9 +20,9 @@ CONFIG_MACH_MX27ADS=y
CONFIG_MACH_MX27_3DS=y
CONFIG_MACH_IMX27_VISSTRIM_M10=y
CONFIG_MACH_PCA100=y
CONFIG_MACH_IMX27_DT=y
CONFIG_SOC_IMX1=y
CONFIG_SOC_IMX25=y
CONFIG_SOC_IMX27=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
......
......@@ -15,20 +15,8 @@ CONFIG_PERF_EVENTS=y
# CONFIG_COMPAT_BRK is not set
CONFIG_ARCH_MULTI_V6=y
CONFIG_ARCH_MXC=y
CONFIG_MACH_MX31LILLY=y
CONFIG_MACH_MX31LITE=y
CONFIG_MACH_PCM037=y
CONFIG_MACH_PCM037_EET=y
CONFIG_MACH_MX31_3DS=y
CONFIG_MACH_MX31MOBOARD=y
CONFIG_MACH_QONG=y
CONFIG_MACH_ARMADILLO5X0=y
CONFIG_MACH_KZM_ARM11_01=y
CONFIG_MACH_IMX31_DT=y
CONFIG_MACH_IMX35_DT=y
CONFIG_MACH_PCM043=y
CONFIG_MACH_MX35_3DS=y
CONFIG_MACH_VPR200=y
CONFIG_SOC_IMX31=y
CONFIG_SOC_IMX35=y
CONFIG_SOC_IMX50=y
CONFIG_SOC_IMX51=y
CONFIG_SOC_IMX53=y
......
......@@ -29,8 +29,8 @@ CONFIG_MACH_MX27ADS=y
CONFIG_MACH_MX27_3DS=y
CONFIG_MACH_IMX27_VISSTRIM_M10=y
CONFIG_MACH_PCA100=y
CONFIG_MACH_IMX27_DT=y
CONFIG_SOC_IMX25=y
CONFIG_SOC_IMX27=y
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_KIRKWOOD=y
CONFIG_ARCH_ORION5X=y
......
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (C) 2010 Jason Wang <jason77.wang@gmail.com>
*/
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/smsc911x.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include "3ds_debugboard.h"
#include "hardware.h"
/* LAN9217 ethernet base address */
#define LAN9217_BASE_ADDR(n) (n + 0x0)
/* External UART */
#define UARTA_BASE_ADDR(n) (n + 0x8000)
#define UARTB_BASE_ADDR(n) (n + 0x10000)
#define BOARD_IO_ADDR(n) (n + 0x20000)
/* LED switchs */
#define LED_SWITCH_REG 0x00
/* buttons */
#define SWITCH_BUTTONS_REG 0x08
/* status, interrupt */
#define INTR_STATUS_REG 0x10
#define INTR_MASK_REG 0x38
#define INTR_RESET_REG 0x20
/* magic word for debug CPLD */
#define MAGIC_NUMBER1_REG 0x40
#define MAGIC_NUMBER2_REG 0x48
/* CPLD code version */
#define CPLD_CODE_VER_REG 0x50
/* magic word for debug CPLD */
#define MAGIC_NUMBER3_REG 0x58
/* module reset register*/
#define MODULE_RESET_REG 0x60
/* CPU ID and Personality ID */
#define MCU_BOARD_ID_REG 0x68
#define MXC_MAX_EXP_IO_LINES 16
/* interrupts like external uart , external ethernet etc*/
#define EXPIO_INT_ENET 0
#define EXPIO_INT_XUART_A 1
#define EXPIO_INT_XUART_B 2
#define EXPIO_INT_BUTTON_A 3
#define EXPIO_INT_BUTTON_B 4
static void __iomem *brd_io;
static struct irq_domain *domain;
static struct resource smsc911x_resources[] = {
{
.flags = IORESOURCE_MEM,
} , {
.flags = IORESOURCE_IRQ,
},
};
static struct smsc911x_platform_config smsc911x_config = {
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
};
static struct platform_device smsc_lan9217_device = {
.name = "smsc911x",
.id = -1,
.dev = {
.platform_data = &smsc911x_config,
},
.num_resources = ARRAY_SIZE(smsc911x_resources),
.resource = smsc911x_resources,
};
static void mxc_expio_irq_handler(struct irq_desc *desc)
{
u32 imr_val;
u32 int_valid;
u32 expio_irq;
/* irq = gpio irq number */
desc->irq_data.chip->irq_mask(&desc->irq_data);
imr_val = imx_readw(brd_io + INTR_MASK_REG);
int_valid = imx_readw(brd_io + INTR_STATUS_REG) & ~imr_val;
expio_irq = 0;
for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
if ((int_valid & 1) == 0)
continue;
generic_handle_irq(irq_find_mapping(domain, expio_irq));
}
desc->irq_data.chip->irq_ack(&desc->irq_data);
desc->irq_data.chip->irq_unmask(&desc->irq_data);
}
/*
* Disable an expio pin's interrupt by setting the bit in the imr.
* Irq is an expio virtual irq number
*/
static void expio_mask_irq(struct irq_data *d)
{
u16 reg;
u32 expio = d->hwirq;
reg = imx_readw(brd_io + INTR_MASK_REG);
reg |= (1 << expio);
imx_writew(reg, brd_io + INTR_MASK_REG);
}
static void expio_ack_irq(struct irq_data *d)
{
u32 expio = d->hwirq;
imx_writew(1 << expio, brd_io + INTR_RESET_REG);
imx_writew(0, brd_io + INTR_RESET_REG);
expio_mask_irq(d);
}
static void expio_unmask_irq(struct irq_data *d)
{
u16 reg;
u32 expio = d->hwirq;
reg = imx_readw(brd_io + INTR_MASK_REG);
reg &= ~(1 << expio);
imx_writew(reg, brd_io + INTR_MASK_REG);
}
static struct irq_chip expio_irq_chip = {
.irq_ack = expio_ack_irq,
.irq_mask = expio_mask_irq,
.irq_unmask = expio_unmask_irq,
};
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
int __init mxc_expio_init(u32 base, u32 intr_gpio)
{
u32 p_irq = gpio_to_irq(intr_gpio);
int irq_base;
int i;
brd_io = ioremap(BOARD_IO_ADDR(base), SZ_4K);
if (brd_io == NULL)
return -ENOMEM;
if ((imx_readw(brd_io + MAGIC_NUMBER1_REG) != 0xAAAA) ||
(imx_readw(brd_io + MAGIC_NUMBER2_REG) != 0x5555) ||
(imx_readw(brd_io + MAGIC_NUMBER3_REG) != 0xCAFE)) {
pr_info("3-Stack Debug board not detected\n");
iounmap(brd_io);
brd_io = NULL;
return -ENODEV;
}
pr_info("3-Stack Debug board detected, rev = 0x%04X\n",
readw(brd_io + CPLD_CODE_VER_REG));
/*
* Configure INT line as GPIO input
*/
gpio_request(intr_gpio, "expio_pirq");
gpio_direction_input(intr_gpio);
/* disable the interrupt and clear the status */
imx_writew(0, brd_io + INTR_MASK_REG);
imx_writew(0xFFFF, brd_io + INTR_RESET_REG);
imx_writew(0, brd_io + INTR_RESET_REG);
imx_writew(0x1F, brd_io + INTR_MASK_REG);
irq_base = irq_alloc_descs(-1, 0, MXC_MAX_EXP_IO_LINES, numa_node_id());
WARN_ON(irq_base < 0);
domain = irq_domain_add_legacy(NULL, MXC_MAX_EXP_IO_LINES, irq_base, 0,
&irq_domain_simple_ops, NULL);
WARN_ON(!domain);
for (i = irq_base; i < irq_base + MXC_MAX_EXP_IO_LINES; i++) {
irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
irq_clear_status_flags(i, IRQ_NOREQUEST);
}
irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW);
irq_set_chained_handler(p_irq, mxc_expio_irq_handler);
/* Register Lan device on the debugboard */
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
smsc911x_resources[0].start = LAN9217_BASE_ADDR(base);
smsc911x_resources[0].end = LAN9217_BASE_ADDR(base) + 0x100 - 1;
smsc911x_resources[1].start = irq_find_mapping(domain, EXPIO_INT_ENET);
smsc911x_resources[1].end = irq_find_mapping(domain, EXPIO_INT_ENET);
platform_device_register(&smsc_lan9217_device);
return 0;
}
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
*/
#ifndef __ASM_ARCH_MXC_3DS_DB_H__
#define __ASM_ARCH_MXC_3DS_DB_H__
extern int __init mxc_expio_init(u32 base, u32 intr_gpio);
#endif /* __ASM_ARCH_MXC_3DS_DB_H__ */
This diff is collapsed.
# SPDX-License-Identifier: GPL-2.0
obj-y := cpu.o system.o irq-common.o
obj-$(CONFIG_SOC_IMX21) += mm-imx21.o
obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o
obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o
obj-$(CONFIG_SOC_IMX27) += mm-imx27.o ehci-imx27.o
obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o
obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o
obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o mach-imx31.o
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o mach-imx35.o
imx5-pm-$(CONFIG_PM) += pm-imx5.o
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y)
obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
obj-$(CONFIG_MXC_TZIC) += tzic.o
obj-$(CONFIG_MXC_AVIC) += avic.o
......@@ -37,37 +31,6 @@ obj-y += ssi-fiq.o
obj-y += ssi-fiq-ksym.o
endif
# i.MX21 based machines
obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
# i.MX27 based machines
obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o
obj-$(CONFIG_MACH_IMX27_VISSTRIM_M10) += mach-imx27_visstrim_m10.o
obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
obj-$(CONFIG_MACH_IMX27_DT) += imx27-dt.o
# i.MX31 based machines
obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o
obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o
obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o
obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o
obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o
obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \
mx31moboard-marxbot.o mx31moboard-smartbot.o
obj-$(CONFIG_MACH_QONG) += mach-qong.o
obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
obj-$(CONFIG_MACH_BUG) += mach-bug.o
obj-$(CONFIG_MACH_IMX31_DT) += imx31-dt.o
# i.MX35 based machines
obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
obj-$(CONFIG_MACH_IMX35_DT) += imx35-dt.o
obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
......@@ -105,5 +68,3 @@ obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
obj-$(CONFIG_SOC_VF610) += mach-vf610.o
obj-$(CONFIG_SOC_LS1021A) += mach-ls1021a.o
obj-y += devices/
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
*
* Based on code for mobots boards,
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
*/
#ifndef __ASM_ARCH_MXC_BOARD_MX31LILLY_H__
#define __ASM_ARCH_MXC_BOARD_MX31LILLY_H__
#ifndef __ASSEMBLY__
enum mx31lilly_boards {
MX31LILLY_NOBOARD = 0,
MX31LILLY_DB = 1,
};
/*
* This CPU module needs a baseboard to work. After basic initializing
* its own devices, it calls the baseboard's init function.
*/
extern void mx31lilly_db_init(void);
#endif
#endif /* __ASM_ARCH_MXC_BOARD_MX31LILLY_H__ */
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
*
* Based on code for mobots boards,
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
*/
#ifndef __ASM_ARCH_MXC_BOARD_MX31LITE_H__
#define __ASM_ARCH_MXC_BOARD_MX31LITE_H__
#ifndef __ASSEMBLY__
enum mx31lite_boards {
MX31LITE_NOBOARD = 0,
MX31LITE_DB = 1,
};
/*
* This CPU module needs a baseboard to work. After basic initializing
* its own devices, it calls the baseboard's init function.
*/
extern void mx31lite_db_init(void);
#endif
#endif /* __ASM_ARCH_MXC_BOARD_MX31LITE_H__ */
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
*/
#ifndef __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__
#define __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__
#ifndef __ASSEMBLY__
enum mx31moboard_boards {
MX31NOBOARD = 0,
MX31DEVBOARD = 1,
MX31MARXBOT = 2,
MX31SMARTBOT = 3,
MX31EYEBOT = 4,
};
/*
* This CPU module needs a baseboard to work. After basic initializing
* its own devices, it calls the baseboard's init function.
*/
extern void mx31moboard_devboard_init(void);
extern void mx31moboard_marxbot_init(void);
extern void mx31moboard_smartbot_init(int board);
#endif
#endif /* __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__ */
......@@ -17,29 +17,14 @@ struct device_node;
enum mxc_cpu_pwr_mode;
struct of_device_id;
void mx21_map_io(void);
void mx27_map_io(void);
void mx31_map_io(void);
void mx35_map_io(void);
void imx21_init_early(void);
void imx27_init_early(void);
void imx31_init_early(void);
void imx35_init_early(void);
void mxc_init_irq(void __iomem *);
void mx21_init_irq(void);
void mx27_init_irq(void);
void mx31_init_irq(void);
void mx35_init_irq(void);
void imx21_soc_init(void);
void imx27_soc_init(void);
void imx31_soc_init(void);
void imx35_soc_init(void);
int mx21_clocks_init(unsigned long lref, unsigned long fref);
int mx27_clocks_init(unsigned long fref);
int mx31_clocks_init(unsigned long fref);
int mx35_clocks_init(void);
struct platform_device *mxc_register_gpio(char *name, int id,
resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
void mxc_set_cpu_type(unsigned int type);
void mxc_restart(enum reboot_mode, const char *);
void mxc_arch_reset_init(void __iomem *);
......
......@@ -9,6 +9,7 @@
*/
#include <linux/io.h>
#include <linux/of_address.h>
#include <linux/module.h>
#include "hardware.h"
......@@ -17,16 +18,23 @@ static int mx27_cpu_rev = -1;
static int mx27_cpu_partnumber;
#define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */
#define SYSCTRL_OFFSET 0x800 /* Offset from CCM base address */
static int mx27_read_cpu_rev(void)
{
void __iomem *ccm_base;
struct device_node *np;
u32 val;
np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");
ccm_base = of_iomap(np, 0);
BUG_ON(!ccm_base);
/*
* now we have access to the IO registers. As we need
* the silicon revision very early we read it here to
* avoid any further hooks
*/
val = imx_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR + SYS_CHIP_ID));
val = imx_readl(ccm_base + SYSCTRL_OFFSET + SYS_CHIP_ID);
mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
......
......@@ -6,6 +6,7 @@
*/
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/io.h>
#include "common.h"
......@@ -32,10 +33,16 @@ static struct {
static int mx31_read_cpu_rev(void)
{
void __iomem *iim_base;
struct device_node *np;
u32 i, srev;
np = of_find_compatible_node(NULL, NULL, "fsl,imx31-iim");
iim_base = of_iomap(np, 0);
BUG_ON(!iim_base);
/* read SREV register from IIM module */
srev = imx_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
srev = imx_readl(iim_base + MXC_IIMSREV);
srev &= 0xff;
for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
......
......@@ -5,6 +5,7 @@
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
*/
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/io.h>
#include "hardware.h"
......@@ -14,9 +15,15 @@ static int mx35_cpu_rev = -1;
static int mx35_read_cpu_rev(void)
{
void __iomem *iim_base;
struct device_node *np;
u32 rev;
rev = imx_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
np = of_find_compatible_node(NULL, NULL, "fsl,imx35-iim");
iim_base = of_iomap(np, 0);
BUG_ON(!iim_base);
rev = imx_readl(iim_base + MXC_IIMSREV);
switch (rev) {
case 0x00:
return IMX_CHIP_REVISION_1_0;
......
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "devices/devices-common.h"
extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data;
#define imx21_add_imx21_hcd(pdata) \
imx_add_imx21_hcd(&imx21_imx21_hcd_data, pdata)
extern const struct imx_imx2_wdt_data imx21_imx2_wdt_data;
#define imx21_add_imx2_wdt() \
imx_add_imx2_wdt(&imx21_imx2_wdt_data)
extern const struct imx_imx_fb_data imx21_imx_fb_data;
#define imx21_add_imx_fb(pdata) \
imx_add_imx_fb(&imx21_imx_fb_data, pdata)
extern const struct imx_imx_i2c_data imx21_imx_i2c_data;
#define imx21_add_imx_i2c(pdata) \
imx_add_imx_i2c(&imx21_imx_i2c_data, pdata)
extern const struct imx_imx_keypad_data imx21_imx_keypad_data;
#define imx21_add_imx_keypad(pdata) \
imx_add_imx_keypad(&imx21_imx_keypad_data, pdata)
extern const struct imx_imx_ssi_data imx21_imx_ssi_data[];
#define imx21_add_imx_ssi(id, pdata) \
imx_add_imx_ssi(&imx21_imx_ssi_data[id], pdata)
extern const struct imx_imx_uart_1irq_data imx21_imx_uart_data[];
#define imx21_add_imx_uart(id, pdata) \
imx_add_imx_uart_1irq(&imx21_imx_uart_data[id], pdata)
#define imx21_add_imx_uart0(pdata) imx21_add_imx_uart(0, pdata)
#define imx21_add_imx_uart1(pdata) imx21_add_imx_uart(1, pdata)
#define imx21_add_imx_uart2(pdata) imx21_add_imx_uart(2, pdata)
#define imx21_add_imx_uart3(pdata) imx21_add_imx_uart(3, pdata)
extern const struct imx_mxc_mmc_data imx21_mxc_mmc_data[];
#define imx21_add_mxc_mmc(id, pdata) \
imx_add_mxc_mmc(&imx21_mxc_mmc_data[id], pdata)
extern const struct imx_mxc_nand_data imx21_mxc_nand_data;
#define imx21_add_mxc_nand(pdata) \
imx_add_mxc_nand(&imx21_mxc_nand_data, pdata)
extern const struct imx_mxc_w1_data imx21_mxc_w1_data;
#define imx21_add_mxc_w1() \
imx_add_mxc_w1(&imx21_mxc_w1_data)
extern const struct imx_spi_imx_data imx21_cspi_data[];
#define imx21_add_cspi(id, pdata) \
imx_add_spi_imx(&imx21_cspi_data[id], pdata)
#define imx21_add_spi_imx0(pdata) imx21_add_cspi(0, pdata)
#define imx21_add_spi_imx1(pdata) imx21_add_cspi(1, pdata)
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "devices/devices-common.h"
extern const struct imx_fec_data imx27_fec_data;
#define imx27_add_fec(pdata) \
imx_add_fec(&imx27_fec_data, pdata)
extern const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data;
#define imx27_add_fsl_usb2_udc(pdata) \
imx_add_fsl_usb2_udc(&imx27_fsl_usb2_udc_data, pdata)
extern const struct imx_imx27_coda_data imx27_coda_data;
#define imx27_add_coda() \
imx_add_imx27_coda(&imx27_coda_data)
extern const struct imx_imx2_wdt_data imx27_imx2_wdt_data;
#define imx27_add_imx2_wdt() \
imx_add_imx2_wdt(&imx27_imx2_wdt_data)
extern const struct imx_imx_fb_data imx27_imx_fb_data;
#define imx27_add_imx_fb(pdata) \
imx_add_imx_fb(&imx27_imx_fb_data, pdata)
extern const struct imx_imx_i2c_data imx27_imx_i2c_data[];
#define imx27_add_imx_i2c(id, pdata) \
imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata)
extern const struct imx_imx_keypad_data imx27_imx_keypad_data;
#define imx27_add_imx_keypad(pdata) \
imx_add_imx_keypad(&imx27_imx_keypad_data, pdata)
extern const struct imx_imx_ssi_data imx27_imx_ssi_data[];
#define imx27_add_imx_ssi(id, pdata) \
imx_add_imx_ssi(&imx27_imx_ssi_data[id], pdata)
extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[];
#define imx27_add_imx_uart(id, pdata) \
imx_add_imx_uart_1irq(&imx27_imx_uart_data[id], pdata)
#define imx27_add_imx_uart0(pdata) imx27_add_imx_uart(0, pdata)
#define imx27_add_imx_uart1(pdata) imx27_add_imx_uart(1, pdata)
#define imx27_add_imx_uart2(pdata) imx27_add_imx_uart(2, pdata)
#define imx27_add_imx_uart3(pdata) imx27_add_imx_uart(3, pdata)
#define imx27_add_imx_uart4(pdata) imx27_add_imx_uart(4, pdata)
#define imx27_add_imx_uart5(pdata) imx27_add_imx_uart(5, pdata)
extern const struct imx_mx2_camera_data imx27_mx2_camera_data;
#define imx27_add_mx2_camera(pdata) \
imx_add_mx2_camera(&imx27_mx2_camera_data, pdata)
extern const struct imx_mx2_emma_data imx27_mx2_emmaprp_data;
#define imx27_add_mx2_emmaprp() \
imx_add_mx2_emmaprp(&imx27_mx2_emmaprp_data)
extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data;
#define imx27_add_mxc_ehci_otg(pdata) \
imx_add_mxc_ehci(&imx27_mxc_ehci_otg_data, pdata)
extern const struct imx_mxc_ehci_data imx27_mxc_ehci_hs_data[];
#define imx27_add_mxc_ehci_hs(id, pdata) \
imx_add_mxc_ehci(&imx27_mxc_ehci_hs_data[id - 1], pdata)
extern const struct imx_mxc_mmc_data imx27_mxc_mmc_data[];
#define imx27_add_mxc_mmc(id, pdata) \
imx_add_mxc_mmc(&imx27_mxc_mmc_data[id], pdata)
extern const struct imx_mxc_nand_data imx27_mxc_nand_data;
#define imx27_add_mxc_nand(pdata) \
imx_add_mxc_nand(&imx27_mxc_nand_data, pdata)
extern const struct imx_mxc_w1_data imx27_mxc_w1_data;
#define imx27_add_mxc_w1() \
imx_add_mxc_w1(&imx27_mxc_w1_data)
extern const struct imx_spi_imx_data imx27_cspi_data[];
#define imx27_add_cspi(id, gtable) \
imx_add_spi_imx(&imx27_cspi_data[id], gtable)
#define imx27_add_spi_imx0(gtable) imx27_add_cspi(0, gtable)
#define imx27_add_spi_imx1(gtable) imx27_add_cspi(1, gtable)
#define imx27_add_spi_imx2(gtable) imx27_add_cspi(2, gtable)
extern const struct imx_pata_imx_data imx27_pata_imx_data;
#define imx27_add_pata_imx() \
imx_add_pata_imx(&imx27_pata_imx_data)
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "devices/devices-common.h"
extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data;
#define imx31_add_fsl_usb2_udc(pdata) \
imx_add_fsl_usb2_udc(&imx31_fsl_usb2_udc_data, pdata)
extern const struct imx_imx2_wdt_data imx31_imx2_wdt_data;
#define imx31_add_imx2_wdt() \
imx_add_imx2_wdt(&imx31_imx2_wdt_data)
extern const struct imx_imx_i2c_data imx31_imx_i2c_data[];
#define imx31_add_imx_i2c(id, pdata) \
imx_add_imx_i2c(&imx31_imx_i2c_data[id], pdata)
#define imx31_add_imx_i2c0(pdata) imx31_add_imx_i2c(0, pdata)
#define imx31_add_imx_i2c1(pdata) imx31_add_imx_i2c(1, pdata)
#define imx31_add_imx_i2c2(pdata) imx31_add_imx_i2c(2, pdata)
extern const struct imx_imx_keypad_data imx31_imx_keypad_data;
#define imx31_add_imx_keypad(pdata) \
imx_add_imx_keypad(&imx31_imx_keypad_data, pdata)
extern const struct imx_imx_ssi_data imx31_imx_ssi_data[];
#define imx31_add_imx_ssi(id, pdata) \
imx_add_imx_ssi(&imx31_imx_ssi_data[id], pdata)
extern const struct imx_imx_uart_1irq_data imx31_imx_uart_data[];
#define imx31_add_imx_uart(id, pdata) \
imx_add_imx_uart_1irq(&imx31_imx_uart_data[id], pdata)
#define imx31_add_imx_uart0(pdata) imx31_add_imx_uart(0, pdata)
#define imx31_add_imx_uart1(pdata) imx31_add_imx_uart(1, pdata)
#define imx31_add_imx_uart2(pdata) imx31_add_imx_uart(2, pdata)
#define imx31_add_imx_uart3(pdata) imx31_add_imx_uart(3, pdata)
#define imx31_add_imx_uart4(pdata) imx31_add_imx_uart(4, pdata)
extern const struct imx_ipu_core_data imx31_ipu_core_data;
#define imx31_add_ipu_core() \
imx_add_ipu_core(&imx31_ipu_core_data)
#define imx31_alloc_mx3_camera(pdata) \
imx_alloc_mx3_camera(&imx31_ipu_core_data, pdata)
#define imx31_add_mx3_sdc_fb(pdata) \
imx_add_mx3_sdc_fb(&imx31_ipu_core_data, pdata)
extern const struct imx_mxc_ehci_data imx31_mxc_ehci_otg_data;
#define imx31_add_mxc_ehci_otg(pdata) \
imx_add_mxc_ehci(&imx31_mxc_ehci_otg_data, pdata)
extern const struct imx_mxc_ehci_data imx31_mxc_ehci_hs_data[];
#define imx31_add_mxc_ehci_hs(id, pdata) \
imx_add_mxc_ehci(&imx31_mxc_ehci_hs_data[id - 1], pdata)
extern const struct imx_mxc_mmc_data imx31_mxc_mmc_data[];
#define imx31_add_mxc_mmc(id, pdata) \
imx_add_mxc_mmc(&imx31_mxc_mmc_data[id], pdata)
extern const struct imx_mxc_nand_data imx31_mxc_nand_data;
#define imx31_add_mxc_nand(pdata) \
imx_add_mxc_nand(&imx31_mxc_nand_data, pdata)
extern const struct imx_mxc_rtc_data imx31_mxc_rtc_data;
#define imx31_add_mxc_rtc() \
imx_add_mxc_rtc(&imx31_mxc_rtc_data)
extern const struct imx_mxc_w1_data imx31_mxc_w1_data;
#define imx31_add_mxc_w1() \
imx_add_mxc_w1(&imx31_mxc_w1_data)
extern const struct imx_spi_imx_data imx31_cspi_data[];
#define imx31_add_cspi(id, gtable) \
imx_add_spi_imx(&imx31_cspi_data[id], gtable)
#define imx31_add_spi_imx0(gtable) imx31_add_cspi(0, gtable)
#define imx31_add_spi_imx1(gtable) imx31_add_cspi(1, gtable)
#define imx31_add_spi_imx2(gtable) imx31_add_cspi(2, gtable)
extern const struct imx_pata_imx_data imx31_pata_imx_data;
#define imx31_add_pata_imx() \
imx_add_pata_imx(&imx31_pata_imx_data)
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "devices/devices-common.h"
extern const struct imx_fec_data imx35_fec_data;
#define imx35_add_fec(pdata) \
imx_add_fec(&imx35_fec_data, pdata)
extern const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data;
#define imx35_add_fsl_usb2_udc(pdata) \
imx_add_fsl_usb2_udc(&imx35_fsl_usb2_udc_data, pdata)
extern const struct imx_flexcan_data imx35_flexcan_data[];
#define imx35_add_flexcan(id) \
imx_add_flexcan(&imx35_flexcan_data[id])
#define imx35_add_flexcan0() imx35_add_flexcan(0)
#define imx35_add_flexcan1() imx35_add_flexcan(1)
extern const struct imx_imx2_wdt_data imx35_imx2_wdt_data;
#define imx35_add_imx2_wdt() \
imx_add_imx2_wdt(&imx35_imx2_wdt_data)
extern const struct imx_imx_i2c_data imx35_imx_i2c_data[];
#define imx35_add_imx_i2c(id, pdata) \
imx_add_imx_i2c(&imx35_imx_i2c_data[id], pdata)
#define imx35_add_imx_i2c0(pdata) imx35_add_imx_i2c(0, pdata)
#define imx35_add_imx_i2c1(pdata) imx35_add_imx_i2c(1, pdata)
#define imx35_add_imx_i2c2(pdata) imx35_add_imx_i2c(2, pdata)
extern const struct imx_imx_keypad_data imx35_imx_keypad_data;
#define imx35_add_imx_keypad(pdata) \
imx_add_imx_keypad(&imx35_imx_keypad_data, pdata)
extern const struct imx_imx_ssi_data imx35_imx_ssi_data[];
#define imx35_add_imx_ssi(id, pdata) \
imx_add_imx_ssi(&imx35_imx_ssi_data[id], pdata)
extern const struct imx_imx_uart_1irq_data imx35_imx_uart_data[];
#define imx35_add_imx_uart(id, pdata) \
imx_add_imx_uart_1irq(&imx35_imx_uart_data[id], pdata)
#define imx35_add_imx_uart0(pdata) imx35_add_imx_uart(0, pdata)
#define imx35_add_imx_uart1(pdata) imx35_add_imx_uart(1, pdata)
#define imx35_add_imx_uart2(pdata) imx35_add_imx_uart(2, pdata)
extern const struct imx_ipu_core_data imx35_ipu_core_data;
#define imx35_add_ipu_core() \
imx_add_ipu_core(&imx35_ipu_core_data)
#define imx35_alloc_mx3_camera(pdata) \
imx_alloc_mx3_camera(&imx35_ipu_core_data, pdata)
#define imx35_add_mx3_sdc_fb(pdata) \
imx_add_mx3_sdc_fb(&imx35_ipu_core_data, pdata)
extern const struct imx_mxc_ehci_data imx35_mxc_ehci_otg_data;
#define imx35_add_mxc_ehci_otg(pdata) \
imx_add_mxc_ehci(&imx35_mxc_ehci_otg_data, pdata)
extern const struct imx_mxc_ehci_data imx35_mxc_ehci_hs_data;
#define imx35_add_mxc_ehci_hs(pdata) \
imx_add_mxc_ehci(&imx35_mxc_ehci_hs_data, pdata)
extern const struct imx_mxc_nand_data imx35_mxc_nand_data;
#define imx35_add_mxc_nand(pdata) \
imx_add_mxc_nand(&imx35_mxc_nand_data, pdata)
extern const struct imx_mxc_rtc_data imx35_mxc_rtc_data;
#define imx35_add_mxc_rtc() \
imx_add_mxc_rtc(&imx35_mxc_rtc_data)
extern const struct imx_mxc_w1_data imx35_mxc_w1_data;
#define imx35_add_mxc_w1() \
imx_add_mxc_w1(&imx35_mxc_w1_data)
extern const struct imx_sdhci_esdhc_imx_data imx35_sdhci_esdhc_imx_data[];
#define imx35_add_sdhci_esdhc_imx(id, pdata) \
imx_add_sdhci_esdhc_imx(&imx35_sdhci_esdhc_imx_data[id], pdata)
extern const struct imx_spi_imx_data imx35_cspi_data[];
#define imx35_add_cspi(id, pdata) \
imx_add_spi_imx(&imx35_cspi_data[id], pdata)
#define imx35_add_spi_imx0(pdata) imx35_add_cspi(0, pdata)
#define imx35_add_spi_imx1(pdata) imx35_add_cspi(1, pdata)
extern const struct imx_pata_imx_data imx35_pata_imx_data;
#define imx35_add_pata_imx() \
imx_add_pata_imx(&imx35_pata_imx_data)
# SPDX-License-Identifier: GPL-2.0-only
config IMX_HAVE_PLATFORM_FEC
bool
default y if SOC_IMX25 || SOC_IMX27 || SOC_IMX35
config IMX_HAVE_PLATFORM_FLEXCAN
bool
config IMX_HAVE_PLATFORM_FSL_USB2_UDC
bool
config IMX_HAVE_PLATFORM_GPIO_KEYS
bool
config IMX_HAVE_PLATFORM_IMX21_HCD
bool
config IMX_HAVE_PLATFORM_IMX27_CODA
bool
default y if SOC_IMX27
config IMX_HAVE_PLATFORM_IMX2_WDT
bool
config IMX_HAVE_PLATFORM_IMX_FB
bool
config IMX_HAVE_PLATFORM_IMX_I2C
bool
config IMX_HAVE_PLATFORM_IMX_KEYPAD
bool
config IMX_HAVE_PLATFORM_PATA_IMX
bool
config IMX_HAVE_PLATFORM_IMX_SSI
bool
config IMX_HAVE_PLATFORM_IMX_UART
bool
config IMX_HAVE_PLATFORM_IPU_CORE
bool
config IMX_HAVE_PLATFORM_MX2_CAMERA
bool
config IMX_HAVE_PLATFORM_MX2_EMMA
bool
config IMX_HAVE_PLATFORM_MXC_EHCI
bool
config IMX_HAVE_PLATFORM_MXC_MMC
bool
config IMX_HAVE_PLATFORM_MXC_NAND
bool
config IMX_HAVE_PLATFORM_MXC_RTC
bool
config IMX_HAVE_PLATFORM_MXC_W1
bool
config IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
bool
config IMX_HAVE_PLATFORM_SPI_IMX
bool
# SPDX-License-Identifier: GPL-2.0
obj-y := devices.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o
obj-y += platform-gpio-mxc.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX21_HCD) += platform-imx21-hcd.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX27_CODA) += platform-imx27-coda.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o
obj-y += platform-imx-dma.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_FB) += platform-imx-fb.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_KEYPAD) += platform-imx-keypad.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_PATA_IMX) += platform-pata_imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IPU_CORE) += platform-ipu-core.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_CAMERA) += platform-mx2-camera.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI) += platform-mxc-ehci.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_MMC) += platform-mxc-mmc.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_RTC) += platform-mxc_rtc.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_EMMA) += platform-mx2-emma.o
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2009-2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/gpio/machine.h>
#include <linux/platform_data/dma-imx-sdma.h>
extern struct device mxc_aips_bus;
extern struct device mxc_ahb_bus;
static inline struct platform_device *imx_add_platform_device_dmamask(
const char *name, int id,
const struct resource *res, unsigned int num_resources,
const void *data, size_t size_data, u64 dmamask)
{
struct platform_device_info pdevinfo = {
.name = name,
.id = id,
.res = res,
.num_res = num_resources,
.data = data,
.size_data = size_data,
.dma_mask = dmamask,
};
return platform_device_register_full(&pdevinfo);
}
static inline struct platform_device *imx_add_platform_device(
const char *name, int id,
const struct resource *res, unsigned int num_resources,
const void *data, size_t size_data)
{
return imx_add_platform_device_dmamask(
name, id, res, num_resources, data, size_data, 0);
}
#include <linux/fec.h>
struct imx_fec_data {
const char *devid;
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_fec(
const struct imx_fec_data *data,
const struct fec_platform_data *pdata);
struct imx_flexcan_data {
int id;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_flexcan(
const struct imx_flexcan_data *data);
#include <linux/fsl_devices.h>
struct imx_fsl_usb2_udc_data {
const char *devid;
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_fsl_usb2_udc(
const struct imx_fsl_usb2_udc_data *data,
const struct fsl_usb2_platform_data *pdata);
#include <linux/gpio_keys.h>
struct platform_device *__init imx_add_gpio_keys(
const struct gpio_keys_platform_data *pdata);
#include <linux/platform_data/usb-mx2.h>
struct imx_imx21_hcd_data {
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_imx21_hcd(
const struct imx_imx21_hcd_data *data,
const struct mx21_usbh_platform_data *pdata);
struct imx_imx27_coda_data {
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_imx27_coda(
const struct imx_imx27_coda_data *data);
struct imx_imx2_wdt_data {
int id;
resource_size_t iobase;
resource_size_t iosize;
};
struct platform_device *__init imx_add_imx2_wdt(
const struct imx_imx2_wdt_data *data);
struct imx_imxdi_rtc_data {
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_imxdi_rtc(
const struct imx_imxdi_rtc_data *data);
#include <linux/platform_data/video-imxfb.h>
struct imx_imx_fb_data {
const char *devid;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_imx_fb(
const struct imx_imx_fb_data *data,
const struct imx_fb_platform_data *pdata);
#include <linux/platform_data/i2c-imx.h>
struct imx_imx_i2c_data {
const char *devid;
int id;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_imx_i2c(
const struct imx_imx_i2c_data *data,
const struct imxi2c_platform_data *pdata);
#include <linux/input/matrix_keypad.h>
struct imx_imx_keypad_data {
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_imx_keypad(
const struct imx_imx_keypad_data *data,
const struct matrix_keymap_data *pdata);
#include <linux/platform_data/asoc-imx-ssi.h>
struct imx_imx_ssi_data {
int id;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
resource_size_t dmatx0;
resource_size_t dmarx0;
resource_size_t dmatx1;
resource_size_t dmarx1;
};
struct platform_device *__init imx_add_imx_ssi(
const struct imx_imx_ssi_data *data,
const struct imx_ssi_platform_data *pdata);
#include <linux/platform_data/serial-imx.h>
struct imx_imx_uart_1irq_data {
int id;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_imx_uart_1irq(
const struct imx_imx_uart_1irq_data *data,
const struct imxuart_platform_data *pdata);
#include <linux/platform_data/video-mx3fb.h>
#include <linux/platform_data/media/camera-mx3.h>
struct imx_ipu_core_data {
resource_size_t iobase;
resource_size_t synirq;
resource_size_t errirq;
};
struct platform_device *__init imx_add_ipu_core(
const struct imx_ipu_core_data *data);
struct platform_device *__init imx_alloc_mx3_camera(
const struct imx_ipu_core_data *data,
const struct mx3_camera_pdata *pdata);
struct platform_device *__init imx_add_mx3_sdc_fb(
const struct imx_ipu_core_data *data,
struct mx3fb_platform_data *pdata);
#include <linux/platform_data/media/camera-mx2.h>
struct imx_mx2_camera_data {
const char *devid;
resource_size_t iobasecsi;
resource_size_t iosizecsi;
resource_size_t irqcsi;
resource_size_t iobaseemmaprp;
resource_size_t iosizeemmaprp;
resource_size_t irqemmaprp;
};
struct platform_device *__init imx_add_mx2_camera(
const struct imx_mx2_camera_data *data,
const struct mx2_camera_platform_data *pdata);
struct imx_mx2_emma_data {
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_mx2_emmaprp(
const struct imx_mx2_emma_data *data);
#include <linux/platform_data/usb-ehci-mxc.h>
struct imx_mxc_ehci_data {
int id;
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_mxc_ehci(
const struct imx_mxc_ehci_data *data,
const struct mxc_usbh_platform_data *pdata);
#include <linux/platform_data/mmc-mxcmmc.h>
struct imx_mxc_mmc_data {
const char *devid;
int id;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
resource_size_t dmareq;
};
struct platform_device *__init imx_add_mxc_mmc(
const struct imx_mxc_mmc_data *data,
const struct imxmmc_platform_data *pdata);
#include <linux/platform_data/mtd-mxc_nand.h>
struct imx_mxc_nand_data {
const char *devid;
/*
* id is traditionally 0, but -1 is more appropriate. We use -1 for new
* machines but don't change existing devices as the nand device usually
* appears in the kernel command line to pass its partitioning.
*/
int id;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t axibase;
resource_size_t irq;
};
struct platform_device *__init imx_add_mxc_nand(
const struct imx_mxc_nand_data *data,
const struct mxc_nand_platform_data *pdata);
struct imx_pata_imx_data {
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_pata_imx(
const struct imx_pata_imx_data *data);
/* mxc_rtc */
struct imx_mxc_rtc_data {
const char *devid;
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_mxc_rtc(
const struct imx_mxc_rtc_data *data);
/* mxc_w1 */
struct imx_mxc_w1_data {
resource_size_t iobase;
};
struct platform_device *__init imx_add_mxc_w1(
const struct imx_mxc_w1_data *data);
#include <linux/platform_data/mmc-esdhc-imx.h>
struct imx_sdhci_esdhc_imx_data {
const char *devid;
int id;
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_sdhci_esdhc_imx(
const struct imx_sdhci_esdhc_imx_data *data,
const struct esdhc_platform_data *pdata);
struct imx_spi_imx_data {
const char *devid;
int id;
resource_size_t iobase;
resource_size_t iosize;
int irq;
};
struct platform_device *__init imx_add_spi_imx(
const struct imx_spi_imx_data *data, struct gpiod_lookup_table *gtable);
struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase,
int irq);
struct platform_device *imx_add_imx_sdma(char *name,
resource_size_t iobase, int irq, struct sdma_platform_data *pdata);
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2008 Sascha Hauer, kernel@pengutronix.de
*/
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include "../common.h"
#include "devices-common.h"
struct device mxc_aips_bus = {
.init_name = "mxc_aips",
};
struct device mxc_ahb_bus = {
.init_name = "mxc_ahb",
};
int __init mxc_device_init(void)
{
int ret;
ret = device_register(&mxc_aips_bus);
if (ret < 0)
goto done;
ret = device_register(&mxc_ahb_bus);
done:
return ret;
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/dma-mapping.h>
#include <linux/sizes.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_fec_data_entry_single(soc, _devid) \
{ \
.devid = _devid, \
.iobase = soc ## _FEC_BASE_ADDR, \
.irq = soc ## _INT_FEC, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_fec_data imx27_fec_data __initconst =
imx_fec_data_entry_single(MX27, "imx27-fec");
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX35
/* i.mx35 has the i.mx27 type fec */
const struct imx_fec_data imx35_fec_data __initconst =
imx_fec_data_entry_single(MX35, "imx27-fec");
#endif
struct platform_device *__init imx_add_fec(
const struct imx_fec_data *data,
const struct fec_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask(data->devid, 0,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix, Marc Kleine-Budde <kernel@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \
{ \
.id = _id, \
.iobase = soc ## _CAN ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_CAN ## _hwid, \
}
#define imx_flexcan_data_entry(soc, _id, _hwid, _size) \
[_id] = imx_flexcan_data_entry_single(soc, _id, _hwid, _size)
#ifdef CONFIG_SOC_IMX35
const struct imx_flexcan_data imx35_flexcan_data[] __initconst = {
#define imx35_flexcan_data_entry(_id, _hwid) \
imx_flexcan_data_entry(MX35, _id, _hwid, SZ_16K)
imx35_flexcan_data_entry(0, 1),
imx35_flexcan_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_flexcan(
const struct imx_flexcan_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device("flexcan", data->id,
res, ARRAY_SIZE(res), NULL, 0);
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/dma-mapping.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_fsl_usb2_udc_data_entry_single(soc, _devid) \
{ \
.devid = _devid, \
.iobase = soc ## _USB_OTG_BASE_ADDR, \
.irq = soc ## _INT_USB_OTG, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst =
imx_fsl_usb2_udc_data_entry_single(MX27, "imx-udc-mx27");
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data __initconst =
imx_fsl_usb2_udc_data_entry_single(MX31, "imx-udc-mx27");
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data __initconst =
imx_fsl_usb2_udc_data_entry_single(MX35, "imx-udc-mx27");
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_fsl_usb2_udc(
const struct imx_fsl_usb2_udc_data *data,
const struct fsl_usb2_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_512 - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask(data->devid, -1,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright 2011 Linaro Limited
*/
#include "devices-common.h"
#include "../common.h"
struct platform_device *__init mxc_register_gpio(char *name, int id,
resource_size_t iobase, resource_size_t iosize, int irq, int irq_high)
{
struct resource res[] = {
{
.start = iobase,
.end = iobase + iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = irq,
.end = irq,
.flags = IORESOURCE_IRQ,
}, {
.start = irq_high,
.end = irq_high,
.flags = IORESOURCE_IRQ,
},
};
unsigned int nres;
nres = irq_high ? ARRAY_SIZE(res) : ARRAY_SIZE(res) - 1;
return platform_device_register_resndata(&mxc_aips_bus, name, id, res, nres, NULL, 0);
}
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
*/
#include <linux/sizes.h>
#include "../hardware.h"
#include "devices-common.h"
struct platform_device *__init imx_add_gpio_keys(
const struct gpio_keys_platform_data *pdata)
{
return imx_add_platform_device("gpio-keys", -1, NULL,
0, pdata, sizeof(*pdata));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "devices-common.h"
struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name,
resource_size_t iobase, int irq)
{
struct resource res[] = {
{
.start = iobase,
.end = iobase + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = irq,
.end = irq,
.flags = IORESOURCE_IRQ,
},
};
return platform_device_register_resndata(&mxc_ahb_bus,
name, -1, res, ARRAY_SIZE(res), NULL, 0);
}
struct platform_device __init __maybe_unused *imx_add_imx_sdma(char *name,
resource_size_t iobase, int irq, struct sdma_platform_data *pdata)
{
struct resource res[] = {
{
.start = iobase,
.end = iobase + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = irq,
.end = irq,
.flags = IORESOURCE_IRQ,
},
};
return platform_device_register_resndata(&mxc_ahb_bus, name,
-1, res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/dma-mapping.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_fb_data_entry_single(soc, _devid, _size) \
{ \
.devid = _devid, \
.iobase = soc ## _LCDC_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_LCDC, \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_fb_data imx21_imx_fb_data __initconst =
imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_fb_data imx27_imx_fb_data __initconst =
imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
struct platform_device *__init imx_add_imx_fb(
const struct imx_imx_fb_data *data,
const struct imx_fb_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask(data->devid, 0,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2009-2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \
{ \
.devid = _devid, \
.id = _id, \
.iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_I2C ## _hwid, \
}
#define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \
[_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size)
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst =
imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
#define imx27_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K)
imx27_imx_i2c_data_entry(0, 1),
imx27_imx_i2c_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
#define imx31_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K)
imx31_imx_i2c_data_entry(0, 1),
imx31_imx_i2c_data_entry(1, 2),
imx31_imx_i2c_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
#define imx35_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K)
imx35_imx_i2c_data_entry(0, 1),
imx35_imx_i2c_data_entry(1, 2),
imx35_imx_i2c_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_imx_i2c(
const struct imx_imx_i2c_data *data,
const struct imxi2c_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device(data->devid, data->id,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_keypad_data_entry_single(soc, _size) \
{ \
.iobase = soc ## _KPP_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_KPP, \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_keypad_data imx21_imx_keypad_data __initconst =
imx_imx_keypad_data_entry_single(MX21, SZ_16);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_keypad_data imx27_imx_keypad_data __initconst =
imx_imx_keypad_data_entry_single(MX27, SZ_16);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_imx_keypad_data imx31_imx_keypad_data __initconst =
imx_imx_keypad_data_entry_single(MX31, SZ_16);
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_imx_keypad_data imx35_imx_keypad_data __initconst =
imx_imx_keypad_data_entry_single(MX35, SZ_16);
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_imx_keypad(
const struct imx_imx_keypad_data *data,
const struct matrix_keymap_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device("imx-keypad", -1,
res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \
[_id] = { \
.id = _id, \
.iobase = soc ## _SSI ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_SSI ## _hwid, \
.dmatx0 = soc ## _DMA_REQ_SSI ## _hwid ## _TX0, \
.dmarx0 = soc ## _DMA_REQ_SSI ## _hwid ## _RX0, \
.dmatx1 = soc ## _DMA_REQ_SSI ## _hwid ## _TX1, \
.dmarx1 = soc ## _DMA_REQ_SSI ## _hwid ## _RX1, \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst = {
#define imx21_imx_ssi_data_entry(_id, _hwid) \
imx_imx_ssi_data_entry(MX21, _id, _hwid, SZ_4K)
imx21_imx_ssi_data_entry(0, 1),
imx21_imx_ssi_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst = {
#define imx27_imx_ssi_data_entry(_id, _hwid) \
imx_imx_ssi_data_entry(MX27, _id, _hwid, SZ_4K)
imx27_imx_ssi_data_entry(0, 1),
imx27_imx_ssi_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_imx_ssi_data imx31_imx_ssi_data[] __initconst = {
#define imx31_imx_ssi_data_entry(_id, _hwid) \
imx_imx_ssi_data_entry(MX31, _id, _hwid, SZ_4K)
imx31_imx_ssi_data_entry(0, 1),
imx31_imx_ssi_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst = {
#define imx35_imx_ssi_data_entry(_id, _hwid) \
imx_imx_ssi_data_entry(MX35, _id, _hwid, SZ_4K)
imx35_imx_ssi_data_entry(0, 1),
imx35_imx_ssi_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_imx_ssi(
const struct imx_imx_ssi_data *data,
const struct imx_ssi_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
#define DMARES(_name) { \
.name = #_name, \
.start = data->dma ## _name, \
.end = data->dma ## _name, \
.flags = IORESOURCE_DMA, \
}
DMARES(tx0),
DMARES(rx0),
DMARES(tx1),
DMARES(rx1),
};
return imx_add_platform_device("imx-ssi", data->id,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2009-2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \
[_id] = { \
.id = _id, \
.iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irqrx = soc ## _INT_UART ## _hwid ## RX, \
.irqtx = soc ## _INT_UART ## _hwid ## TX, \
.irqrts = soc ## _INT_UART ## _hwid ## RTS, \
}
#define imx_imx_uart_1irq_data_entry(soc, _id, _hwid, _size) \
[_id] = { \
.id = _id, \
.iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_UART ## _hwid, \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst = {
#define imx21_imx_uart_data_entry(_id, _hwid) \
imx_imx_uart_1irq_data_entry(MX21, _id, _hwid, SZ_4K)
imx21_imx_uart_data_entry(0, 1),
imx21_imx_uart_data_entry(1, 2),
imx21_imx_uart_data_entry(2, 3),
imx21_imx_uart_data_entry(3, 4),
};
#endif
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst = {
#define imx27_imx_uart_data_entry(_id, _hwid) \
imx_imx_uart_1irq_data_entry(MX27, _id, _hwid, SZ_4K)
imx27_imx_uart_data_entry(0, 1),
imx27_imx_uart_data_entry(1, 2),
imx27_imx_uart_data_entry(2, 3),
imx27_imx_uart_data_entry(3, 4),
imx27_imx_uart_data_entry(4, 5),
imx27_imx_uart_data_entry(5, 6),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst = {
#define imx31_imx_uart_data_entry(_id, _hwid) \
imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_4K)
imx31_imx_uart_data_entry(0, 1),
imx31_imx_uart_data_entry(1, 2),
imx31_imx_uart_data_entry(2, 3),
imx31_imx_uart_data_entry(3, 4),
imx31_imx_uart_data_entry(4, 5),
};
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = {
#define imx35_imx_uart_data_entry(_id, _hwid) \
imx_imx_uart_1irq_data_entry(MX35, _id, _hwid, SZ_16K)
imx35_imx_uart_data_entry(0, 1),
imx35_imx_uart_data_entry(1, 2),
imx35_imx_uart_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_imx_uart_1irq(
const struct imx_imx_uart_1irq_data *data,
const struct imxuart_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
/* i.mx21 type uart runs on all i.mx except i.mx1 */
return imx_add_platform_device("imx21-uart", data->id,
res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/sizes.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \
{ \
.id = _id, \
.iobase = soc ## _WDOG ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
}
#define imx_imx2_wdt_data_entry(soc, _id, _hwid, _size) \
[_id] = imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size)
#ifdef CONFIG_SOC_IMX21
const struct imx_imx2_wdt_data imx21_imx2_wdt_data __initconst =
imx_imx2_wdt_data_entry_single(MX21, 0, , SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_imx2_wdt_data imx27_imx2_wdt_data __initconst =
imx_imx2_wdt_data_entry_single(MX27, 0, , SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_imx2_wdt_data imx31_imx2_wdt_data __initconst =
imx_imx2_wdt_data_entry_single(MX31, 0, , SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_imx2_wdt_data imx35_imx2_wdt_data __initconst =
imx_imx2_wdt_data_entry_single(MX35, 0, , SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_imx2_wdt(
const struct imx_imx2_wdt_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
},
};
return imx_add_platform_device("imx2-wdt", data->id,
res, ARRAY_SIZE(res), NULL, 0);
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx21_hcd_data_entry_single(soc) \
{ \
.iobase = soc ## _USBOTG_BASE_ADDR, \
.irq = soc ## _INT_USBHOST, \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_imx21_hcd_data imx21_imx21_hcd_data __initconst =
imx_imx21_hcd_data_entry_single(MX21);
#endif /* ifdef CONFIG_SOC_IMX21 */
struct platform_device *__init imx_add_imx21_hcd(
const struct imx_imx21_hcd_data *data,
const struct mx21_usbh_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_8K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask("imx21-hcd", 0,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Vista Silicon
* Javier Martin <javier.martin@vista-silicon.com>
*/
#include "../hardware.h"
#include "devices-common.h"
#ifdef CONFIG_SOC_IMX27
const struct imx_imx27_coda_data imx27_coda_data __initconst = {
.iobase = MX27_VPU_BASE_ADDR,
.iosize = SZ_512,
.irq = MX27_INT_VPU,
};
#endif
struct platform_device *__init imx_add_imx27_coda(
const struct imx_imx27_coda_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask("coda-imx27", 0, res, 2, NULL,
0, DMA_BIT_MASK(32));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2011 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/dma-mapping.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_ipu_core_entry_single(soc) \
{ \
.iobase = soc ## _IPU_CTRL_BASE_ADDR, \
.synirq = soc ## _INT_IPU_SYN, \
.errirq = soc ## _INT_IPU_ERR, \
}
#ifdef CONFIG_SOC_IMX31
const struct imx_ipu_core_data imx31_ipu_core_data __initconst =
imx_ipu_core_entry_single(MX31);
#endif
#ifdef CONFIG_SOC_IMX35
const struct imx_ipu_core_data imx35_ipu_core_data __initconst =
imx_ipu_core_entry_single(MX35);
#endif
static struct platform_device *imx_ipu_coredev __initdata;
struct platform_device *__init imx_add_ipu_core(
const struct imx_ipu_core_data *data)
{
/* The resource order is important! */
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + 0x5f,
.flags = IORESOURCE_MEM,
}, {
.start = data->iobase + 0x88,
.end = data->iobase + 0xb3,
.flags = IORESOURCE_MEM,
}, {
.start = data->synirq,
.end = data->synirq,
.flags = IORESOURCE_IRQ,
}, {
.start = data->errirq,
.end = data->errirq,
.flags = IORESOURCE_IRQ,
},
};
return imx_ipu_coredev = imx_add_platform_device("ipu-core", -1,
res, ARRAY_SIZE(res), NULL, 0);
}
struct platform_device *__init imx_alloc_mx3_camera(
const struct imx_ipu_core_data *data,
const struct mx3_camera_pdata *pdata)
{
struct resource res[] = {
{
.start = data->iobase + 0x60,
.end = data->iobase + 0x87,
.flags = IORESOURCE_MEM,
},
};
int ret = -ENOMEM;
struct platform_device *pdev;
if (IS_ERR_OR_NULL(imx_ipu_coredev))
return ERR_PTR(-ENODEV);
pdev = platform_device_alloc("mx3-camera", 0);
if (!pdev)
return ERR_PTR(-ENOMEM);
pdev->dev.dma_mask = kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL);
if (!pdev->dev.dma_mask)
goto err;
*pdev->dev.dma_mask = DMA_BIT_MASK(32);
pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
if (ret)
goto err;
if (pdata) {
struct mx3_camera_pdata *copied_pdata;
ret = platform_device_add_data(pdev, pdata, sizeof(*pdata));
if (ret) {
err:
kfree(pdev->dev.dma_mask);
platform_device_put(pdev);
return ERR_PTR(-ENODEV);
}
copied_pdata = dev_get_platdata(&pdev->dev);
copied_pdata->dma_dev = &imx_ipu_coredev->dev;
}
return pdev;
}
struct platform_device *__init imx_add_mx3_sdc_fb(
const struct imx_ipu_core_data *data,
struct mx3fb_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase + 0xb4,
.end = data->iobase + 0x1bf,
.flags = IORESOURCE_MEM,
},
};
if (IS_ERR_OR_NULL(imx_ipu_coredev))
return ERR_PTR(-ENODEV);
pdata->dma_dev = &imx_ipu_coredev->dev;
return imx_add_platform_device_dmamask("mx3_sdc_fb", -1,
res, ARRAY_SIZE(res), pdata, sizeof(*pdata),
DMA_BIT_MASK(32));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_mx2_camera_data_entry_single(soc, _devid) \
{ \
.devid = _devid, \
.iobasecsi = soc ## _CSI_BASE_ADDR, \
.iosizecsi = SZ_4K, \
.irqcsi = soc ## _INT_CSI, \
}
#define imx_mx2_camera_data_entry_single_emma(soc, _devid) \
{ \
.devid = _devid, \
.iobasecsi = soc ## _CSI_BASE_ADDR, \
.iosizecsi = SZ_32, \
.irqcsi = soc ## _INT_CSI, \
.iobaseemmaprp = soc ## _EMMAPRP_BASE_ADDR, \
.iosizeemmaprp = SZ_32, \
.irqemmaprp = soc ## _INT_EMMAPRP, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst =
imx_mx2_camera_data_entry_single_emma(MX27, "imx27-camera");
#endif /* ifdef CONFIG_SOC_IMX27 */
struct platform_device *__init imx_add_mx2_camera(
const struct imx_mx2_camera_data *data,
const struct mx2_camera_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobasecsi,
.end = data->iobasecsi + data->iosizecsi - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irqcsi,
.end = data->irqcsi,
.flags = IORESOURCE_IRQ,
}, {
.start = data->iobaseemmaprp,
.end = data->iobaseemmaprp + data->iosizeemmaprp - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irqemmaprp,
.end = data->irqemmaprp,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask(data->devid, 0,
res, data->iobaseemmaprp ? 4 : 2,
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_mx2_emmaprp_data_entry_single(soc) \
{ \
.iobase = soc ## _EMMAPRP_BASE_ADDR, \
.iosize = SZ_256, \
.irq = soc ## _INT_EMMAPRP, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_mx2_emma_data imx27_mx2_emmaprp_data __initconst =
imx_mx2_emmaprp_data_entry_single(MX27);
#endif /* ifdef CONFIG_SOC_IMX27 */
struct platform_device *__init imx_add_mx2_emmaprp(
const struct imx_mx2_emma_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask("m2m-emmaprp", 0,
res, 2, NULL, 0, DMA_BIT_MASK(32));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/dma-mapping.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_ehci_data_entry_single(soc, _id, hs) \
{ \
.id = _id, \
.iobase = soc ## _USB_ ## hs ## _BASE_ADDR, \
.irq = soc ## _INT_USB_ ## hs, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data __initconst =
imx_mxc_ehci_data_entry_single(MX27, 0, OTG);
const struct imx_mxc_ehci_data imx27_mxc_ehci_hs_data[] __initconst = {
imx_mxc_ehci_data_entry_single(MX27, 1, HS1),
imx_mxc_ehci_data_entry_single(MX27, 2, HS2),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_ehci_data imx31_mxc_ehci_otg_data __initconst =
imx_mxc_ehci_data_entry_single(MX31, 0, OTG);
const struct imx_mxc_ehci_data imx31_mxc_ehci_hs_data[] __initconst = {
imx_mxc_ehci_data_entry_single(MX31, 1, HS1),
imx_mxc_ehci_data_entry_single(MX31, 2, HS2),
};
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_mxc_ehci_data imx35_mxc_ehci_otg_data __initconst =
imx_mxc_ehci_data_entry_single(MX35, 0, OTG);
const struct imx_mxc_ehci_data imx35_mxc_ehci_hs_data __initconst =
imx_mxc_ehci_data_entry_single(MX35, 1, HS);
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_mxc_ehci(
const struct imx_mxc_ehci_data *data,
const struct mxc_usbh_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_512 - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask("mxc-ehci", data->id,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/dma-mapping.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) \
{ \
.devid = _devid, \
.id = _id, \
.iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_SDHC ## _hwid, \
.dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \
}
#define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size) \
[_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size)
#ifdef CONFIG_SOC_IMX21
const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = {
#define imx21_mxc_mmc_data_entry(_id, _hwid) \
imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K)
imx21_mxc_mmc_data_entry(0, 1),
imx21_mxc_mmc_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = {
#define imx27_mxc_mmc_data_entry(_id, _hwid) \
imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K)
imx27_mxc_mmc_data_entry(0, 1),
imx27_mxc_mmc_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = {
#define imx31_mxc_mmc_data_entry(_id, _hwid) \
imx_mxc_mmc_data_entry(MX31, "imx31-mmc", _id, _hwid, SZ_16K)
imx31_mxc_mmc_data_entry(0, 1),
imx31_mxc_mmc_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX31 */
struct platform_device *__init imx_add_mxc_mmc(
const struct imx_mxc_mmc_data *data,
const struct imxmmc_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
}, {
.start = data->dmareq,
.end = data->dmareq,
.flags = IORESOURCE_DMA,
},
};
return imx_add_platform_device_dmamask(data->devid, data->id,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2009-2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/sizes.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_nand_data_entry_single(soc, _devid, _size) \
{ \
.devid = _devid, \
.iobase = soc ## _NFC_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_NFC \
}
#define imx_mxc_nandv3_data_entry_single(soc, _devid, _size) \
{ \
.devid = _devid, \
.id = -1, \
.iobase = soc ## _NFC_BASE_ADDR, \
.iosize = _size, \
.axibase = soc ## _NFC_AXI_BASE_ADDR, \
.irq = soc ## _INT_NFC \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX31, "imx27-nand", SZ_4K);
#endif
#ifdef CONFIG_SOC_IMX35
const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX35, "imx25-nand", SZ_8K);
#endif
struct platform_device *__init imx_add_mxc_nand(
const struct imx_mxc_nand_data *data,
const struct mxc_nand_platform_data *pdata)
{
/* AXI has to come first, that's how the mxc_nand driver expect it */
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
}, {
.start = data->axibase,
.end = data->axibase + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
};
return imx_add_platform_device(data->devid, data->id,
res, ARRAY_SIZE(res) - !data->axibase,
pdata, sizeof(*pdata));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010-2011 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_rtc_data_entry_single(soc, _devid) \
{ \
.devid = _devid, \
.iobase = soc ## _RTC_BASE_ADDR, \
.irq = soc ## _INT_RTC, \
}
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_rtc_data imx31_mxc_rtc_data __initconst =
imx_mxc_rtc_data_entry_single(MX31, "imx21-rtc");
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_mxc_rtc_data imx35_mxc_rtc_data __initconst =
imx_mxc_rtc_data_entry_single(MX35, "imx21-rtc");
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_mxc_rtc(
const struct imx_mxc_rtc_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device(data->devid, -1,
res, ARRAY_SIZE(res), NULL, 0);
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_w1_data_entry_single(soc) \
{ \
.iobase = soc ## _OWIRE_BASE_ADDR, \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_mxc_w1_data imx21_mxc_w1_data __initconst =
imx_mxc_w1_data_entry_single(MX21);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_w1_data imx27_mxc_w1_data __initconst =
imx_mxc_w1_data_entry_single(MX27);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_w1_data imx31_mxc_w1_data __initconst =
imx_mxc_w1_data_entry_single(MX31);
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_mxc_w1_data imx35_mxc_w1_data __initconst =
imx_mxc_w1_data_entry_single(MX35);
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_mxc_w1(
const struct imx_mxc_w1_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
};
return imx_add_platform_device("mxc_w1", 0,
res, ARRAY_SIZE(res), NULL, 0);
}
// SPDX-License-Identifier: GPL-2.0-only
#include "../hardware.h"
#include "devices-common.h"
#define imx_pata_imx_data_entry_single(soc, _size) \
{ \
.iobase = soc ## _ATA_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_ATA, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_pata_imx_data imx27_pata_imx_data __initconst =
imx_pata_imx_data_entry_single(MX27, SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_pata_imx_data imx31_pata_imx_data __initconst =
imx_pata_imx_data_entry_single(MX31, SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_pata_imx_data imx35_pata_imx_data __initconst =
imx_pata_imx_data_entry_single(MX35, SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_pata_imx(
const struct imx_pata_imx_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
},
{
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device("pata_imx", -1,
res, ARRAY_SIZE(res), NULL, 0);
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix, Wolfram Sang <kernel@pengutronix.de>
*/
#include <linux/platform_data/mmc-esdhc-imx.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \
{ \
.devid = _devid, \
.id = _id, \
.iobase = soc ## _ESDHC ## hwid ## _BASE_ADDR, \
.irq = soc ## _INT_ESDHC ## hwid, \
}
#define imx_sdhci_esdhc_imx_data_entry(soc, devid, id, hwid) \
[id] = imx_sdhci_esdhc_imx_data_entry_single(soc, devid, id, hwid)
#ifdef CONFIG_SOC_IMX35
const struct imx_sdhci_esdhc_imx_data
imx35_sdhci_esdhc_imx_data[] __initconst = {
#define imx35_sdhci_esdhc_imx_data_entry(_id, _hwid) \
imx_sdhci_esdhc_imx_data_entry(MX35, "sdhci-esdhc-imx35", _id, _hwid)
imx35_sdhci_esdhc_imx_data_entry(0, 1),
imx35_sdhci_esdhc_imx_data_entry(1, 2),
imx35_sdhci_esdhc_imx_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX35 */
static const struct esdhc_platform_data default_esdhc_pdata __initconst = {
.wp_type = ESDHC_WP_NONE,
.cd_type = ESDHC_CD_NONE,
};
struct platform_device *__init imx_add_sdhci_esdhc_imx(
const struct imx_sdhci_esdhc_imx_data *data,
const struct esdhc_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
/*
* If machine does not provide pdata, use the default one
* which means no WP/CD support
*/
if (!pdata)
pdata = &default_esdhc_pdata;
return imx_add_platform_device_dmamask(data->devid, data->id, res,
ARRAY_SIZE(res), pdata, sizeof(*pdata),
DMA_BIT_MASK(32));
}
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2009-2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/gpio/machine.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \
{ \
.devid = _devid, \
.id = _id, \
.iobase = soc ## _ ## type ## hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_ ## type ## hwid, \
}
#define imx_spi_imx_data_entry(soc, type, devid, id, hwid, size) \
[id] = imx_spi_imx_data_entry_single(soc, type, devid, id, hwid, size)
#ifdef CONFIG_SOC_IMX21
const struct imx_spi_imx_data imx21_cspi_data[] __initconst = {
#define imx21_cspi_data_entry(_id, _hwid) \
imx_spi_imx_data_entry(MX21, CSPI, "imx21-cspi", _id, _hwid, SZ_4K)
imx21_cspi_data_entry(0, 1),
imx21_cspi_data_entry(1, 2),
};
#endif
#ifdef CONFIG_SOC_IMX27
const struct imx_spi_imx_data imx27_cspi_data[] __initconst = {
#define imx27_cspi_data_entry(_id, _hwid) \
imx_spi_imx_data_entry(MX27, CSPI, "imx27-cspi", _id, _hwid, SZ_4K)
imx27_cspi_data_entry(0, 1),
imx27_cspi_data_entry(1, 2),
imx27_cspi_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_spi_imx_data imx31_cspi_data[] __initconst = {
#define imx31_cspi_data_entry(_id, _hwid) \
imx_spi_imx_data_entry(MX31, CSPI, "imx31-cspi", _id, _hwid, SZ_4K)
imx31_cspi_data_entry(0, 1),
imx31_cspi_data_entry(1, 2),
imx31_cspi_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_spi_imx_data imx35_cspi_data[] __initconst = {
#define imx35_cspi_data_entry(_id, _hwid) \
imx_spi_imx_data_entry(MX35, CSPI, "imx35-cspi", _id, _hwid, SZ_4K)
imx35_cspi_data_entry(0, 1),
imx35_cspi_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_spi_imx(
const struct imx_spi_imx_data *data, struct gpiod_lookup_table *gtable)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
if (gtable)
gpiod_add_lookup_table(gtable);
return imx_add_platform_device(data->devid, data->id,
res, ARRAY_SIZE(res), NULL, 0);
}
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
* Copyright (C) 2010 Freescale Semiconductor, Inc.
*/
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include "ehci.h"
#include "hardware.h"
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX27_OTG_SIC_SHIFT 29
#define MX27_OTG_SIC_MASK (0x3 << MX27_OTG_SIC_SHIFT)
#define MX27_OTG_PM_BIT (1 << 24)
#define MX27_H2_SIC_SHIFT 21
#define MX27_H2_SIC_MASK (0x3 << MX27_H2_SIC_SHIFT)
#define MX27_H2_PM_BIT (1 << 16)
#define MX27_H2_DT_BIT (1 << 5)
#define MX27_H1_SIC_SHIFT 13
#define MX27_H1_SIC_MASK (0x3 << MX27_H1_SIC_SHIFT)
#define MX27_H1_PM_BIT (1 << 8)
#define MX27_H1_DT_BIT (1 << 4)
int mx27_initialize_usb_hw(int port, unsigned int flags)
{
unsigned int v;
v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
switch (port) {
case 0: /* OTG port */
v &= ~(MX27_OTG_SIC_MASK | MX27_OTG_PM_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_OTG_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX27_OTG_PM_BIT;
break;
case 1: /* H1 port */
v &= ~(MX27_H1_SIC_MASK | MX27_H1_PM_BIT | MX27_H1_DT_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H1_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX27_H1_PM_BIT;
if (!(flags & MXC_EHCI_TTL_ENABLED))
v |= MX27_H1_DT_BIT;
break;
case 2: /* H2 port */
v &= ~(MX27_H2_SIC_MASK | MX27_H2_PM_BIT | MX27_H2_DT_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H2_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX27_H2_PM_BIT;
if (!(flags & MXC_EHCI_TTL_ENABLED))
v |= MX27_H2_DT_BIT;
break;
default:
return -EINVAL;
}
writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
return 0;
}
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
* Copyright (C) 2010 Freescale Semiconductor, Inc.
*/
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include "ehci.h"
#include "hardware.h"
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX31_OTG_SIC_SHIFT 29
#define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
#define MX31_OTG_PM_BIT (1 << 24)
#define MX31_H2_SIC_SHIFT 21
#define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT)
#define MX31_H2_PM_BIT (1 << 16)
#define MX31_H2_DT_BIT (1 << 5)
#define MX31_H1_SIC_SHIFT 13
#define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
#define MX31_H1_PM_BIT (1 << 8)
#define MX31_H1_DT_BIT (1 << 4)
int mx31_initialize_usb_hw(int port, unsigned int flags)
{
unsigned int v;
v = readl(MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
switch (port) {
case 0: /* OTG port */
v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_OTG_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX31_OTG_PM_BIT;
break;
case 1: /* H1 port */
v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H1_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX31_H1_PM_BIT;
if (!(flags & MXC_EHCI_TTL_ENABLED))
v |= MX31_H1_DT_BIT;
break;
case 2: /* H2 port */
v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H2_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX31_H2_PM_BIT;
if (!(flags & MXC_EHCI_TTL_ENABLED))
v |= MX31_H2_DT_BIT;
break;
default:
return -EINVAL;
}
writel(v, MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
return 0;
}
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
* Copyright (C) 2010 Freescale Semiconductor, Inc.
*/
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include "ehci.h"
#include "hardware.h"
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX35_OTG_SIC_SHIFT 29
#define MX35_OTG_SIC_MASK (0x3 << MX35_OTG_SIC_SHIFT)
#define MX35_OTG_PM_BIT (1 << 24)
#define MX35_OTG_PP_BIT (1 << 11)
#define MX35_OTG_OCPOL_BIT (1 << 3)
#define MX35_H1_SIC_SHIFT 21
#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
#define MX35_H1_PP_BIT (1 << 18)
#define MX35_H1_PM_BIT (1 << 16)
#define MX35_H1_IPPUE_UP_BIT (1 << 7)
#define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
#define MX35_H1_TLL_BIT (1 << 5)
#define MX35_H1_USBTE_BIT (1 << 4)
#define MX35_H1_OCPOL_BIT (1 << 2)
int mx35_initialize_usb_hw(int port, unsigned int flags)
{
unsigned int v;
v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
switch (port) {
case 0: /* OTG port */
v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT | MX35_OTG_PP_BIT |
MX35_OTG_OCPOL_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_OTG_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX35_OTG_PM_BIT;
if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
v |= MX35_OTG_PP_BIT;
if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
v |= MX35_OTG_OCPOL_BIT;
break;
case 1: /* H1 port */
v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_PP_BIT |
MX35_H1_OCPOL_BIT | MX35_H1_TLL_BIT | MX35_H1_USBTE_BIT |
MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_H1_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX35_H1_PM_BIT;
if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
v |= MX35_H1_PP_BIT;
if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
v |= MX35_H1_OCPOL_BIT;
if (!(flags & MXC_EHCI_TTL_ENABLED))
v |= MX35_H1_TLL_BIT;
if (flags & MXC_EHCI_INTERNAL_PHY)
v |= MX35_H1_USBTE_BIT;
if (flags & MXC_EHCI_IPPUE_DOWN)
v |= MX35_H1_IPPUE_DOWN_BIT;
if (flags & MXC_EHCI_IPPUE_UP)
v |= MX35_H1_IPPUE_UP_BIT;
break;
default:
return -EINVAL;
}
writel(v, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
return 0;
}
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __MACH_IMX_EHCI_H
#define __MACH_IMX_EHCI_H
/* values for portsc field */
#define MXC_EHCI_PHY_LOW_POWER_SUSPEND (1 << 23)
#define MXC_EHCI_FORCE_FS (1 << 24)
#define MXC_EHCI_UTMI_8BIT (0 << 28)
#define MXC_EHCI_UTMI_16BIT (1 << 28)
#define MXC_EHCI_SERIAL (1 << 29)
#define MXC_EHCI_MODE_UTMI (0 << 30)
#define MXC_EHCI_MODE_PHILIPS (1 << 30)
#define MXC_EHCI_MODE_ULPI (2 << 30)
#define MXC_EHCI_MODE_SERIAL (3 << 30)
/* values for flags field */
#define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0)
#define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0)
#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
#define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0)
#define MXC_EHCI_INTERFACE_MASK (0xf)
#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5)
#define MXC_EHCI_PWR_PIN_ACTIVE_HIGH (1 << 6)
#define MXC_EHCI_OC_PIN_ACTIVE_LOW (1 << 7)
#define MXC_EHCI_TTL_ENABLED (1 << 8)
#define MXC_EHCI_INTERNAL_PHY (1 << 9)
#define MXC_EHCI_IPPUE_DOWN (1 << 10)
#define MXC_EHCI_IPPUE_UP (1 << 11)
#define MXC_EHCI_WAKEUP_ENABLED (1 << 12)
#define MXC_EHCI_ITC_NO_THRESHOLD (1 << 13)
#define MXC_USBCTRL_OFFSET 0
#define MXC_USB_PHY_CTR_FUNC_OFFSET 0x8
#define MXC_USB_PHY_CTR_FUNC2_OFFSET 0xc
#define MXC_USBH2CTRL_OFFSET 0x14
int mx25_initialize_usb_hw(int port, unsigned int flags);
int mx31_initialize_usb_hw(int port, unsigned int flags);
int mx35_initialize_usb_hw(int port, unsigned int flags);
int mx27_initialize_usb_hw(int port, unsigned int flags);
#endif /* __MACH_IMX_EHCI_H */
......@@ -97,7 +97,6 @@
#include "mx31.h"
#include "mx35.h"
#include "mx2x.h"
#include "mx21.h"
#include "mx27.h"
#define imx_map_entry(soc, name, _type) { \
......
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2012 Sascha Hauer, Pengutronix
*/
#include <linux/irq.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include "common.h"
#include "mx27.h"
static const char * const imx27_dt_board_compat[] __initconst = {
"fsl,imx27",
NULL
};
DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
.map_io = mx27_map_io,
.init_early = imx27_init_early,
.init_irq = mx27_init_irq,
.init_late = imx27_pm_init,
.dt_compat = imx27_dt_board_compat,
MACHINE_END
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
* Copyright (C) 2009 by Valentin Longchamp <valentin.longchamp@epfl.ch>
*/
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include "hardware.h"
#include "iomux-mx3.h"
/*
* IOMUX register (base) addresses
*/
#define IOMUX_BASE MX31_IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)
#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000)
#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004)
#define IOMUXGPR (IOMUX_BASE + 0x008)
#define IOMUXSW_MUX_CTL (IOMUX_BASE + 0x00C)
#define IOMUXSW_PAD_CTL (IOMUX_BASE + 0x154)
static DEFINE_SPINLOCK(gpio_mux_lock);
#define IOMUX_REG_MASK (IOMUX_PADNUM_MASK & ~0x3)
static DECLARE_BITMAP(mxc_pin_alloc_map, NB_PORTS * 32);
/*
* set the mode for a IOMUX pin.
*/
void mxc_iomux_mode(unsigned int pin_mode)
{
u32 field;
u32 l;
u32 mode;
void __iomem *reg;
reg = IOMUXSW_MUX_CTL + (pin_mode & IOMUX_REG_MASK);
field = pin_mode & 0x3;
mode = (pin_mode & IOMUX_MODE_MASK) >> IOMUX_MODE_SHIFT;
spin_lock(&gpio_mux_lock);
l = imx_readl(reg);
l &= ~(0xff << (field * 8));
l |= mode << (field * 8);
imx_writel(l, reg);
spin_unlock(&gpio_mux_lock);
}
/*
* This function configures the pad value for a IOMUX pin.
*/
void mxc_iomux_set_pad(enum iomux_pins pin, u32 config)
{
u32 field, l;
void __iomem *reg;
pin &= IOMUX_PADNUM_MASK;
reg = IOMUXSW_PAD_CTL + (pin + 2) / 3 * 4;
field = (pin + 2) % 3;
pr_debug("%s: reg offset = 0x%x, field = %d\n",
__func__, (pin + 2) / 3, field);
spin_lock(&gpio_mux_lock);
l = imx_readl(reg);
l &= ~(0x1ff << (field * 10));
l |= config << (field * 10);
imx_writel(l, reg);
spin_unlock(&gpio_mux_lock);
}
/*
* allocs a single pin:
* - reserves the pin so that it is not claimed by another driver
* - setups the iomux according to the configuration
*/
int mxc_iomux_alloc_pin(unsigned int pin, const char *label)
{
unsigned pad = pin & IOMUX_PADNUM_MASK;
if (pad >= (PIN_MAX + 1)) {
printk(KERN_ERR "mxc_iomux: Attempt to request nonexistent pin %u for \"%s\"\n",
pad, label ? label : "?");
return -EINVAL;
}
if (test_and_set_bit(pad, mxc_pin_alloc_map)) {
printk(KERN_ERR "mxc_iomux: pin %u already used. Allocation for \"%s\" failed\n",
pad, label ? label : "?");
return -EBUSY;
}
mxc_iomux_mode(pin);
return 0;
}
int mxc_iomux_setup_multiple_pins(const unsigned int *pin_list, unsigned count,
const char *label)
{
const unsigned int *p = pin_list;
int i;
int ret = -EINVAL;
for (i = 0; i < count; i++) {
ret = mxc_iomux_alloc_pin(*p, label);
if (ret)
goto setup_error;
p++;
}
return 0;
setup_error:
mxc_iomux_release_multiple_pins(pin_list, i);
return ret;
}
void mxc_iomux_release_pin(unsigned int pin)
{
unsigned pad = pin & IOMUX_PADNUM_MASK;
if (pad < (PIN_MAX + 1))
clear_bit(pad, mxc_pin_alloc_map);
}
void mxc_iomux_release_multiple_pins(const unsigned int *pin_list, int count)
{
const unsigned int *p = pin_list;
int i;
for (i = 0; i < count; i++) {
mxc_iomux_release_pin(*p);
p++;
}
}
/*
* This function enables/disables the general purpose function for a particular
* signal.
*/
void mxc_iomux_set_gpr(enum iomux_gp_func gp, bool en)
{
u32 l;
spin_lock(&gpio_mux_lock);
l = imx_readl(IOMUXGPR);
if (en)
l |= gp;
else
l &= ~gp;
imx_writel(l, IOMUXGPR);
spin_unlock(&gpio_mux_lock);
}
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
*/
#ifndef __MACH_IOMUX_MX21_H__
#define __MACH_IOMUX_MX21_H__
#include "iomux-mx2x.h"
#include "iomux-v1.h"
/* Primary GPIO pin functions */
#define PB22_PF_USBH1_BYP (GPIO_PORTB | GPIO_PF | 22)
#define PB25_PF_USBH1_ON (GPIO_PORTB | GPIO_PF | 25)
#define PC5_PF_USBOTG_SDA (GPIO_PORTC | GPIO_PF | 5)
#define PC6_PF_USBOTG_SCL (GPIO_PORTC | GPIO_PF | 6)
#define PC7_PF_USBOTG_ON (GPIO_PORTC | GPIO_PF | 7)
#define PC8_PF_USBOTG_FS (GPIO_PORTC | GPIO_PF | 8)
#define PC9_PF_USBOTG_OE (GPIO_PORTC | GPIO_PF | 9)
#define PC10_PF_USBOTG_TXDM (GPIO_PORTC | GPIO_PF | 10)
#define PC11_PF_USBOTG_TXDP (GPIO_PORTC | GPIO_PF | 11)
#define PC12_PF_USBOTG_RXDM (GPIO_PORTC | GPIO_PF | 12)
#define PC13_PF_USBOTG_RXDP (GPIO_PORTC | GPIO_PF | 13)
#define PC16_PF_SAP_FS (GPIO_PORTC | GPIO_PF | 16)
#define PC17_PF_SAP_RXD (GPIO_PORTC | GPIO_PF | 17)
#define PC18_PF_SAP_TXD (GPIO_PORTC | GPIO_PF | 18)
#define PC19_PF_SAP_CLK (GPIO_PORTC | GPIO_PF | 19)
#define PE0_PF_TEST_WB2 (GPIO_PORTE | GPIO_PF | 0)
#define PE1_PF_TEST_WB1 (GPIO_PORTE | GPIO_PF | 1)
#define PE2_PF_TEST_WB0 (GPIO_PORTE | GPIO_PF | 2)
#define PF1_PF_NFCE (GPIO_PORTF | GPIO_PF | 1)
#define PF3_PF_NFCLE (GPIO_PORTF | GPIO_PF | 3)
#define PF7_PF_NFIO0 (GPIO_PORTF | GPIO_PF | 7)
#define PF8_PF_NFIO1 (GPIO_PORTF | GPIO_PF | 8)
#define PF9_PF_NFIO2 (GPIO_PORTF | GPIO_PF | 9)
#define PF10_PF_NFIO3 (GPIO_PORTF | GPIO_PF | 10)
#define PF11_PF_NFIO4 (GPIO_PORTF | GPIO_PF | 11)
#define PF12_PF_NFIO5 (GPIO_PORTF | GPIO_PF | 12)
#define PF13_PF_NFIO6 (GPIO_PORTF | GPIO_PF | 13)
#define PF14_PF_NFIO7 (GPIO_PORTF | GPIO_PF | 14)
#define PF16_PF_RES (GPIO_PORTF | GPIO_PF | 16)
/* Alternate GPIO pin functions */
#define PA5_AF_BMI_CLK_CS (GPIO_PORTA | GPIO_AF | 5)
#define PA6_AF_BMI_D0 (GPIO_PORTA | GPIO_AF | 6)
#define PA7_AF_BMI_D1 (GPIO_PORTA | GPIO_AF | 7)
#define PA8_AF_BMI_D2 (GPIO_PORTA | GPIO_AF | 8)
#define PA9_AF_BMI_D3 (GPIO_PORTA | GPIO_AF | 9)
#define PA10_AF_BMI_D4 (GPIO_PORTA | GPIO_AF | 10)
#define PA11_AF_BMI_D5 (GPIO_PORTA | GPIO_AF | 11)
#define PA12_AF_BMI_D6 (GPIO_PORTA | GPIO_AF | 12)
#define PA13_AF_BMI_D7 (GPIO_PORTA | GPIO_AF | 13)
#define PA14_AF_BMI_D8 (GPIO_PORTA | GPIO_AF | 14)
#define PA15_AF_BMI_D9 (GPIO_PORTA | GPIO_AF | 15)
#define PA16_AF_BMI_D10 (GPIO_PORTA | GPIO_AF | 16)
#define PA17_AF_BMI_D11 (GPIO_PORTA | GPIO_AF | 17)
#define PA18_AF_BMI_D12 (GPIO_PORTA | GPIO_AF | 18)
#define PA19_AF_BMI_D13 (GPIO_PORTA | GPIO_AF | 19)
#define PA20_AF_BMI_D14 (GPIO_PORTA | GPIO_AF | 20)
#define PA21_AF_BMI_D15 (GPIO_PORTA | GPIO_AF | 21)
#define PA22_AF_BMI_READ_REQ (GPIO_PORTA | GPIO_AF | 22)
#define PA23_AF_BMI_WRITE (GPIO_PORTA | GPIO_AF | 23)
#define PA29_AF_BMI_RX_FULL (GPIO_PORTA | GPIO_AF | 29)
#define PA30_AF_BMI_READ (GPIO_PORTA | GPIO_AF | 30)
/* AIN GPIO pin functions */
#define PC14_AIN_SYS_CLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
#define PD21_AIN_USBH2_FS (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 21)
#define PD22_AIN_USBH2_OE (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 22)
#define PD23_AIN_USBH2_TXDM (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 23)
#define PD24_AIN_USBH2_TXDP (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 24)
#define PE8_AIN_IR_TXD (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 8)
#define PF0_AIN_PC_RST (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 0)
#define PF1_AIN_PC_CE1 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 1)
#define PF2_AIN_PC_CE2 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 2)
#define PF3_AIN_PC_POE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 3)
#define PF4_AIN_PC_OE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 4)
#define PF5_AIN_PC_RW (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 5)
/* BIN GPIO pin functions */
#define PC14_BIN_SYS_CLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
#define PD27_BIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_BIN | GPIO_OUT | 27)
/* CIN GPIO pin functions */
#define PB26_CIN_USBH1_RXDAT (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 26)
/* AOUT GPIO pin functions */
#define PA29_AOUT_BMI_WAIT (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 29)
#define PD19_AOUT_USBH2_RXDM (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 19)
#define PD20_AOUT_USBH2_RXDP (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 20)
#define PD25_AOUT_EXT_DMAREQ (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 25)
#define PD26_AOUT_USBOTG_RXDAT (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 26)
#define PE9_AOUT_IR_RXD (GPIO_PORTE | GPIO_AOUT | GPIO_IN | 9)
#define PF6_AOUT_PC_BVD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 6)
#define PF7_AOUT_PC_BVD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 7)
#define PF8_AOUT_PC_VS2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 8)
#define PF9_AOUT_PC_VS1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 9)
#define PF10_AOUT_PC_WP (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 10)
#define PF11_AOUT_PC_READY (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 11)
#define PF12_AOUT_PC_WAIT (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 12)
#define PF13_AOUT_PC_CD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 13)
#define PF14_AOUT_PC_CD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 14)
#endif /* ifndef __MACH_IOMUX_MX21_H__ */
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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* arch/arm/plat-mxc/iomux-v1.c
*
* Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
* Copyright (C) 2009 Uwe Kleine-Koenig, Pengutronix
*
* Common code for i.MX1, i.MX21 and i.MX27
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/gpio.h>
#include <asm/mach/map.h>
#include "hardware.h"
#include "iomux-v1.h"
static void __iomem *imx_iomuxv1_baseaddr;
static unsigned imx_iomuxv1_numports;
static inline unsigned long imx_iomuxv1_readl(unsigned offset)
{
return imx_readl(imx_iomuxv1_baseaddr + offset);
}
static inline void imx_iomuxv1_writel(unsigned long val, unsigned offset)
{
imx_writel(val, imx_iomuxv1_baseaddr + offset);
}
static inline void imx_iomuxv1_rmwl(unsigned offset,
unsigned long mask, unsigned long value)
{
unsigned long reg = imx_iomuxv1_readl(offset);
reg &= ~mask;
reg |= value;
imx_iomuxv1_writel(reg, offset);
}
static inline void imx_iomuxv1_set_puen(
unsigned int port, unsigned int pin, int on)
{
unsigned long mask = 1 << pin;
imx_iomuxv1_rmwl(MXC_PUEN(port), mask, on ? mask : 0);
}
static inline void imx_iomuxv1_set_ddir(
unsigned int port, unsigned int pin, int out)
{
unsigned long mask = 1 << pin;
imx_iomuxv1_rmwl(MXC_DDIR(port), mask, out ? mask : 0);
}
static inline void imx_iomuxv1_set_gpr(
unsigned int port, unsigned int pin, int af)
{
unsigned long mask = 1 << pin;
imx_iomuxv1_rmwl(MXC_GPR(port), mask, af ? mask : 0);
}
static inline void imx_iomuxv1_set_gius(
unsigned int port, unsigned int pin, int inuse)
{
unsigned long mask = 1 << pin;
imx_iomuxv1_rmwl(MXC_GIUS(port), mask, inuse ? mask : 0);
}
static inline void imx_iomuxv1_set_ocr(
unsigned int port, unsigned int pin, unsigned int ocr)
{
unsigned long shift = (pin & 0xf) << 1;
unsigned long mask = 3 << shift;
unsigned long value = ocr << shift;
unsigned long offset = pin < 16 ? MXC_OCR1(port) : MXC_OCR2(port);
imx_iomuxv1_rmwl(offset, mask, value);
}
static inline void imx_iomuxv1_set_iconfa(
unsigned int port, unsigned int pin, unsigned int aout)
{
unsigned long shift = (pin & 0xf) << 1;
unsigned long mask = 3 << shift;
unsigned long value = aout << shift;
unsigned long offset = pin < 16 ? MXC_ICONFA1(port) : MXC_ICONFA2(port);
imx_iomuxv1_rmwl(offset, mask, value);
}
static inline void imx_iomuxv1_set_iconfb(
unsigned int port, unsigned int pin, unsigned int bout)
{
unsigned long shift = (pin & 0xf) << 1;
unsigned long mask = 3 << shift;
unsigned long value = bout << shift;
unsigned long offset = pin < 16 ? MXC_ICONFB1(port) : MXC_ICONFB2(port);
imx_iomuxv1_rmwl(offset, mask, value);
}
int mxc_gpio_mode(int gpio_mode)
{
unsigned int pin = gpio_mode & GPIO_PIN_MASK;
unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
unsigned int aout = (gpio_mode >> GPIO_AOUT_SHIFT) & 3;
unsigned int bout = (gpio_mode >> GPIO_BOUT_SHIFT) & 3;
if (port >= imx_iomuxv1_numports)
return -EINVAL;
/* Pullup enable */
imx_iomuxv1_set_puen(port, pin, gpio_mode & GPIO_PUEN);
/* Data direction */
imx_iomuxv1_set_ddir(port, pin, gpio_mode & GPIO_OUT);
/* Primary / alternate function */
imx_iomuxv1_set_gpr(port, pin, gpio_mode & GPIO_AF);
/* use as gpio? */
imx_iomuxv1_set_gius(port, pin, !(gpio_mode & (GPIO_PF | GPIO_AF)));
imx_iomuxv1_set_ocr(port, pin, ocr);
imx_iomuxv1_set_iconfa(port, pin, aout);
imx_iomuxv1_set_iconfb(port, pin, bout);
return 0;
}
static int imx_iomuxv1_setup_multiple(const int *list, unsigned count)
{
size_t i;
int ret = 0;
for (i = 0; i < count; ++i) {
ret = mxc_gpio_mode(list[i]);
if (ret)
return ret;
}
return ret;
}
int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
const char *label)
{
int ret;
ret = imx_iomuxv1_setup_multiple(pin_list, count);
return ret;
}
int __init imx_iomuxv1_init(void __iomem *base, int numports)
{
imx_iomuxv1_baseaddr = base;
imx_iomuxv1_numports = numports;
return 0;
}
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......@@ -67,6 +67,9 @@ static const char *const imx7ulp_dt_compat[] __initconst = {
static void __init imx7ulp_init_late(void)
{
if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT))
platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0);
imx7ulp_cpuidle_init();
}
......
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __PCM037_H__
#define __PCM037_H__
enum pcm037_board_variant {
PCM037_PCM970,
PCM037_EET,
};
extern enum pcm037_board_variant pcm037_variant(void);
#ifdef CONFIG_MACH_PCM037_EET
int pcm037_eet_init_devices(void);
#else
static inline int pcm037_eet_init_devices(void) { return 0; }
#endif
#endif
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