Commit adcb5264 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin Committed by Chris Wilson

drm/i915: Pass intel_gt to intel_engines_init_mmio

Engines belong to the GT so make it indicative in the API.
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191022094726.3001-2-tvrtko.ursulin@linux.intel.com
parent aa9eb0ca
...@@ -20,6 +20,8 @@ ...@@ -20,6 +20,8 @@
struct drm_printer; struct drm_printer;
struct intel_gt;
/* Early gen2 devices have a cacheline of just 32 bytes, using 64 is overkill, /* Early gen2 devices have a cacheline of just 32 bytes, using 64 is overkill,
* but keeps the logic simple. Indeed, the whole purpose of this macro is just * but keeps the logic simple. Indeed, the whole purpose of this macro is just
* to give some inclination as to some of the magic values used in the various * to give some inclination as to some of the magic values used in the various
...@@ -322,7 +324,7 @@ __intel_ring_space(unsigned int head, unsigned int tail, unsigned int size) ...@@ -322,7 +324,7 @@ __intel_ring_space(unsigned int head, unsigned int tail, unsigned int size)
return (head - tail - CACHELINE_BYTES) & (size - 1); return (head - tail - CACHELINE_BYTES) & (size - 1);
} }
int intel_engines_init_mmio(struct drm_i915_private *i915); int intel_engines_init_mmio(struct intel_gt *gt);
int intel_engines_setup(struct drm_i915_private *i915); int intel_engines_setup(struct drm_i915_private *i915);
int intel_engines_init(struct drm_i915_private *i915); int intel_engines_init(struct drm_i915_private *i915);
void intel_engines_cleanup(struct drm_i915_private *i915); void intel_engines_cleanup(struct drm_i915_private *i915);
......
...@@ -396,12 +396,13 @@ void intel_engines_cleanup(struct drm_i915_private *i915) ...@@ -396,12 +396,13 @@ void intel_engines_cleanup(struct drm_i915_private *i915)
/** /**
* intel_engines_init_mmio() - allocate and prepare the Engine Command Streamers * intel_engines_init_mmio() - allocate and prepare the Engine Command Streamers
* @i915: the i915 device * @gt: pointer to struct intel_gt
* *
* Return: non-zero if the initialization failed. * Return: non-zero if the initialization failed.
*/ */
int intel_engines_init_mmio(struct drm_i915_private *i915) int intel_engines_init_mmio(struct intel_gt *gt)
{ {
struct drm_i915_private *i915 = gt->i915;
struct intel_device_info *device_info = mkwrite_device_info(i915); struct intel_device_info *device_info = mkwrite_device_info(i915);
const unsigned int engine_mask = INTEL_INFO(i915)->engine_mask; const unsigned int engine_mask = INTEL_INFO(i915)->engine_mask;
unsigned int mask = 0; unsigned int mask = 0;
...@@ -419,7 +420,7 @@ int intel_engines_init_mmio(struct drm_i915_private *i915) ...@@ -419,7 +420,7 @@ int intel_engines_init_mmio(struct drm_i915_private *i915)
if (!HAS_ENGINE(i915, i)) if (!HAS_ENGINE(i915, i))
continue; continue;
err = intel_engine_setup(&i915->gt, i); err = intel_engine_setup(gt, i);
if (err) if (err)
goto cleanup; goto cleanup;
...@@ -436,7 +437,7 @@ int intel_engines_init_mmio(struct drm_i915_private *i915) ...@@ -436,7 +437,7 @@ int intel_engines_init_mmio(struct drm_i915_private *i915)
RUNTIME_INFO(i915)->num_engines = hweight32(mask); RUNTIME_INFO(i915)->num_engines = hweight32(mask);
intel_gt_check_and_clear_faults(&i915->gt); intel_gt_check_and_clear_faults(gt);
intel_setup_engine_capabilities(i915); intel_setup_engine_capabilities(i915);
......
...@@ -598,7 +598,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv) ...@@ -598,7 +598,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
intel_uc_init_mmio(&dev_priv->gt.uc); intel_uc_init_mmio(&dev_priv->gt.uc);
ret = intel_engines_init_mmio(dev_priv); ret = intel_engines_init_mmio(&dev_priv->gt);
if (ret) if (ret)
goto err_uncore; goto err_uncore;
......
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