Commit aee62e02 authored by Umesh Nerlige Ramappa's avatar Umesh Nerlige Ramappa Committed by Jani Nikula

drm/i915/perf: Use GTT when saving/restoring engine GPR

MI_STORE_REGISTER_MEM and MI_LOAD_REGISTER_MEM need to know which
translation to use when saving restoring the engine general purpose
registers to and from the GT scratch. Since GT scratch is mapped to
ggtt, we need to set an additional bit in the command to use GTT.

Fixes: daed3e44 ("drm/i915/perf: implement active wait for noa configurations")
Suggested-by: default avatarPrathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Signed-off-by: default avatarUmesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: default avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200709224504.11345-1-chris@chris-wilson.co.ukSigned-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
(cherry picked from commit e43ff99c)
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 42de9b0a
...@@ -1592,6 +1592,7 @@ static u32 *save_restore_register(struct i915_perf_stream *stream, u32 *cs, ...@@ -1592,6 +1592,7 @@ static u32 *save_restore_register(struct i915_perf_stream *stream, u32 *cs,
u32 d; u32 d;
cmd = save ? MI_STORE_REGISTER_MEM : MI_LOAD_REGISTER_MEM; cmd = save ? MI_STORE_REGISTER_MEM : MI_LOAD_REGISTER_MEM;
cmd |= MI_SRM_LRM_GLOBAL_GTT;
if (INTEL_GEN(stream->perf->i915) >= 8) if (INTEL_GEN(stream->perf->i915) >= 8)
cmd++; cmd++;
......
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