Commit af8f3fb7 authored by Weifeng Voon's avatar Weifeng Voon Committed by David S. Miller

net: stmmac: dma channel control register need to be init first

stmmac_init_chan() needs to be called before stmmac_init_rx_chan() and
stmmac_init_tx_chan(). This is because if PBLx8 is to be used,
"DMA_CH(#i)_Control.PBLx8" needs to be set before programming
"DMA_CH(#i)_TX_Control.TxPBL" and "DMA_CH(#i)_RX_Control.RxPBL".

Fixes: 47f2a9ce ("net: stmmac: dma channel init prepared for multiple queues")
Reviewed-by: default avatarZhang, Baoli <baoli.zhang@intel.com>
Signed-off-by: default avatarOng Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: default avatarWeifeng Voon <weifeng.voon@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 46dfc3a5
...@@ -2208,6 +2208,10 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv) ...@@ -2208,6 +2208,10 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
if (priv->plat->axi) if (priv->plat->axi)
stmmac_axi(priv, priv->ioaddr, priv->plat->axi); stmmac_axi(priv, priv->ioaddr, priv->plat->axi);
/* DMA CSR Channel configuration */
for (chan = 0; chan < dma_csr_ch; chan++)
stmmac_init_chan(priv, priv->ioaddr, priv->plat->dma_cfg, chan);
/* DMA RX Channel Configuration */ /* DMA RX Channel Configuration */
for (chan = 0; chan < rx_channels_count; chan++) { for (chan = 0; chan < rx_channels_count; chan++) {
rx_q = &priv->rx_queue[chan]; rx_q = &priv->rx_queue[chan];
...@@ -2233,10 +2237,6 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv) ...@@ -2233,10 +2237,6 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
tx_q->tx_tail_addr, chan); tx_q->tx_tail_addr, chan);
} }
/* DMA CSR Channel configuration */
for (chan = 0; chan < dma_csr_ch; chan++)
stmmac_init_chan(priv, priv->ioaddr, priv->plat->dma_cfg, chan);
return ret; return ret;
} }
......
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