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Commit b24657db authored by Linus Torvalds's avatar Linus Torvalds
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Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk 

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents 979ef1b0 1c9a512c
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Documentation/infiniband/ipoib.txt 0 → 100644
View file @ b24657db
IP OVER INFINIBAND
The ib_ipoib driver is an implementation of the IP over InfiniBand
protocol as specified by the latest Internet-Drafts issued by the
IETF ipoib working group. It is a "native" implementation in the
sense of setting the interface type to ARPHRD_INFINIBAND and the
hardware address length to 20 (earlier proprietary implementations
masqueraded to the kernel as ethernet interfaces).
Partitions and P_Keys
When the IPoIB driver is loaded, it creates one interface for each
port using the P_Key at index 0. To create an interface with a
different P_Key, write the desired P_Key into the main interface's
/sys/class/net/<intf name>/create_child file. For example:
echo 0x8001 > /sys/class/net/ib0/create_child
This will create an interface named ib0.8001 with P_Key 0x8001. To
remove a subinterface, use the "delete_child" file:
echo 0x8001 > /sys/class/net/ib0/delete_child
The P_Key for any interface is given by the "pkey" file, and the
main interface for a subinterface is in "parent."
Debugging Information
By compiling the IPoIB driver with CONFIG_INFINIBAND_IPOIB_DEBUG set
to 'y', tracing messages are compiled into the driver. They are
turned on by setting the module parameters debug_level and
mcast_debug_level to 1. These parameters can be controlled at
runtime through files in /sys/module/ib_ipoib/.
CONFIG_INFINIBAND_IPOIB_DEBUG also enables the "ipoib_debugfs"
virtual filesystem. By mounting this filesystem, for example with
mkdir -p /ipoib_debugfs
mount -t ipoib_debugfs none /ipoib_debufs
it is possible to get statistics about multicast groups from the
files /ipoib_debugfs/ib0_mcg and so on.
The performance impact of this option is negligible, so it
is safe to enable this option with debug_level set to 0 for normal
operation.
CONFIG_INFINIBAND_IPOIB_DEBUG_DATA enables even more debug output in
the data path when data_debug_level is set to 1. However, even with
the output disabled, enabling this configuration option will affect
performance, because it adds tests to the fast path.
References
IETF IP over InfiniBand (ipoib) Working Group
http://ietf.org/html.charters/ipoib-charter.html
Documentation/infiniband/sysfs.txt 0 → 100644
View file @ b24657db
SYSFS FILES
For each InfiniBand device, the InfiniBand drivers create the
following files under /sys/class/infiniband/<device name>:
node_guid - Node GUID
sys_image_guid - System image GUID
In addition, there is a "ports" subdirectory, with one subdirectory
for each port. For example, if mthca0 is a 2-port HCA, there will
be two directories:
/sys/class/infiniband/mthca0/ports/1
/sys/class/infiniband/mthca0/ports/2
(A switch will only have a single "0" subdirectory for switch port
0; no subdirectory is created for normal switch ports)
In each port subdirectory, the following files are created:
cap_mask - Port capability mask
lid - Port LID
lid_mask_count - Port LID mask count
rate - Port data rate (active width * active speed)
sm_lid - Subnet manager LID for port's subnet
sm_sl - Subnet manager SL for port's subnet
state - Port state (DOWN, INIT, ARMED, ACTIVE or ACTIVE_DEFER)
There is also a "counters" subdirectory, with files
VL15_dropped
excessive_buffer_overrun_errors
link_downed
link_error_recovery
local_link_integrity_errors
port_rcv_constraint_errors
port_rcv_data
port_rcv_errors
port_rcv_packets
port_rcv_remote_physical_errors
port_rcv_switch_relay_errors
port_xmit_constraint_errors
port_xmit_data
port_xmit_discards
port_xmit_packets
symbol_error
Each of these files contains the corresponding value from the port's
Performance Management PortCounters attribute, as described in
section 16.1.3.5 of the InfiniBand Architecture Specification.
The "pkeys" and "gids" subdirectories contain one file for each
entry in the port's P_Key or GID table respectively. For example,
ports/1/pkeys/10 contains the value at index 10 in port 1's P_Key
table.
MTHCA
The Mellanox HCA driver also creates the files:
hw_rev - Hardware revision number
fw_ver - Firmware version
hca_type - HCA type: "MT23108", "MT25208 (MT23108 compat mode)",
or "MT25208"
Documentation/infiniband/user_mad.txt 0 → 100644
View file @ b24657db
USERSPACE MAD ACCESS
Device files
Each port of each InfiniBand device has a "umad" device attached.
For example, a two-port HCA will have two devices, while a switch
will have one device (for switch port 0).
Creating MAD agents
A MAD agent can be created by filling in a struct ib_user_mad_reg_req
and then calling the IB_USER_MAD_REGISTER_AGENT ioctl on a file
descriptor for the appropriate device file. If the registration
request succeeds, a 32-bit id will be returned in the structure.
For example:
struct ib_user_mad_reg_req req = { /* ... */ };
ret = ioctl(fd, IB_USER_MAD_REGISTER_AGENT, (char *) &req);
if (!ret)
my_agent = req.id;
else
perror("agent register");
Agents can be unregistered with the IB_USER_MAD_UNREGISTER_AGENT
ioctl. Also, all agents registered through a file descriptor will
be unregistered when the descriptor is closed.
Receiving MADs
MADs are received using read(). The buffer passed to read() must be
large enough to hold at least one struct ib_user_mad. For example:
struct ib_user_mad mad;
ret = read(fd, &mad, sizeof mad);
if (ret != sizeof mad)
perror("read");
In addition to the actual MAD contents, the other struct ib_user_mad
fields will be filled in with information on the received MAD. For
example, the remote LID will be in mad.lid.
If a send times out, a receive will be generated with mad.status set
to ETIMEDOUT. Otherwise when a MAD has been successfully received,
mad.status will be 0.
poll()/select() may be used to wait until a MAD can be read.
Sending MADs
MADs are sent using write(). The agent ID for sending should be
filled into the id field of the MAD, the destination LID should be
filled into the lid field, and so on. For example:
struct ib_user_mad mad;
/* fill in mad.data */
mad.id = my_agent; /* req.id from agent registration */
mad.lid = my_dest; /* in network byte order... */
/* etc. */
ret = write(fd, &mad, sizeof mad);
if (ret != sizeof mad)
perror("write");
/dev files
To create the appropriate character device files automatically with
udev, a rule like
KERNEL="umad*", NAME="infiniband/%k"
can be used. This will create a device node named
/dev/infiniband/umad0
for the first port, and so on. The InfiniBand device and port
associated with this device can be determined from the files
/sys/class/infiniband_mad/umad0/ibdev
/sys/class/infiniband_mad/umad0/port
Documentation/ioctl-number.txt
View file @ b24657db
......@@ -72,6 +72,7 @@ Code Seq# Include File Comments
0x09 all linux/md.h
0x12 all linux/fs.h
linux/blkpg.h
0x1b all InfiniBand Subsystem <http://www.openib.org/>
0x20 all drivers/cdrom/cm206.h
0x22 all scsi/sg.h
'#' 00-3F IEEE 1394 Subsystem Block for the entire subsystem
......
MAINTAINERS
View file @ b24657db
......@@ -1081,6 +1081,17 @@ M: lethal@chaoticdreams.org
L: linux-fbdev-devel@lists.sourceforge.net
S: Maintained
INFINIBAND SUBSYSTEM
P: Roland Dreier
M: roland@topspin.com
P: Sean Hefty
M: mshefty@ichips.intel.com
P: Hal Rosenstock
M: halr@voltaire.com
L: openib-general@openib.org
W: http://www.openib.org/
S: Supported
INPUT (KEYBOARD, MOUSE, JOYSTICK) DRIVERS
P: Vojtech Pavlik
M: vojtech@suse.cz
......@@ -1568,7 +1579,6 @@ P: Wensong Zhang
M: wensong@linux-vs.org
P: Julian Anastasov
M: ja@ssi.bg
L: lvs-users@linuxvirtualserver.org
S: Maintained
NFS CLIENT
......
arch/i386/kernel/dmi_scan.c
View file @ b24657db
......@@ -102,11 +102,10 @@ inline static int __init dmi_checksum(u8 *buf)
static int __init dmi_iterate(void (*decode)(struct dmi_header *))
{
u8 buf[15];
u32 fp=0xF0000;
char __iomem *p, *q;
while (fp < 0xFFFFF)
{
isa_memcpy_fromio(buf, fp, 15);
for (p = q = ioremap(0xF0000, 0x10000); q < p + 0x10000; q += 16) {
memcpy_fromio(buf, q, 15);
if(memcmp(buf, "_DMI_", 5)==0 && dmi_checksum(buf))
{
u16 num=buf[13]<<8|buf[12];
......@@ -126,11 +125,13 @@ static int __init dmi_iterate(void (*decode)(struct dmi_header *))
num, len));
dmi_printk((KERN_INFO "DMI table at 0x%08X.\n",
base));
if(dmi_table(base,len, num, decode)==0)
if(dmi_table(base,len, num, decode)==0) {
iounmap(p);
return 0;
}
}
fp+=16;
}
iounmap(p);
return -1;
}
......
arch/i386/kernel/traps.c
View file @ b24657db
......@@ -1004,9 +1004,11 @@ static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
void __init trap_init(void)
{
#ifdef CONFIG_EISA
if (isa_readl(0x0FFFD9) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
void __iomem *p = ioremap(0x0FFFD9, 4);
if (readl(p) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
EISA_bus = 1;
}
iounmap(p);
#endif
#ifdef CONFIG_X86_LOCAL_APIC
......
arch/ppc/platforms/chrp_pci.c
View file @ b24657db
......@@ -23,7 +23,7 @@
#include <asm/open_pic.h>
/* LongTrail */
unsigned long gg2_pci_config_base;
void __iomem *gg2_pci_config_base;
/*
* The VLSI Golden Gate II has only 512K of PCI configuration space, so we
......@@ -33,7 +33,7 @@ unsigned long gg2_pci_config_base;
int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
int len, u32 *val)
{
volatile unsigned char *cfg_data;
volatile void __iomem *cfg_data;
struct pci_controller *hose = bus->sysdata;
if (bus->number > 7)
......@@ -45,13 +45,13 @@ int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off);
switch (len) {
case 1:
*val = in_8((u8 *)cfg_data);
*val = in_8(cfg_data);
break;
case 2:
*val = in_le16((u16 *)cfg_data);
*val = in_le16(cfg_data);
break;
default:
*val = in_le32((u32 *)cfg_data);
*val = in_le32(cfg_data);
break;
}
return PCIBIOS_SUCCESSFUL;
......@@ -60,7 +60,7 @@ int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
int __chrp gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
int len, u32 val)
{
volatile unsigned char *cfg_data;
volatile void __iomem *cfg_data;
struct pci_controller *hose = bus->sysdata;
if (bus->number > 7)
......@@ -72,13 +72,13 @@ int __chrp gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off);
switch (len) {
case 1:
out_8((u8 *)cfg_data, val);
out_8(cfg_data, val);
break;
case 2:
out_le16((u16 *)cfg_data, val);
out_le16(cfg_data, val);
break;
default:
out_le32((u32 *)cfg_data, val);
out_le32(cfg_data, val);
break;
}
return PCIBIOS_SUCCESSFUL;
......@@ -253,10 +253,10 @@ chrp_find_bridges(void)
|| strncmp(model, "Motorola, Grackle", 17) == 0) {
setup_grackle(hose);
} else if (is_longtrail) {
void __iomem *p = ioremap(GG2_PCI_CONFIG_BASE, 0x80000);
hose->ops = &gg2_pci_ops;
hose->cfg_data = (unsigned char *)
ioremap(GG2_PCI_CONFIG_BASE, 0x80000);
gg2_pci_config_base = (unsigned long) hose->cfg_data;
hose->cfg_data = p;
gg2_pci_config_base = p;
} else {
printk("No methods for %s (model %s), using RTAS\n",
dev->full_name, model);
......
arch/ppc/platforms/chrp_setup.c
View file @ b24657db
......@@ -118,13 +118,12 @@ chrp_show_cpuinfo(struct seq_file *m)
if (!strncmp(model, "IBM,LongTrail", 13)) {
/* VLSI VAS96011/12 `Golden Gate 2' */
/* Memory banks */
sdramen = (in_le32((unsigned *)(gg2_pci_config_base+
GG2_PCI_DRAM_CTRL))
sdramen = (in_le32(gg2_pci_config_base + GG2_PCI_DRAM_CTRL)
>>31) & 1;
for (i = 0; i < (sdramen ? 4 : 6); i++) {
t = in_le32((unsigned *)(gg2_pci_config_base+
t = in_le32(gg2_pci_config_base+
GG2_PCI_DRAM_BANK0+
i*4));
i*4);
if (!(t & 1))
continue;
switch ((t>>8) & 0x1f) {
......@@ -154,7 +153,7 @@ chrp_show_cpuinfo(struct seq_file *m)
gg2_memtypes[sdramen ? 1 : ((t>>1) & 3)]);
}
/* L2 cache */
t = in_le32((unsigned *)(gg2_pci_config_base+GG2_PCI_CC_CTRL));
t = in_le32(gg2_pci_config_base+GG2_PCI_CC_CTRL);
seq_printf(m, "board l2\t: %s %s (%s)\n",
gg2_cachesizes[(t>>7) & 3],
gg2_cachetypes[(t>>2) & 3],
......
arch/ppc/platforms/pmac_pci.c
View file @ b24657db
......@@ -142,14 +142,14 @@ fixup_bus_range(struct device_node *bridge)
|(((unsigned long)(off)) & 0xFCUL) \
|1UL)
static unsigned int __pmac
static void volatile __iomem * __pmac
macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset)
{
unsigned int caddr;
if (bus == hose->first_busno) {
if (dev_fn < (11 << 3))
return 0;
return NULL;
caddr = MACRISC_CFA0(dev_fn, offset);
} else
caddr = MACRISC_CFA1(bus, dev_fn, offset);
......@@ -160,7 +160,7 @@ macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset)
} while (in_le32(hose->cfg_addr) != caddr);
offset &= has_uninorth ? 0x07 : 0x03;
return (unsigned int)(hose->cfg_data) + (unsigned int)offset;
return hose->cfg_data + offset;
}
static int __pmac
......@@ -168,7 +168,7 @@ macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
int len, u32 *val)
{
struct pci_controller *hose = bus->sysdata;
unsigned int addr;
void volatile __iomem *addr;
addr = macrisc_cfg_access(hose, bus->number, devfn, offset);
if (!addr)
......@@ -179,13 +179,13 @@ macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
*/
switch (len) {
case 1:
*val = in_8((u8 *)addr);
*val = in_8(addr);
break;
case 2:
*val = in_le16((u16 *)addr);
*val = in_le16(addr);
break;
default:
*val = in_le32((u32 *)addr);
*val = in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
......@@ -196,7 +196,7 @@ macrisc_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
int len, u32 val)
{
struct pci_controller *hose = bus->sysdata;
unsigned int addr;
void volatile __iomem *addr;
addr = macrisc_cfg_access(hose, bus->number, devfn, offset);
if (!addr)
......@@ -207,16 +207,16 @@ macrisc_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
*/
switch (len) {
case 1:
out_8((u8 *)addr, val);
(void) in_8((u8 *)addr);
out_8(addr, val);
(void) in_8(addr);
break;
case 2:
out_le16((u16 *)addr, val);
(void) in_le16((u16 *)addr);
out_le16(addr, val);
(void) in_le16(addr);
break;
default:
out_le32((u32 *)addr, val);
(void) in_le32((u32 *)addr);
out_le32(addr, val);
(void) in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
......@@ -295,7 +295,7 @@ static struct pci_ops chaos_pci_ops =
+ (((unsigned long)bus) << 16) \
+ 0x01000000UL)
static unsigned long __pmac
static void volatile __iomem * __pmac
u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset)
{
if (bus == hose->first_busno) {
......@@ -303,9 +303,9 @@ u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset)
if (PCI_FUNC(devfn) != 0 || PCI_SLOT(devfn) > 7 ||
PCI_SLOT(devfn) < 1)
return 0;
return ((unsigned long)hose->cfg_data) + U3_HT_CFA0(devfn, offset);
return hose->cfg_data + U3_HT_CFA0(devfn, offset);
} else
return ((unsigned long)hose->cfg_data) + U3_HT_CFA1(bus, devfn, offset);
return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset);
}
static int __pmac
......@@ -313,7 +313,7 @@ u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
int len, u32 *val)
{
struct pci_controller *hose = bus->sysdata;
unsigned int addr;
void volatile __iomem *addr;
int i;
struct device_node *np = pci_busdev_to_OF_node(bus, devfn);
......@@ -347,13 +347,13 @@ u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
*/
switch (len) {
case 1:
*val = in_8((u8 *)addr);
*val = in_8(addr);
break;
case 2:
*val = in_le16((u16 *)addr);
*val = in_le16(addr);
break;
default:
*val = in_le32((u32 *)addr);
*val = in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
......@@ -364,7 +364,7 @@ u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
int len, u32 val)
{
struct pci_controller *hose = bus->sysdata;
unsigned int addr;
void volatile __iomem *addr;
int i;
struct device_node *np = pci_busdev_to_OF_node(bus, devfn);
......@@ -388,16 +388,16 @@ u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
*/
switch (len) {
case 1:
out_8((u8 *)addr, val);
(void) in_8((u8 *)addr);
out_8(addr, val);
(void) in_8(addr);
break;
case 2:
out_le16((u16 *)addr, val);
(void) in_le16((u16 *)addr);
out_le16(addr, val);
(void) in_le16(addr);
break;
default:
out_le32((u32 *)addr, val);
(void) in_le32((u32 *)addr);
out_le32(addr, val);
(void) in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
......@@ -424,7 +424,7 @@ init_bandit(struct pci_controller *bp)
/* read the word at offset 0 in config space for device 11 */
out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + PCI_VENDOR_ID);
udelay(2);
vendev = in_le32((volatile unsigned int *)bp->cfg_data);
vendev = in_le32(bp->cfg_data);
if (vendev == (PCI_DEVICE_ID_APPLE_BANDIT << 16) +
PCI_VENDOR_ID_APPLE) {
/* read the revision id */
......@@ -443,12 +443,12 @@ init_bandit(struct pci_controller *bp)
/* read the word at offset 0x50 */
out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + BANDIT_MAGIC);
udelay(2);
magic = in_le32((volatile unsigned int *)bp->cfg_data);
magic = in_le32(bp->cfg_data);
if ((magic & BANDIT_COHERENT) != 0)
return;
magic |= BANDIT_COHERENT;
udelay(2);
out_le32((volatile unsigned int *)bp->cfg_data, magic);
out_le32(bp->cfg_data, magic);
printk(KERN_INFO "Cache coherency enabled for bandit/PSX\n");
}
......@@ -622,12 +622,12 @@ static inline void grackle_set_stg(struct pci_controller* bp, int enable)
unsigned int val;
out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
val = in_le32((volatile unsigned int *)bp->cfg_data);
val = in_le32(bp->cfg_data);
val = enable? (val | GRACKLE_PICR1_STG) :
(val & ~GRACKLE_PICR1_STG);
out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
out_le32((volatile unsigned int *)bp->cfg_data, val);
(void)in_le32((volatile unsigned int *)bp->cfg_data);
out_le32(bp->cfg_data, val);
(void)in_le32(bp->cfg_data);
}
static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable)
......@@ -635,12 +635,12 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable)
unsigned int val;
out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
val = in_le32((volatile unsigned int *)bp->cfg_data);
val = in_le32(bp->cfg_data);
val = enable? (val | GRACKLE_PICR1_LOOPSNOOP) :
(val & ~GRACKLE_PICR1_LOOPSNOOP);
out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
out_le32((volatile unsigned int *)bp->cfg_data, val);
(void)in_le32((volatile unsigned int *)bp->cfg_data);
out_le32(bp->cfg_data, val);
(void)in_le32(bp->cfg_data);
}
static int __init
......@@ -659,10 +659,8 @@ static void __init
setup_bandit(struct pci_controller* hose, struct reg_property* addr)
{
hose->ops = &macrisc_pci_ops;
hose->cfg_addr = (volatile unsigned int *)
ioremap(addr->address + 0x800000, 0x1000);
hose->cfg_data = (volatile unsigned char *)
ioremap(addr->address + 0xc00000, 0x1000);
hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000);
hose->cfg_data = ioremap(addr->address + 0xc00000, 0x1000);
init_bandit(hose);
}
......@@ -671,10 +669,8 @@ setup_chaos(struct pci_controller* hose, struct reg_property* addr)
{
/* assume a `chaos' bridge */
hose->ops = &chaos_pci_ops;
hose->cfg_addr = (volatile unsigned int *)
ioremap(addr->address + 0x800000, 0x1000);
hose->cfg_data = (volatile unsigned char *)
ioremap(addr->address + 0xc00000, 0x1000);
hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000);
hose->cfg_data = ioremap(addr->address + 0xc00000, 0x1000);
}
#ifdef CONFIG_POWER4
......@@ -713,7 +709,7 @@ setup_u3_ht(struct pci_controller* hose, struct reg_property *addr)
* the reg address cell, we shall fix that by killing struct
* reg_property and using some accessor functions instead
*/
hose->cfg_data = (volatile unsigned char *)ioremap(0xf2000000, 0x02000000);
hose->cfg_data = ioremap(0xf2000000, 0x02000000);
/*
* /ht node doesn't expose a "ranges" property, so we "remove" regions that
......
arch/ppc/platforms/prep_pci.c
View file @ b24657db
......@@ -627,7 +627,7 @@ prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
int len, u32 *val)
{
struct pci_controller *hose = bus->sysdata;
volatile unsigned char *cfg_data;
volatile void __iomem *cfg_data;
if (bus->number != 0 || DEVNO(devfn) < MIN_DEVNR
|| DEVNO(devfn) > MAX_DEVNR)
......@@ -640,13 +640,13 @@ prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
cfg_data = hose->cfg_data + CFGADDR(devfn) + offset;
switch (len) {
case 1:
*val = in_8((u8 *)cfg_data);
*val = in_8(cfg_data);
break;
case 2:
*val = in_le16((u16 *)cfg_data);
*val = in_le16(cfg_data);
break;
default:
*val = in_le32((u32 *)cfg_data);
*val = in_le32(cfg_data);
break;
}
return PCIBIOS_SUCCESSFUL;
......@@ -657,7 +657,7 @@ prep_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
int len, u32 val)
{
struct pci_controller *hose = bus->sysdata;
volatile unsigned char *cfg_data;
volatile void __iomem *cfg_data;
if (bus->number != 0 || DEVNO(devfn) < MIN_DEVNR
|| DEVNO(devfn) > MAX_DEVNR)
......@@ -670,13 +670,13 @@ prep_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
cfg_data = hose->cfg_data + CFGADDR(devfn) + offset;
switch (len) {
case 1:
out_8((u8 *)cfg_data, val);
out_8(cfg_data, val);
break;
case 2:
out_le16((u16 *)cfg_data, val);
out_le16(cfg_data, val);
break;
default:
out_le32((u32 *)cfg_data, val);
out_le32(cfg_data, val);
break;
}
return PCIBIOS_SUCCESSFUL;
......
arch/ppc/syslib/indirect_pci.c
View file @ b24657db
......@@ -32,7 +32,7 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
int len, u32 *val)
{
struct pci_controller *hose = bus->sysdata;
volatile unsigned char *cfg_data;
volatile void __iomem *cfg_data;
u8 cfg_type = 0;
if (ppc_md.pci_exclude_device)
......@@ -54,13 +54,13 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
cfg_data = hose->cfg_data + (offset & 3);
switch (len) {
case 1:
*val = in_8((u8 *)cfg_data);
*val = in_8(cfg_data);
break;
case 2:
*val = in_le16((u16 *)cfg_data);
*val = in_le16(cfg_data);
break;
default:
*val = in_le32((u32 *)cfg_data);
*val = in_le32(cfg_data);
break;
}
return PCIBIOS_SUCCESSFUL;
......@@ -71,7 +71,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
int len, u32 val)
{
struct pci_controller *hose = bus->sysdata;
volatile unsigned char *cfg_data;
volatile void __iomem *cfg_data;
u8 cfg_type = 0;
if (ppc_md.pci_exclude_device)
......@@ -93,13 +93,13 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
cfg_data = hose->cfg_data + (offset & 3);
switch (len) {
case 1:
out_8((u8 *)cfg_data, val);
out_8(cfg_data, val);
break;
case 2:
out_le16((u16 *)cfg_data, val);
out_le16(cfg_data, val);
break;
default:
out_le32((u32 *)cfg_data, val);
out_le32(cfg_data, val);
break;
}
return PCIBIOS_SUCCESSFUL;
......@@ -112,11 +112,11 @@ static struct pci_ops indirect_pci_ops =
};
void __init
setup_indirect_pci_nomap(struct pci_controller* hose, u32 cfg_addr,
u32 cfg_data)
setup_indirect_pci_nomap(struct pci_controller* hose, void __iomem * cfg_addr,
void __iomem * cfg_data)
{
hose->cfg_addr = (unsigned int *)cfg_addr;
hose->cfg_data = (unsigned char *)cfg_data;
hose->cfg_addr = cfg_addr;
hose->cfg_data = cfg_data;
hose->ops = &indirect_pci_ops;
}
......@@ -124,12 +124,12 @@ void __init
setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
{
unsigned long base = cfg_addr & PAGE_MASK;
char *mbase;
void __iomem *mbase, *addr, *data;
mbase = ioremap(base, PAGE_SIZE);
cfg_addr = (u32)(mbase + (cfg_addr & ~PAGE_MASK));
addr = mbase + (cfg_addr & ~PAGE_MASK);
if ((cfg_data & PAGE_MASK) != base)
mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
cfg_data = (u32)(mbase + (cfg_data & ~PAGE_MASK));
setup_indirect_pci_nomap(hose, cfg_addr, cfg_data);
data = mbase + (cfg_data & ~PAGE_MASK);
setup_indirect_pci_nomap(hose, addr, data);
}
arch/ppc/syslib/open_pic.c
View file @ b24657db
......@@ -32,8 +32,8 @@
#define OPENPIC_BIG_ENDIAN
#endif
void* OpenPIC_Addr;
static volatile struct OpenPIC *OpenPIC = NULL;
void __iomem *OpenPIC_Addr;
static volatile struct OpenPIC __iomem *OpenPIC = NULL;
/*
* We define OpenPIC_InitSenses table thusly:
......@@ -47,7 +47,7 @@ extern int use_of_interrupt_tree;
static u_int NumProcessors;
static u_int NumSources;
static int open_pic_irq_offset;
static volatile OpenPIC_Source *ISR[NR_IRQS];
static volatile OpenPIC_Source __iomem *ISR[NR_IRQS];
static int openpic_cascade_irq = -1;
static int (*openpic_cascade_fn)(struct pt_regs *);
......@@ -163,7 +163,7 @@ struct hw_interrupt_type open_pic_ipi = {
#define check_arg_cpu(cpu) do {} while (0)
#endif
u_int openpic_read(volatile u_int *addr)
u_int openpic_read(volatile u_int __iomem *addr)
{
u_int val;
......@@ -175,7 +175,7 @@ u_int openpic_read(volatile u_int *addr)
return val;
}
static inline void openpic_write(volatile u_int *addr, u_int val)
static inline void openpic_write(volatile u_int __iomem *addr, u_int val)
{
#ifdef OPENPIC_BIG_ENDIAN
out_be32(addr, val);
......@@ -184,30 +184,30 @@ static inline void openpic_write(volatile u_int *addr, u_int val)
#endif
}
static inline u_int openpic_readfield(volatile u_int *addr, u_int mask)
static inline u_int openpic_readfield(volatile u_int __iomem *addr, u_int mask)
{
u_int val = openpic_read(addr);
return val & mask;
}
inline void openpic_writefield(volatile u_int *addr, u_int mask,
inline void openpic_writefield(volatile u_int __iomem *addr, u_int mask,
u_int field)
{
u_int val = openpic_read(addr);
openpic_write(addr, (val & ~mask) | (field & mask));
}
static inline void openpic_clearfield(volatile u_int *addr, u_int mask)
static inline void openpic_clearfield(volatile u_int __iomem *addr, u_int mask)
{
openpic_writefield(addr, mask, 0);
}
static inline void openpic_setfield(volatile u_int *addr, u_int mask)
static inline void openpic_setfield(volatile u_int __iomem *addr, u_int mask)
{
openpic_writefield(addr, mask, mask);
}
static void openpic_safe_writefield(volatile u_int *addr, u_int mask,
static void openpic_safe_writefield(volatile u_int __iomem *addr, u_int mask,
u_int field)
{
openpic_setfield(addr, OPENPIC_MASK);
......@@ -217,7 +217,7 @@ static void openpic_safe_writefield(volatile u_int *addr, u_int mask,
#ifdef CONFIG_SMP
/* yes this is right ... bug, feature, you decide! -- tgall */
u_int openpic_read_IPI(volatile u_int* addr)
u_int openpic_read_IPI(volatile u_int __iomem * addr)
{
u_int val = 0;
#if defined(OPENPIC_BIG_ENDIAN) || defined(CONFIG_POWER3)
......@@ -229,23 +229,23 @@ u_int openpic_read_IPI(volatile u_int* addr)
}
/* because of the power3 be / le above, this is needed */
inline void openpic_writefield_IPI(volatile u_int* addr, u_int mask, u_int field)
inline void openpic_writefield_IPI(volatile u_int __iomem * addr, u_int mask, u_int field)
{
u_int val = openpic_read_IPI(addr);
openpic_write(addr, (val & ~mask) | (field & mask));
}
static inline void openpic_clearfield_IPI(volatile u_int *addr, u_int mask)
static inline void openpic_clearfield_IPI(volatile u_int __iomem *addr, u_int mask)
{
openpic_writefield_IPI(addr, mask, 0);
}
static inline void openpic_setfield_IPI(volatile u_int *addr, u_int mask)
static inline void openpic_setfield_IPI(volatile u_int __iomem *addr, u_int mask)
{
openpic_writefield_IPI(addr, mask, mask);
}
static void openpic_safe_writefield_IPI(volatile u_int *addr, u_int mask, u_int field)
static void openpic_safe_writefield_IPI(volatile u_int __iomem *addr, u_int mask, u_int field)
{
openpic_setfield_IPI(addr, OPENPIC_MASK);
......@@ -287,16 +287,16 @@ static void openpic_reset(void)
}
#endif
void __init openpic_set_sources(int first_irq, int num_irqs, void *first_ISR)
void __init openpic_set_sources(int first_irq, int num_irqs, void __iomem *first_ISR)
{
volatile OpenPIC_Source *src = first_ISR;
volatile OpenPIC_Source __iomem *src = first_ISR;
int i, last_irq;
last_irq = first_irq + num_irqs;
if (last_irq > NumSources)
NumSources = last_irq;
if (src == 0)
src = &((struct OpenPIC *)OpenPIC_Addr)->Source[first_irq];
src = &((struct OpenPIC __iomem *)OpenPIC_Addr)->Source[first_irq];
for (i = first_irq; i < last_irq; ++i, ++src)
ISR[i] = src;
}
......@@ -318,7 +318,7 @@ void __init openpic_init(int offset)
printk("No OpenPIC found !\n");
return;
}
OpenPIC = (volatile struct OpenPIC *)OpenPIC_Addr;
OpenPIC = (volatile struct OpenPIC __iomem *)OpenPIC_Addr;
#ifdef CONFIG_EPIC_SERIAL_MODE
/* Have to start from ground zero.
......@@ -711,7 +711,7 @@ openpic_hookup_cascade(u_int irq, char *name,
*/
static void openpic_enable_irq(u_int irq)
{
volatile u_int *vpp;
volatile u_int __iomem *vpp;
check_arg_irq(irq);
vpp = &ISR[irq - open_pic_irq_offset]->Vector_Priority;
......@@ -724,7 +724,7 @@ static void openpic_enable_irq(u_int irq)
static void openpic_disable_irq(u_int irq)
{
volatile u_int *vpp;
volatile u_int __iomem *vpp;
u32 vp;
check_arg_irq(irq);
......
arch/ppc/syslib/open_pic_defs.h
View file @ b24657db
......@@ -172,7 +172,7 @@ struct OpenPIC {
OpenPIC_Processor Processor[OPENPIC_MAX_PROCESSORS];
};
extern volatile struct OpenPIC *OpenPIC;
extern volatile struct OpenPIC __iomem *OpenPIC;
/*
......
arch/sparc64/Kconfig
View file @ b24657db
......@@ -591,6 +591,8 @@ source "sound/Kconfig"
source "drivers/usb/Kconfig"
source "drivers/infiniband/Kconfig"
source "drivers/char/watchdog/Kconfig"
source "arch/sparc64/oprofile/Kconfig"
......
arch/sparc64/defconfig
View file @ b24657db
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.10-rc3
# Wed Dec 8 21:14:26 2004
# Linux kernel version: 2.6.10
# Mon Dec 27 22:36:56 2004
#
CONFIG_64BIT=y
CONFIG_MMU=y
......@@ -674,6 +674,7 @@ CONFIG_BRIDGE_EBT_MARK_T=m
CONFIG_BRIDGE_EBT_REDIRECT=m
CONFIG_BRIDGE_EBT_SNAT=m
CONFIG_BRIDGE_EBT_LOG=m
CONFIG_BRIDGE_EBT_ULOG=m
CONFIG_XFRM=y
CONFIG_XFRM_USER=m
......@@ -740,6 +741,7 @@ CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_U32=m
CONFIG_CLS_U32_PERF=y
CONFIG_NET_CLS_IND=y
CONFIG_CLS_U32_MARK=y
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
CONFIG_NET_CLS_ACT=y
......@@ -925,6 +927,7 @@ CONFIG_HAMACHI=m
CONFIG_YELLOWFIN=m
CONFIG_R8169=m
CONFIG_R8169_NAPI=y
CONFIG_R8169_VLAN=y
CONFIG_SK98LIN=m
CONFIG_VIA_VELOCITY=m
CONFIG_TIGON3=m
......@@ -936,6 +939,7 @@ CONFIG_IXGB=m
CONFIG_IXGB_NAPI=y
CONFIG_S2IO=m
CONFIG_S2IO_NAPI=y
CONFIG_2BUFF_MODE=y
#
# Token Ring devices
......@@ -1332,7 +1336,7 @@ CONFIG_SMB_FS=m
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_XATTR is not set
CONFIG_CIFS_POSIX=y
# CONFIG_CIFS_EXPERIMENTAL is not set
CONFIG_NCP_FS=m
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
......@@ -1459,7 +1463,7 @@ CONFIG_DVB_BUDGET_PATCH=m
# CONFIG_DVB_TTUSB_BUDGET is not set
CONFIG_DVB_TTUSB_DEC=m
CONFIG_DVB_DIBUSB=m
CONFIG_DVB_DIBUSB_MISDESIGNED_AN2235=y
# CONFIG_DVB_DIBUSB_MISDESIGNED_DEVICES is not set
CONFIG_DVB_DIBCOM_DEBUG=y
CONFIG_DVB_CINERGYT2=m
# CONFIG_DVB_CINERGYT2_TUNING is not set
......@@ -1468,6 +1472,7 @@ CONFIG_DVB_CINERGYT2=m
# Supported FlexCopII (B2C2) Adapters
#
CONFIG_DVB_B2C2_SKYSTAR=m
CONFIG_DVB_B2C2_USB=m
#
# Supported BT878 Adapters
......@@ -1504,6 +1509,7 @@ CONFIG_DVB_TDA1004X=m
CONFIG_DVB_NXT6000=m
CONFIG_DVB_MT352=m
CONFIG_DVB_DIB3000MB=m
CONFIG_DVB_DIB3000MC=m
#
# DVB-C (cable) frontends
......@@ -1635,6 +1641,7 @@ CONFIG_USB_EHCI_HCD=m
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_UHCI_HCD=m
CONFIG_USB_SL811_HCD=m
#
# USB Device Class drivers
......@@ -1805,6 +1812,15 @@ CONFIG_USB_SPEEDTOUCH=m
#
# CONFIG_USB_GADGET is not set
#
# InfiniBand support
#
CONFIG_INFINIBAND=m
CONFIG_INFINIBAND_MTHCA=m
# CONFIG_INFINIBAND_MTHCA_DEBUG is not set
CONFIG_INFINIBAND_IPOIB=m
# CONFIG_INFINIBAND_IPOIB_DEBUG is not set
#
# Watchdog Cards
#
......@@ -1890,6 +1906,10 @@ CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_CRC32C=m
CONFIG_CRYPTO_TEST=m
#
# Hardware crypto devices
#
#
# Library routines
#
......
arch/sparc64/solaris/ioctl.c
View file @ b24657db
......@@ -298,7 +298,7 @@ static inline int solaris_sockmod(unsigned int fd, unsigned int cmd, u32 arg)
if (! current->files->fd[fd] ||
! current->files->fd[fd]->f_dentry ||
! (ino = current->files->fd[fd]->f_dentry->d_inode) ||
! ino->i_sock) {
! S_ISSOCK(ino->i_mode)) {
spin_unlock(&current->files->file_lock);
return TBADF;
}
......@@ -478,7 +478,7 @@ static inline int solaris_S(struct file *filp, unsigned int fd, unsigned int cmd
struct module_info *mi;
ino = filp->f_dentry->d_inode;
if (! ino->i_sock)
if (!S_ISSOCK(ino->i_mode))
return -EBADF;
sock = filp->private_data;
if (! sock) {
......
arch/sparc64/solaris/socksys.c
View file @ b24657db
......@@ -150,7 +150,7 @@ static unsigned int socksys_poll(struct file * filp, poll_table * wait)
unsigned int mask = 0;
ino=filp->f_dentry->d_inode;
if (ino && ino->i_sock) {
if (ino && S_ISSOCK(ino->i_mode)) {
struct sol_socket_struct *sock;
sock = (struct sol_socket_struct*)filp->private_data;
if (sock && sock->pfirst) {
......
arch/sparc64/solaris/timod.c
View file @ b24657db
......@@ -853,9 +853,7 @@ asmlinkage int solaris_getmsg(unsigned int fd, u32 arg1, u32 arg2, u32 arg3)
if(!filp) goto out;
ino = filp->f_dentry->d_inode;
if (!ino) goto out;
if (!ino->i_sock)
if (!ino || !S_ISSOCK(ino->i_mode))
goto out;
ctlptr = (struct strbuf __user *)A(arg1);
......@@ -923,7 +921,7 @@ asmlinkage int solaris_putmsg(unsigned int fd, u32 arg1, u32 arg2, u32 arg3)
ino = filp->f_dentry->d_inode;
if (!ino) goto out;
if (!ino->i_sock &&
if (!S_ISSOCK(ino->i_mode) &&
(imajor(ino) != 30 || iminor(ino) != 1))
goto out;
......
arch/x86_64/lib/io.c
View file @ b24657db
......@@ -2,14 +2,14 @@
#include <asm/io.h>
#include <linux/module.h>
void *__memcpy_toio(unsigned long dst,const void*src,unsigned len)
void __memcpy_toio(unsigned long dst,const void*src,unsigned len)
{
return __inline_memcpy((void *) dst,src,len);
__inline_memcpy((void *) dst,src,len);
}
EXPORT_SYMBOL(__memcpy_toio);
void *__memcpy_fromio(void *dst,unsigned long src,unsigned len)
void __memcpy_fromio(void *dst,unsigned long src,unsigned len)
{
return __inline_memcpy(dst,(const void *) src,len);
__inline_memcpy(dst,(const void *) src,len);
}
EXPORT_SYMBOL(__memcpy_fromio);
drivers/Kconfig
View file @ b24657db
......@@ -56,4 +56,6 @@ source "drivers/usb/Kconfig"
source "drivers/mmc/Kconfig"
source "drivers/infiniband/Kconfig"
endmenu
drivers/Makefile
View file @ b24657db
......@@ -59,5 +59,6 @@ obj-$(CONFIG_MCA) += mca/
obj-$(CONFIG_EISA) += eisa/
obj-$(CONFIG_CPU_FREQ) += cpufreq/
obj-$(CONFIG_MMC) += mmc/
obj-$(CONFIG_INFINIBAND) += infiniband/
obj-y += firmware/
obj-$(CONFIG_CRYPTO) += crypto/
drivers/atm/ambassador.c
View file @ b24657db
......@@ -1692,7 +1692,7 @@ static unsigned int command_timeouts [] = {
};
unsigned int command_successes [] = {
static unsigned int command_successes [] = {
[host_memory_test] = COMMAND_PASSED_TEST,
[read_adapter_memory] = COMMAND_READ_DATA_OK,
[write_adapter_memory] = COMMAND_WRITE_DATA_OK,
......@@ -2088,7 +2088,7 @@ static void __init amb_ucode_version (amb_dev * dev) {
}
// swap bits within byte to get Ethernet ordering
u8 bit_swap (u8 byte)
static u8 bit_swap (u8 byte)
{
const u8 swap[] = {
0x0, 0x8, 0x4, 0xc,
......
drivers/atm/atmtcp.c
View file @ b24657db
......@@ -396,7 +396,7 @@ static int atmtcp_create(int itf,int persist,struct atm_dev **result)
}
int atmtcp_attach(struct atm_vcc *vcc,int itf)
static int atmtcp_attach(struct atm_vcc *vcc,int itf)
{
struct atm_dev *dev;
......@@ -427,13 +427,13 @@ int atmtcp_attach(struct atm_vcc *vcc,int itf)
}
int atmtcp_create_persistent(int itf)
static int atmtcp_create_persistent(int itf)
{
return atmtcp_create(itf,1,NULL);
}
int atmtcp_remove_persistent(int itf)
static int atmtcp_remove_persistent(int itf)
{
struct atm_dev *dev;
struct atmtcp_dev_data *dev_data;
......
drivers/atm/firestream.c
View file @ b24657db
......@@ -82,14 +82,14 @@ static int num=0x5a;
* would be interpreted. -- REW */
#define NP FS_NR_FREE_POOLS
int rx_buf_sizes[NP] = {128, 256, 512, 1024, 2048, 4096, 16384, 65520};
static int rx_buf_sizes[NP] = {128, 256, 512, 1024, 2048, 4096, 16384, 65520};
/* log2: 7 8 9 10 11 12 14 16 */
#if 0
int rx_pool_sizes[NP] = {1024, 1024, 512, 256, 128, 64, 32, 32};
static int rx_pool_sizes[NP] = {1024, 1024, 512, 256, 128, 64, 32, 32};
#else
/* debug */
int rx_pool_sizes[NP] = {128, 128, 128, 64, 64, 64, 32, 32};
static int rx_pool_sizes[NP] = {128, 128, 128, 64, 64, 64, 32, 32};
#endif
/* log2: 10 10 9 8 7 6 5 5 */
/* sumlog2: 17 18 18 18 18 18 19 21 */
......@@ -250,7 +250,7 @@ struct reginit_item {
};
struct reginit_item PHY_NTC_INIT[] __devinitdata = {
static struct reginit_item PHY_NTC_INIT[] __devinitdata = {
{ PHY_CLEARALL, 0x40 },
{ 0x12, 0x0001 },
{ 0x13, 0x7605 },
......@@ -334,7 +334,7 @@ module_param(fs_keystream, int, 0);
#define func_exit() fs_dprintk (FS_DEBUG_FLOW, "fs: exit %s\n", __FUNCTION__)
struct fs_dev *fs_boards = NULL;
static struct fs_dev *fs_boards = NULL;
#ifdef DEBUG
......@@ -1921,7 +1921,7 @@ static int __devinit firestream_init_one (struct pci_dev *pci_dev,
return -ENODEV;
}
void __devexit firestream_remove_one (struct pci_dev *pdev)
static void __devexit firestream_remove_one (struct pci_dev *pdev)
{
int i;
struct fs_dev *dev, *nxtdev;
......
drivers/atm/he.c
View file @ b24657db
......@@ -147,7 +147,7 @@ static u8 read_prom_byte(struct he_dev *he_dev, int addr);
/* globals */
struct he_dev *he_devs = NULL;
static struct he_dev *he_devs = NULL;
static int disable64 = 0;
static short nvpibits = -1;
static short nvcibits = -1;
......@@ -155,6 +155,48 @@ static short rx_skb_reserve = 16;
static int irq_coalesce = 1;
static int sdh = 0;
/* Read from EEPROM = 0000 0011b */
static unsigned int readtab[] = {
CS_HIGH | CLK_HIGH,
CS_LOW | CLK_LOW,
CLK_HIGH, /* 0 */
CLK_LOW,
CLK_HIGH, /* 0 */
CLK_LOW,
CLK_HIGH, /* 0 */
CLK_LOW,
CLK_HIGH, /* 0 */
CLK_LOW,
CLK_HIGH, /* 0 */
CLK_LOW,
CLK_HIGH, /* 0 */
CLK_LOW | SI_HIGH,
CLK_HIGH | SI_HIGH, /* 1 */
CLK_LOW | SI_HIGH,
CLK_HIGH | SI_HIGH /* 1 */
};
/* Clock to read from/write to the EEPROM */
static unsigned int clocktab[] = {
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW
};
static struct atmdev_ops he_ops =
{
.open = he_open,
......
drivers/atm/he.h
View file @ b24657db
......@@ -892,47 +892,4 @@ struct he_vcc
#define SI_HIGH ID_DIN /* HOST_CNTL_ID_PROM_DATA_IN */
#define EEPROM_DELAY 400 /* microseconds */
/* Read from EEPROM = 0000 0011b */
unsigned int readtab[] = {
CS_HIGH | CLK_HIGH,
CS_LOW | CLK_LOW,
CLK_HIGH, /* 0 */
CLK_LOW,
CLK_HIGH, /* 0 */
CLK_LOW,
CLK_HIGH, /* 0 */
CLK_LOW,
CLK_HIGH, /* 0 */
CLK_LOW,
CLK_HIGH, /* 0 */
CLK_LOW,
CLK_HIGH, /* 0 */
CLK_LOW | SI_HIGH,
CLK_HIGH | SI_HIGH, /* 1 */
CLK_LOW | SI_HIGH,
CLK_HIGH | SI_HIGH /* 1 */
};
/* Clock to read from/write to the EEPROM */
unsigned int clocktab[] = {
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW,
CLK_HIGH,
CLK_LOW
};
#endif /* _HE_H_ */
drivers/atm/idt77105.c
View file @ b24657db
......@@ -323,7 +323,7 @@ static int idt77105_start(struct atm_dev *dev)
}
int idt77105_stop(struct atm_dev *dev)
static int idt77105_stop(struct atm_dev *dev)
{
struct idt77105_priv *walk, *prev;
......
drivers/atm/idt77105.h
View file @ b24657db
......@@ -77,7 +77,6 @@
#ifdef __KERNEL__
int idt77105_init(struct atm_dev *dev) __init;
int idt77105_stop(struct atm_dev *dev);
#endif
/*
......
drivers/atm/idt77252.h
View file @ b24657db
......@@ -275,7 +275,7 @@ struct rsq_info {
struct rsq_entry *next;
struct rsq_entry *last;
dma_addr_t paddr;
} rsq_info;
};
/*****************************************************************************/
......
drivers/atm/iphase.c
View file @ b24657db
......@@ -72,13 +72,13 @@ struct suni_priv {
#define PRIV(dev) ((struct suni_priv *) dev->phy_data)
static unsigned char ia_phy_get(struct atm_dev *dev, unsigned long addr);
static void desc_dbg(IADEV *iadev);
static IADEV *ia_dev[8];
static struct atm_dev *_ia_dev[8];
static int iadev_count;
static void ia_led_timer(unsigned long arg);
static struct timer_list ia_timer = TIMER_INITIALIZER(ia_led_timer, 0, 0);
struct atm_vcc *vcc_close_que[100];
static int IA_TX_BUF = DFL_TX_BUFFERS, IA_TX_BUF_SZ = DFL_TX_BUF_SZ;
static int IA_RX_BUF = DFL_RX_BUFFERS, IA_RX_BUF_SZ = DFL_RX_BUF_SZ;
static uint IADebugFlag = /* IF_IADBG_ERR | IF_IADBG_CBR| IF_IADBG_INIT_ADAPTER
......@@ -147,7 +147,6 @@ static void ia_hack_tcq(IADEV *dev) {
u_short desc1;
u_short tcq_wr;
struct ia_vcc *iavcc_r = NULL;
extern void desc_dbg(IADEV *iadev);
tcq_wr = readl(dev->seg_reg+TCQ_WR_PTR) & 0xffff;
while (dev->host_tcq_wr != tcq_wr) {
......@@ -187,7 +186,6 @@ static u16 get_desc (IADEV *dev, struct ia_vcc *iavcc) {
unsigned long delta;
static unsigned long timer = 0;
int ltimeout;
extern void desc_dbg(IADEV *iadev);
ia_hack_tcq (dev);
if(((jiffies - timer)>50)||((dev->ffL.tcq_rd==dev->host_tcq_wr))){
......@@ -644,7 +642,7 @@ static int ia_que_tx (IADEV *iadev) {
return 0;
}
void ia_tx_poll (IADEV *iadev) {
static void ia_tx_poll (IADEV *iadev) {
struct atm_vcc *vcc = NULL;
struct sk_buff *skb = NULL, *skb1 = NULL;
struct ia_vcc *iavcc;
......@@ -861,7 +859,7 @@ static void IaFrontEndIntr(IADEV *iadev) {
return;
}
void ia_mb25_init (IADEV *iadev)
static void ia_mb25_init (IADEV *iadev)
{
volatile ia_mb25_t *mb25 = (ia_mb25_t*)iadev->phy;
#if 0
......@@ -876,7 +874,7 @@ void ia_mb25_init (IADEV *iadev)
return;
}
void ia_suni_pm7345_init (IADEV *iadev)
static void ia_suni_pm7345_init (IADEV *iadev)
{
volatile suni_pm7345_t *suni_pm7345 = (suni_pm7345_t *)iadev->phy;
if (iadev->phy_type & FE_DS3_PHY)
......@@ -959,9 +957,8 @@ void ia_suni_pm7345_init (IADEV *iadev)
/***************************** IA_LIB END *****************************/
/* pwang_test debug utility */
int tcnter = 0, rcnter = 0;
void xdump( u_char* cp, int length, char* prefix )
static int tcnter = 0;
static void xdump( u_char* cp, int length, char* prefix )
{
int col, count;
u_char prntBuf[120];
......@@ -1008,7 +1005,7 @@ static struct atm_dev *ia_boards = NULL;
/*-- some utilities and memory allocation stuff will come here -------------*/
void desc_dbg(IADEV *iadev) {
static void desc_dbg(IADEV *iadev) {
u_short tcq_wr_ptr, tcq_st_ptr, tcq_ed_ptr;
u32 i;
......
drivers/atm/iphase.h
View file @ b24657db
......@@ -1126,8 +1126,6 @@ typedef struct {
#define FE_DS3_PHY 0x0080 /* DS3 */
#define FE_E3_PHY 0x0090 /* E3 */
extern void ia_mb25_init (IADEV *);
/*********************** SUNI_PM7345 PHY DEFINE HERE *********************/
typedef struct _suni_pm7345_t
{
......@@ -1326,8 +1324,6 @@ typedef struct _suni_pm7345_t
#define SUNI_DS3_FOVRI 0x02 /* FIFO overrun */
#define SUNI_DS3_FUDRI 0x01 /* FIFO underrun */
extern void ia_suni_pm7345_init (IADEV *iadev);
///////////////////SUNI_PM7345 PHY DEFINE END /////////////////////////////
/* ia_eeprom define*/
......
drivers/atm/nicstarmac.c
View file @ b24657db
......@@ -35,6 +35,7 @@
#define SI_LOW 0x0000 /* Serial input data low */
/* Read Status Register = 0000 0101b */
#if 0
static u_int32_t rdsrtab[] =
{
CS_HIGH | CLK_HIGH,
......@@ -55,6 +56,7 @@ static u_int32_t rdsrtab[] =
CLK_LOW | SI_HIGH,
CLK_HIGH | SI_HIGH /* 1 */
};
#endif /* 0 */
/* Read from EEPROM = 0000 0011b */
......@@ -117,7 +119,7 @@ static u_int32_t clocktab[] =
* eeprom, then pull the result from bit 16 of the NicSTaR's General Purpose
* register.
*/
#if 0
u_int32_t
nicstar_read_eprom_status( virt_addr_t base )
{
......@@ -153,6 +155,7 @@ nicstar_read_eprom_status( virt_addr_t base )
osp_MicroDelay( CYCLE_DELAY );
return rbyte;
}
#endif /* 0 */
/*
......
drivers/atm/nicstarmac.h
View file @ b24657db
......@@ -9,6 +9,5 @@
typedef void __iomem *virt_addr_t;
u_int32_t nicstar_read_eprom_status( virt_addr_t base );
void nicstar_init_eprom( virt_addr_t base );
void nicstar_read_eprom( virt_addr_t, u_int8_t, u_int8_t *, u_int32_t);
drivers/atm/zatm.c
View file @ b24657db
......@@ -1605,7 +1605,7 @@ static int __devinit zatm_init_one(struct pci_dev *pci_dev,
goto out_disable;
zatm_dev->pci_dev = pci_dev;
dev = (struct atm_dev *)zatm_dev;
dev->dev_data = zatm_dev;
zatm_dev->copper = (int)ent->driver_data;
if ((ret = zatm_init(dev)) || (ret = zatm_start(dev)))
goto out_release;
......
drivers/char/i8k.c
View file @ b24657db
......@@ -621,32 +621,35 @@ static int __init dmi_table(u32 base, int len, int num, void (*fn)(DMIHeader*))
static int __init dmi_iterate(void (*decode)(DMIHeader *))
{
unsigned char buf[20];
long fp = 0x000e0000L;
fp -= 16;
while (fp < 0x000fffffL) {
fp += 16;
isa_memcpy_fromio(buf, fp, 20);
if (memcmp(buf, "_DMI_", 5)==0) {
u16 num = buf[13]<<8 | buf[12];
u16 len = buf [7]<<8 | buf [6];
u32 base = buf[11]<<24 | buf[10]<<16 | buf[9]<<8 | buf[8];
unsigned char buf[20];
void __iomem *p = ioremap(0xe0000, 0x20000), *q;
if (!p)
return -1;
for (q = p; q < p + 0x20000; q += 16) {
memcpy_fromio(buf, q, 20);
if (memcmp(buf, "_DMI_", 5)==0) {
u16 num = buf[13]<<8 | buf[12];
u16 len = buf [7]<<8 | buf [6];
u32 base = buf[11]<<24 | buf[10]<<16 | buf[9]<<8 | buf[8];
#ifdef I8K_DEBUG
printk(KERN_INFO "DMI %d.%d present.\n",
buf[14]>>4, buf[14]&0x0F);
printk(KERN_INFO "%d structures occupying %d bytes.\n",
buf[13]<<8 | buf[12],
buf [7]<<8 | buf[6]);
printk(KERN_INFO "DMI table at 0x%08X.\n",
buf[11]<<24 | buf[10]<<16 | buf[9]<<8 | buf[8]);
printk(KERN_INFO "DMI %d.%d present.\n",
buf[14]>>4, buf[14]&0x0F);
printk(KERN_INFO "%d structures occupying %d bytes.\n",
buf[13]<<8 | buf[12],
buf [7]<<8 | buf[6]);
printk(KERN_INFO "DMI table at 0x%08X.\n",
buf[11]<<24 | buf[10]<<16 | buf[9]<<8 | buf[8]);
#endif
if (dmi_table(base, len, num, decode)==0) {
return 0;
}
if (dmi_table(base, len, num, decode)==0) {
iounmap(p);
return 0;
}
}
}
}
return -1;
iounmap(p);
return -1;
}
/* end of DMI code */
......
drivers/char/mxser.c
View file @ b24657db
This diff is collapsed.
drivers/infiniband/Kconfig 0 → 100644
View file @ b24657db
menu "InfiniBand support"
config INFINIBAND
tristate "InfiniBand support"
---help---
Core support for InfiniBand (IB). Make sure to also select
any protocols you wish to use as well as drivers for your
InfiniBand hardware.
source "drivers/infiniband/hw/mthca/Kconfig"
source "drivers/infiniband/ulp/ipoib/Kconfig"
endmenu
drivers/infiniband/Makefile 0 → 100644
View file @ b24657db
obj-$(CONFIG_INFINIBAND) += core/
obj-$(CONFIG_INFINIBAND_MTHCA) += hw/mthca/
obj-$(CONFIG_INFINIBAND_IPOIB) += ulp/ipoib/
drivers/infiniband/core/Makefile 0 → 100644
View file @ b24657db
EXTRA_CFLAGS += -Idrivers/infiniband/include
obj-$(CONFIG_INFINIBAND) += ib_core.o ib_mad.o ib_sa.o ib_umad.o
ib_core-y := packer.o ud_header.o verbs.o sysfs.o \
device.o fmr_pool.o cache.o
ib_mad-y := mad.o smi.o agent.o
ib_sa-y := sa_query.o
ib_umad-y := user_mad.o
drivers/infiniband/core/agent.c 0 → 100644
View file @ b24657db
This diff is collapsed.
drivers/infiniband/core/agent.h 0 → 100644
View file @ b24657db
/*
* Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
* Copyright (c) 2004 Infinicon Corporation. All rights reserved.
* Copyright (c) 2004 Intel Corporation. All rights reserved.
* Copyright (c) 2004 Topspin Corporation. All rights reserved.
* Copyright (c) 2004 Voltaire Corporation. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* $Id: agent.h 1389 2004-12-27 22:56:47Z roland $
*/
#ifndef __AGENT_H_
#define __AGENT_H_
extern spinlock_t ib_agent_port_list_lock;
extern int ib_agent_port_open(struct ib_device *device,
int port_num);
extern int ib_agent_port_close(struct ib_device *device, int port_num);
extern int agent_send(struct ib_mad_private *mad,
struct ib_grh *grh,
struct ib_wc *wc,
struct ib_device *device,
int port_num);
#endif /* __AGENT_H_ */
drivers/infiniband/core/agent_priv.h 0 → 100644
View file @ b24657db
/*
* Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
* Copyright (c) 2004 Infinicon Corporation. All rights reserved.
* Copyright (c) 2004 Intel Corporation. All rights reserved.
* Copyright (c) 2004 Topspin Corporation. All rights reserved.
* Copyright (c) 2004 Voltaire Corporation. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* $Id: agent_priv.h 1389 2004-12-27 22:56:47Z roland $
*/
#ifndef __IB_AGENT_PRIV_H__
#define __IB_AGENT_PRIV_H__
#include <linux/pci.h>
#define SPFX "ib_agent: "
struct ib_agent_send_wr {
struct list_head send_list;
struct ib_ah *ah;
struct ib_mad_private *mad;
DECLARE_PCI_UNMAP_ADDR(mapping)
};
struct ib_agent_port_private {
struct list_head port_list;
struct list_head send_posted_list;
spinlock_t send_list_lock;
int port_num;
struct ib_mad_agent *dr_smp_agent; /* DR SM class */
struct ib_mad_agent *lr_smp_agent; /* LR SM class */
struct ib_mad_agent *perf_mgmt_agent; /* PerfMgmt class */
struct ib_mr *mr;
};
#endif /* __IB_AGENT_PRIV_H__ */
drivers/infiniband/core/cache.c 0 → 100644
View file @ b24657db
/*
* Copyright (c) 2004 Topspin Communications. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* $Id: cache.c 1349 2004-12-16 21:09:43Z roland $
*/
#include <linux/version.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include "core_priv.h"
struct ib_pkey_cache {
int table_len;
u16 table[0];
};
struct ib_gid_cache {
int table_len;
union ib_gid table[0];
};
struct ib_update_work {
struct work_struct work;
struct ib_device *device;
u8 port_num;
};
static inline int start_port(struct ib_device *device)
{
return device->node_type == IB_NODE_SWITCH ? 0 : 1;
}
static inline int end_port(struct ib_device *device)
{
return device->node_type == IB_NODE_SWITCH ? 0 : device->phys_port_cnt;
}
int ib_cached_gid_get(struct ib_device *device,
u8 port,
int index,
union ib_gid *gid)
{
struct ib_gid_cache *cache;
unsigned long flags;
int ret = 0;
if (port < start_port(device) || port > end_port(device))
return -EINVAL;
read_lock_irqsave(&device->cache.lock, flags);
cache = device->cache.gid_cache[port - start_port(device)];
if (index < 0 || index >= cache->table_len)
ret = -EINVAL;
else
*gid = cache->table[index];
read_unlock_irqrestore(&device->cache.lock, flags);
return ret;
}
EXPORT_SYMBOL(ib_cached_gid_get);
int ib_cached_pkey_get(struct ib_device *device,
u8 port,
int index,
u16 *pkey)
{
struct ib_pkey_cache *cache;
unsigned long flags;
int ret = 0;
if (port < start_port(device) || port > end_port(device))
return -EINVAL;
read_lock_irqsave(&device->cache.lock, flags);
cache = device->cache.pkey_cache[port - start_port(device)];
if (index < 0 || index >= cache->table_len)
ret = -EINVAL;
else
*pkey = cache->table[index];
read_unlock_irqrestore(&device->cache.lock, flags);
return ret;
}
EXPORT_SYMBOL(ib_cached_pkey_get);
int ib_cached_pkey_find(struct ib_device *device,
u8 port,
u16 pkey,
u16 *index)
{
struct ib_pkey_cache *cache;
unsigned long flags;
int i;
int ret = -ENOENT;
if (port < start_port(device) || port > end_port(device))
return -EINVAL;
read_lock_irqsave(&device->cache.lock, flags);
cache = device->cache.pkey_cache[port - start_port(device)];
*index = -1;
for (i = 0; i < cache->table_len; ++i)
if ((cache->table[i] & 0x7fff) == (pkey & 0x7fff)) {
*index = i;
ret = 0;
break;
}
read_unlock_irqrestore(&device->cache.lock, flags);
return ret;
}
EXPORT_SYMBOL(ib_cached_pkey_find);
static void ib_cache_update(struct ib_device *device,
u8 port)
{
struct ib_port_attr *tprops = NULL;
struct ib_pkey_cache *pkey_cache = NULL, *old_pkey_cache;
struct ib_gid_cache *gid_cache = NULL, *old_gid_cache;
int i;
int ret;
tprops = kmalloc(sizeof *tprops, GFP_KERNEL);
if (!tprops)
return;
ret = ib_query_port(device, port, tprops);
if (ret) {
printk(KERN_WARNING "ib_query_port failed (%d) for %s\n",
ret, device->name);
goto err;
}
pkey_cache = kmalloc(sizeof *pkey_cache + tprops->pkey_tbl_len *
sizeof *pkey_cache->table, GFP_KERNEL);
if (!pkey_cache)
goto err;
pkey_cache->table_len = tprops->pkey_tbl_len;
gid_cache = kmalloc(sizeof *gid_cache + tprops->gid_tbl_len *
sizeof *gid_cache->table, GFP_KERNEL);
if (!gid_cache)
goto err;
gid_cache->table_len = tprops->gid_tbl_len;
for (i = 0; i < pkey_cache->table_len; ++i) {
ret = ib_query_pkey(device, port, i, pkey_cache->table + i);
if (ret) {
printk(KERN_WARNING "ib_query_pkey failed (%d) for %s (index %d)\n",
ret, device->name, i);
goto err;
}
}
for (i = 0; i < gid_cache->table_len; ++i) {
ret = ib_query_gid(device, port, i, gid_cache->table + i);
if (ret) {
printk(KERN_WARNING "ib_query_gid failed (%d) for %s (index %d)\n",
ret, device->name, i);
goto err;
}
}
write_lock_irq(&device->cache.lock);
old_pkey_cache = device->cache.pkey_cache[port - start_port(device)];
old_gid_cache = device->cache.gid_cache [port - start_port(device)];
device->cache.pkey_cache[port - start_port(device)] = pkey_cache;
device->cache.gid_cache [port - start_port(device)] = gid_cache;
write_unlock_irq(&device->cache.lock);
kfree(old_pkey_cache);
kfree(old_gid_cache);
kfree(tprops);
return;
err:
kfree(pkey_cache);
kfree(gid_cache);
kfree(tprops);
}
static void ib_cache_task(void *work_ptr)
{
struct ib_update_work *work = work_ptr;
ib_cache_update(work->device, work->port_num);
kfree(work);
}
static void ib_cache_event(struct ib_event_handler *handler,
struct ib_event *event)
{
struct ib_update_work *work;
if (event->event == IB_EVENT_PORT_ERR ||
event->event == IB_EVENT_PORT_ACTIVE ||
event->event == IB_EVENT_LID_CHANGE ||
event->event == IB_EVENT_PKEY_CHANGE ||
event->event == IB_EVENT_SM_CHANGE) {
work = kmalloc(sizeof *work, GFP_ATOMIC);
if (work) {
INIT_WORK(&work->work, ib_cache_task, work);
work->device = event->device;
work->port_num = event->element.port_num;
schedule_work(&work->work);
}
}
}
void ib_cache_setup_one(struct ib_device *device)
{
int p;
rwlock_init(&device->cache.lock);
device->cache.pkey_cache =
kmalloc(sizeof *device->cache.pkey_cache *
(end_port(device) - start_port(device) + 1), GFP_KERNEL);
device->cache.gid_cache =
kmalloc(sizeof *device->cache.pkey_cache *
(end_port(device) - start_port(device) + 1), GFP_KERNEL);
if (!device->cache.pkey_cache || !device->cache.gid_cache) {
printk(KERN_WARNING "Couldn't allocate cache "
"for %s\n", device->name);
goto err;
}
for (p = 0; p <= end_port(device) - start_port(device); ++p) {
device->cache.pkey_cache[p] = NULL;
device->cache.gid_cache [p] = NULL;
ib_cache_update(device, p + start_port(device));
}
INIT_IB_EVENT_HANDLER(&device->cache.event_handler,
device, ib_cache_event);
if (ib_register_event_handler(&device->cache.event_handler))
goto err_cache;
return;
err_cache:
for (p = 0; p <= end_port(device) - start_port(device); ++p) {
kfree(device->cache.pkey_cache[p]);
kfree(device->cache.gid_cache[p]);
}
err:
kfree(device->cache.pkey_cache);
kfree(device->cache.gid_cache);
}
void ib_cache_cleanup_one(struct ib_device *device)
{
int p;
ib_unregister_event_handler(&device->cache.event_handler);
flush_scheduled_work();
for (p = 0; p <= end_port(device) - start_port(device); ++p) {
kfree(device->cache.pkey_cache[p]);
kfree(device->cache.gid_cache[p]);
}
kfree(device->cache.pkey_cache);
kfree(device->cache.gid_cache);
}
struct ib_client cache_client = {
.name = "cache",
.add = ib_cache_setup_one,
.remove = ib_cache_cleanup_one
};
int __init ib_cache_setup(void)
{
return ib_register_client(&cache_client);
}
void __exit ib_cache_cleanup(void)
{
ib_unregister_client(&cache_client);
}
drivers/infiniband/core/core_priv.h 0 → 100644
View file @ b24657db
/*
* Copyright (c) 2004 Topspin Communications. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* $Id: core_priv.h 1349 2004-12-16 21:09:43Z roland $
*/
#ifndef _CORE_PRIV_H
#define _CORE_PRIV_H
#include <linux/list.h>
#include <linux/spinlock.h>
#include <ib_verbs.h>
int ib_device_register_sysfs(struct ib_device *device);
void ib_device_unregister_sysfs(struct ib_device *device);
int ib_sysfs_setup(void);
void ib_sysfs_cleanup(void);
int ib_cache_setup(void);
void ib_cache_cleanup(void);
#endif /* _CORE_PRIV_H */
drivers/infiniband/core/device.c 0 → 100644
View file @ b24657db
This diff is collapsed.
drivers/infiniband/core/fmr_pool.c 0 → 100644
View file @ b24657db
This diff is collapsed.
drivers/infiniband/core/mad.c 0 → 100644
View file @ b24657db
This diff is collapsed.
drivers/infiniband/core/mad_priv.h 0 → 100644
View file @ b24657db
/*
* Copyright (c) 2004, Voltaire, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* $Id: mad_priv.h 1389 2004-12-27 22:56:47Z roland $
*/
#ifndef __IB_MAD_PRIV_H__
#define __IB_MAD_PRIV_H__
#include <linux/pci.h>
#include <linux/kthread.h>
#include <linux/workqueue.h>
#include <ib_mad.h>
#include <ib_smi.h>
#define PFX "ib_mad: "
#define IB_MAD_QPS_CORE 2 /* Always QP0 and QP1 as a minimum */
/* QP and CQ parameters */
#define IB_MAD_QP_SEND_SIZE 128
#define IB_MAD_QP_RECV_SIZE 512
#define IB_MAD_SEND_REQ_MAX_SG 2
#define IB_MAD_RECV_REQ_MAX_SG 1
#define IB_MAD_SEND_Q_PSN 0
/* Registration table sizes */
#define MAX_MGMT_CLASS 80
#define MAX_MGMT_VERSION 8
#define MAX_MGMT_OUI 8
#define MAX_MGMT_VENDOR_RANGE2 IB_MGMT_CLASS_VENDOR_RANGE2_END - \
IB_MGMT_CLASS_VENDOR_RANGE2_START + 1
struct ib_mad_list_head {
struct list_head list;
struct ib_mad_queue *mad_queue;
};
struct ib_mad_private_header {
struct ib_mad_list_head mad_list;
struct ib_mad_recv_wc recv_wc;
DECLARE_PCI_UNMAP_ADDR(mapping)
} __attribute__ ((packed));
struct ib_mad_private {
struct ib_mad_private_header header;
struct ib_grh grh;
union {
struct ib_mad mad;
struct ib_rmpp_mad rmpp_mad;
struct ib_smp smp;
} mad;
} __attribute__ ((packed));
struct ib_mad_agent_private {
struct list_head agent_list;
struct ib_mad_agent agent;
struct ib_mad_reg_req *reg_req;
struct ib_mad_qp_info *qp_info;
spinlock_t lock;
struct list_head send_list;
struct list_head wait_list;
struct work_struct timed_work;
unsigned long timeout;
struct list_head local_list;
struct work_struct local_work;
atomic_t refcount;
wait_queue_head_t wait;
u8 rmpp_version;
};
struct ib_mad_snoop_private {
struct ib_mad_agent agent;
struct ib_mad_qp_info *qp_info;
int snoop_index;
int mad_snoop_flags;
atomic_t refcount;
wait_queue_head_t wait;
};
struct ib_mad_send_wr_private {
struct ib_mad_list_head mad_list;
struct list_head agent_list;
struct ib_mad_agent *agent;
struct ib_send_wr send_wr;
struct ib_sge sg_list[IB_MAD_SEND_REQ_MAX_SG];
u64 wr_id; /* client WR ID */
u64 tid;
unsigned long timeout;
int retry;
int refcount;
enum ib_wc_status status;
};
struct ib_mad_local_private {
struct list_head completion_list;
struct ib_mad_private *mad_priv;
struct ib_send_wr send_wr;
struct ib_sge sg_list[IB_MAD_SEND_REQ_MAX_SG];
u64 wr_id; /* client WR ID */
u64 tid;
};
struct ib_mad_mgmt_method_table {
struct ib_mad_agent_private *agent[IB_MGMT_MAX_METHODS];
};
struct ib_mad_mgmt_class_table {
struct ib_mad_mgmt_method_table *method_table[MAX_MGMT_CLASS];
};
struct ib_mad_mgmt_vendor_class {
u8 oui[MAX_MGMT_OUI][3];
struct ib_mad_mgmt_method_table *method_table[MAX_MGMT_OUI];
};
struct ib_mad_mgmt_vendor_class_table {
struct ib_mad_mgmt_vendor_class *vendor_class[MAX_MGMT_VENDOR_RANGE2];
};
struct ib_mad_mgmt_version_table {
struct ib_mad_mgmt_class_table *class;
struct ib_mad_mgmt_vendor_class_table *vendor;
};
struct ib_mad_queue {
spinlock_t lock;
struct list_head list;
int count;
int max_active;
struct ib_mad_qp_info *qp_info;
};
struct ib_mad_qp_info {
struct ib_mad_port_private *port_priv;
struct ib_qp *qp;
struct ib_mad_queue send_queue;
struct ib_mad_queue recv_queue;
struct list_head overflow_list;
spinlock_t snoop_lock;
struct ib_mad_snoop_private **snoop_table;
int snoop_table_size;
atomic_t snoop_count;
};
struct ib_mad_port_private {
struct list_head port_list;
struct ib_device *device;
int port_num;
struct ib_cq *cq;
struct ib_pd *pd;
struct ib_mr *mr;
spinlock_t reg_lock;
struct ib_mad_mgmt_version_table version[MAX_MGMT_VERSION];
struct list_head agent_list;
struct workqueue_struct *wq;
struct work_struct work;
struct ib_mad_qp_info qp_info[IB_MAD_QPS_CORE];
};
#endif /* __IB_MAD_PRIV_H__ */
drivers/infiniband/core/packer.c 0 → 100644
View file @ b24657db
/*
* Copyright (c) 2004 Topspin Corporation. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* $Id: packer.c 1349 2004-12-16 21:09:43Z roland $
*/
#include <ib_pack.h>
static u64 value_read(int offset, int size, void *structure)
{
switch (size) {
case 1: return *(u8 *) (structure + offset);
case 2: return be16_to_cpup((__be16 *) (structure + offset));
case 4: return be32_to_cpup((__be32 *) (structure + offset));
case 8: return be64_to_cpup((__be64 *) (structure + offset));
default:
printk(KERN_WARNING "Field size %d bits not handled\n", size * 8);
return 0;
}
}
/**
* ib_pack - Pack a structure into a buffer
* @desc:Array of structure field descriptions
* @desc_len:Number of entries in @desc
* @structure:Structure to pack from
* @buf:Buffer to pack into
*
* ib_pack() packs a list of structure fields into a buffer,
* controlled by the array of fields in @desc.
*/
void ib_pack(const struct ib_field *desc,
int desc_len,
void *structure,
void *buf)
{
int i;
for (i = 0; i < desc_len; ++i) {
if (desc[i].size_bits <= 32) {
int shift;
u32 val;
__be32 mask;
__be32 *addr;
shift = 32 - desc[i].offset_bits - desc[i].size_bits;
if (desc[i].struct_size_bytes)
val = value_read(desc[i].struct_offset_bytes,
desc[i].struct_size_bytes,
structure) << shift;
else
val = 0;
mask = cpu_to_be32(((1ull << desc[i].size_bits) - 1) << shift);
addr = (__be32 *) buf + desc[i].offset_words;
*addr = (*addr & ~mask) | (cpu_to_be32(val) & mask);
} else if (desc[i].size_bits <= 64) {
int shift;
u64 val;
__be64 mask;
__be64 *addr;
shift = 64 - desc[i].offset_bits - desc[i].size_bits;
if (desc[i].struct_size_bytes)
val = value_read(desc[i].struct_offset_bytes,
desc[i].struct_size_bytes,
structure) << shift;
else
val = 0;
mask = cpu_to_be64(((1ull << desc[i].size_bits) - 1) << shift);
addr = (__be64 *) ((__be32 *) buf + desc[i].offset_words);
*addr = (*addr & ~mask) | (cpu_to_be64(val) & mask);
} else {
if (desc[i].offset_bits % 8 ||
desc[i].size_bits % 8) {
printk(KERN_WARNING "Structure field %s of size %d "
"bits is not byte-aligned\n",
desc[i].field_name, desc[i].size_bits);
}
if (desc[i].struct_size_bytes)
memcpy(buf + desc[i].offset_words * 4 +
desc[i].offset_bits / 8,
structure + desc[i].struct_offset_bytes,
desc[i].size_bits / 8);
else
memset(buf + desc[i].offset_words * 4 +
desc[i].offset_bits / 8,
0,
desc[i].size_bits / 8);
}
}
}
EXPORT_SYMBOL(ib_pack);
static void value_write(int offset, int size, u64 val, void *structure)
{
switch (size * 8) {
case 8: *( u8 *) (structure + offset) = val; break;
case 16: *(__be16 *) (structure + offset) = cpu_to_be16(val); break;
case 32: *(__be32 *) (structure + offset) = cpu_to_be32(val); break;
case 64: *(__be64 *) (structure + offset) = cpu_to_be64(val); break;
default:
printk(KERN_WARNING "Field size %d bits not handled\n", size * 8);
}
}
/**
* ib_unpack - Unpack a buffer into a structure
* @desc:Array of structure field descriptions
* @desc_len:Number of entries in @desc
* @buf:Buffer to unpack from
* @structure:Structure to unpack into
*
* ib_pack() unpacks a list of structure fields from a buffer,
* controlled by the array of fields in @desc.
*/
void ib_unpack(const struct ib_field *desc,
int desc_len,
void *buf,
void *structure)
{
int i;
for (i = 0; i < desc_len; ++i) {
if (!desc[i].struct_size_bytes)
continue;
if (desc[i].size_bits <= 32) {
int shift;
u32 val;
u32 mask;
__be32 *addr;
shift = 32 - desc[i].offset_bits - desc[i].size_bits;
mask = ((1ull << desc[i].size_bits) - 1) << shift;
addr = (__be32 *) buf + desc[i].offset_words;
val = (be32_to_cpup(addr) & mask) >> shift;
value_write(desc[i].struct_offset_bytes,
desc[i].struct_size_bytes,
val,
structure);
} else if (desc[i].size_bits <= 64) {
int shift;
u64 val;
u64 mask;
__be64 *addr;
shift = 64 - desc[i].offset_bits - desc[i].size_bits;
mask = ((1ull << desc[i].size_bits) - 1) << shift;
addr = (__be64 *) buf + desc[i].offset_words;
val = (be64_to_cpup(addr) & mask) >> shift;
value_write(desc[i].struct_offset_bytes,
desc[i].struct_size_bytes,
val,
structure);
} else {
if (desc[i].offset_bits % 8 ||
desc[i].size_bits % 8) {
printk(KERN_WARNING "Structure field %s of size %d "
"bits is not byte-aligned\n",
desc[i].field_name, desc[i].size_bits);
}
memcpy(structure + desc[i].struct_offset_bytes,
buf + desc[i].offset_words * 4 +
desc[i].offset_bits / 8,
desc[i].size_bits / 8);
}
}
}
EXPORT_SYMBOL(ib_unpack);
drivers/infiniband/core/sa_query.c 0 → 100644
View file @ b24657db
This diff is collapsed.
drivers/infiniband/core/smi.c 0 → 100644
View file @ b24657db
/*
* Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
* Copyright (c) 2004 Infinicon Corporation. All rights reserved.
* Copyright (c) 2004 Intel Corporation. All rights reserved.
* Copyright (c) 2004 Topspin Corporation. All rights reserved.
* Copyright (c) 2004 Voltaire Corporation. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* $Id: smi.c 1389 2004-12-27 22:56:47Z roland $
*/
#include <ib_smi.h>
/*
* Fixup a directed route SMP for sending
* Return 0 if the SMP should be discarded
*/
int smi_handle_dr_smp_send(struct ib_smp *smp,
u8 node_type,
int port_num)
{
u8 hop_ptr, hop_cnt;
hop_ptr = smp->hop_ptr;
hop_cnt = smp->hop_cnt;
/* See section 14.2.2.2, Vol 1 IB spec */
if (!ib_get_smp_direction(smp)) {
/* C14-9:1 */
if (hop_cnt && hop_ptr == 0) {
smp->hop_ptr++;
return (smp->initial_path[smp->hop_ptr] ==
port_num);
}
/* C14-9:2 */
if (hop_ptr && hop_ptr < hop_cnt) {
if (node_type != IB_NODE_SWITCH)
return 0;
/* smp->return_path set when received */
smp->hop_ptr++;
return (smp->initial_path[smp->hop_ptr] ==
port_num);
}
/* C14-9:3 -- We're at the end of the DR segment of path */
if (hop_ptr == hop_cnt) {
/* smp->return_path set when received */
smp->hop_ptr++;
return (node_type == IB_NODE_SWITCH ||
smp->dr_dlid == IB_LID_PERMISSIVE);
}
/* C14-9:4 -- hop_ptr = hop_cnt + 1 -> give to SMA/SM */
/* C14-9:5 -- Fail unreasonable hop pointer */
return (hop_ptr == hop_cnt + 1);
} else {
/* C14-13:1 */
if (hop_cnt && hop_ptr == hop_cnt + 1) {
smp->hop_ptr--;
return (smp->return_path[smp->hop_ptr] ==
port_num);
}
/* C14-13:2 */
if (2 <= hop_ptr && hop_ptr <= hop_cnt) {
if (node_type != IB_NODE_SWITCH)
return 0;
smp->hop_ptr--;
return (smp->return_path[smp->hop_ptr] ==
port_num);
}
/* C14-13:3 -- at the end of the DR segment of path */
if (hop_ptr == 1) {
smp->hop_ptr--;
/* C14-13:3 -- SMPs destined for SM shouldn't be here */
return (node_type == IB_NODE_SWITCH ||
smp->dr_slid == IB_LID_PERMISSIVE);
}
/* C14-13:4 -- hop_ptr = 0 -> should have gone to SM */
if (hop_ptr == 0)
return 1;
/* C14-13:5 -- Check for unreasonable hop pointer */
return 0;
}
}
/*
* Adjust information for a received SMP
* Return 0 if the SMP should be dropped
*/
int smi_handle_dr_smp_recv(struct ib_smp *smp,
u8 node_type,
int port_num,
int phys_port_cnt)
{
u8 hop_ptr, hop_cnt;
hop_ptr = smp->hop_ptr;
hop_cnt = smp->hop_cnt;
/* See section 14.2.2.2, Vol 1 IB spec */
if (!ib_get_smp_direction(smp)) {
/* C14-9:1 -- sender should have incremented hop_ptr */
if (hop_cnt && hop_ptr == 0)
return 0;
/* C14-9:2 -- intermediate hop */
if (hop_ptr && hop_ptr < hop_cnt) {
if (node_type != IB_NODE_SWITCH)
return 0;
smp->return_path[hop_ptr] = port_num;
/* smp->hop_ptr updated when sending */
return (smp->initial_path[hop_ptr+1] <= phys_port_cnt);
}
/* C14-9:3 -- We're at the end of the DR segment of path */
if (hop_ptr == hop_cnt) {
if (hop_cnt)
smp->return_path[hop_ptr] = port_num;
/* smp->hop_ptr updated when sending */
return (node_type == IB_NODE_SWITCH ||
smp->dr_dlid == IB_LID_PERMISSIVE);
}
/* C14-9:4 -- hop_ptr = hop_cnt + 1 -> give to SMA/SM */
/* C14-9:5 -- fail unreasonable hop pointer */
return (hop_ptr == hop_cnt + 1);
} else {
/* C14-13:1 */
if (hop_cnt && hop_ptr == hop_cnt + 1) {
smp->hop_ptr--;
return (smp->return_path[smp->hop_ptr] ==
port_num);
}
/* C14-13:2 */
if (2 <= hop_ptr && hop_ptr <= hop_cnt) {
if (node_type != IB_NODE_SWITCH)
return 0;
/* smp->hop_ptr updated when sending */
return (smp->return_path[hop_ptr-1] <= phys_port_cnt);
}
/* C14-13:3 -- We're at the end of the DR segment of path */
if (hop_ptr == 1) {
if (smp->dr_slid == IB_LID_PERMISSIVE) {
/* giving SMP to SM - update hop_ptr */
smp->hop_ptr--;
return 1;
}
/* smp->hop_ptr updated when sending */
return (node_type == IB_NODE_SWITCH);
}
/* C14-13:4 -- hop_ptr = 0 -> give to SM */
/* C14-13:5 -- Check for unreasonable hop pointer */
return (hop_ptr == 0);
}
}
/*
* Return 1 if the received DR SMP should be forwarded to the send queue
* Return 0 if the SMP should be completed up the stack
*/
int smi_check_forward_dr_smp(struct ib_smp *smp)
{
u8 hop_ptr, hop_cnt;
hop_ptr = smp->hop_ptr;
hop_cnt = smp->hop_cnt;
if (!ib_get_smp_direction(smp)) {
/* C14-9:2 -- intermediate hop */
if (hop_ptr && hop_ptr < hop_cnt)
return 1;
/* C14-9:3 -- at the end of the DR segment of path */
if (hop_ptr == hop_cnt)
return (smp->dr_dlid == IB_LID_PERMISSIVE);
/* C14-9:4 -- hop_ptr = hop_cnt + 1 -> give to SMA/SM */
if (hop_ptr == hop_cnt + 1)
return 1;
} else {
/* C14-13:2 */
if (2 <= hop_ptr && hop_ptr <= hop_cnt)
return 1;
/* C14-13:3 -- at the end of the DR segment of path */
if (hop_ptr == 1)
return (smp->dr_slid != IB_LID_PERMISSIVE);
}
return 0;
}
drivers/infiniband/core/smi.h 0 → 100644
View file @ b24657db
/*
* Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
* Copyright (c) 2004 Infinicon Corporation. All rights reserved.
* Copyright (c) 2004 Intel Corporation. All rights reserved.
* Copyright (c) 2004 Topspin Corporation. All rights reserved.
* Copyright (c) 2004 Voltaire Corporation. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* $Id: smi.h 1389 2004-12-27 22:56:47Z roland $
*/
#ifndef __SMI_H_
#define __SMI_H_
int smi_handle_dr_smp_recv(struct ib_smp *smp,
u8 node_type,
int port_num,
int phys_port_cnt);
extern int smi_check_forward_dr_smp(struct ib_smp *smp);
extern int smi_handle_dr_smp_send(struct ib_smp *smp,
u8 node_type,
int port_num);
extern int smi_check_local_dr_smp(struct ib_smp *smp,
struct ib_device *device,
int port_num);
/*
* Return 1 if the SMP should be handled by the local SMA/SM via process_mad
*/
static inline int smi_check_local_smp(struct ib_mad_agent *mad_agent,
struct ib_smp *smp)
{
/* C14-9:3 -- We're at the end of the DR segment of path */
/* C14-9:4 -- Hop Pointer = Hop Count + 1 -> give to SMA/SM */
return ((mad_agent->device->process_mad &&
!ib_get_smp_direction(smp) &&
(smp->hop_ptr == smp->hop_cnt + 1)));
}
#endif /* __SMI_H_ */
drivers/infiniband/core/sysfs.c 0 → 100644
View file @ b24657db
This diff is collapsed.
drivers/infiniband/core/ud_header.c 0 → 100644
View file @ b24657db
This diff is collapsed.
drivers/infiniband/core/user_mad.c 0 → 100644
View file @ b24657db
This diff is collapsed.
drivers/infiniband/core/verbs.c 0 → 100644
View file @ b24657db
This diff is collapsed.
drivers/infiniband/hw/mthca/Kconfig 0 → 100644
View file @ b24657db
config INFINIBAND_MTHCA
tristate "Mellanox HCA support"
depends on PCI && INFINIBAND
---help---
This is a low-level driver for Mellanox InfiniHost host
channel adapters (HCAs), including the MT23108 PCI-X HCA
("Tavor") and the MT25208 PCI Express HCA ("Arbel").
config INFINIBAND_MTHCA_DEBUG
bool "Verbose debugging output"
depends on INFINIBAND_MTHCA
default n
---help---
This option causes the mthca driver produce a bunch of debug
messages. Select this is you are developing the driver or
trying to diagnose a problem.
config INFINIBAND_MTHCA_SSE_DOORBELL
bool "SSE doorbell code"
depends on INFINIBAND_MTHCA && X86 && !X86_64
default n
---help---
This option will have the mthca driver use SSE instructions
to ring hardware doorbell registers. This may improve
performance for some workloads, but the driver will not run
on processors without SSE instructions.
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EXTRA_CFLAGS += -Idrivers/infiniband/include
ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
EXTRA_CFLAGS += -DDEBUG
endif
obj-$(CONFIG_INFINIBAND_MTHCA) += ib_mthca.o
ib_mthca-y := mthca_main.o mthca_cmd.o mthca_profile.o mthca_reset.o \
mthca_allocator.o mthca_eq.o mthca_pd.o mthca_cq.o \
mthca_mr.o mthca_qp.o mthca_av.o mthca_mcg.o mthca_mad.o \
mthca_provider.o
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/*
* Copyright (c) 2004 Topspin Communications. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* $Id: mthca_config_reg.h 1349 2004-12-16 21:09:43Z roland $
*/
#ifndef MTHCA_CONFIG_REG_H
#define MTHCA_CONFIG_REG_H
#include <asm/page.h>
#define MTHCA_HCR_BASE 0x80680
#define MTHCA_HCR_SIZE 0x0001c
#define MTHCA_ECR_BASE 0x80700
#define MTHCA_ECR_SIZE 0x00008
#define MTHCA_ECR_CLR_BASE 0x80708
#define MTHCA_ECR_CLR_SIZE 0x00008
#define MTHCA_ECR_OFFSET (MTHCA_ECR_BASE - MTHCA_HCR_BASE)
#define MTHCA_ECR_CLR_OFFSET (MTHCA_ECR_CLR_BASE - MTHCA_HCR_BASE)
#define MTHCA_CLR_INT_BASE 0xf00d8
#define MTHCA_CLR_INT_SIZE 0x00008
#define MTHCA_MAP_HCR_SIZE (MTHCA_ECR_CLR_BASE + \
MTHCA_ECR_CLR_SIZE - \
MTHCA_HCR_BASE)
#endif /* MTHCA_CONFIG_REG_H */
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config INFINIBAND_IPOIB
tristate "IP-over-InfiniBand"
depends on INFINIBAND && NETDEVICES && INET
---help---
Support for the IP-over-InfiniBand protocol (IPoIB). This
transports IP packets over InfiniBand so you can use your IB
device as a fancy NIC.
The IPoIB protocol is defined by the IETF ipoib working
group: <http://www.ietf.org/html.charters/ipoib-charter.html>.
config INFINIBAND_IPOIB_DEBUG
bool "IP-over-InfiniBand debugging"
depends on INFINIBAND_IPOIB
---help---
This option causes debugging code to be compiled into the
IPoIB driver. The output can be turned on via the
debug_level and mcast_debug_level module parameters (which
can also be set after the driver is loaded through sysfs).
This option also creates an "ipoib_debugfs," which can be
mounted to expose debugging information about IB multicast
groups used by the IPoIB driver.
config INFINIBAND_IPOIB_DEBUG_DATA
bool "IP-over-InfiniBand data path debugging"
depends on INFINIBAND_IPOIB_DEBUG
---help---
This option compiles debugging code into the the data path
of the IPoIB driver. The output can be turned on via the
data_debug_level module parameter; however, even with output
turned off, this debugging code will have some performance
impact.
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