Commit b35b1df5 authored by Yijing Wang's avatar Yijing Wang Committed by Bjorn Helgaas

PCI: Tolerate hierarchies with no Root Port

We should not assume any particular hardware topology.  Commit d0751b98
("PCI: Add dev->has_secondary_link to track downstream PCIe links") relied
on the assumption that every PCIe hierarchy is rooted at a Root Port.  But
we can't rely on any assumption about what hardware we will find; we just
have to deal with the world as it is.

On some platforms, PCIe devices (endpoints, switch upstream ports, etc.)
appear directly on the root bus, and there is no Root Port in the PCI bus
hierarchy.  For example, Meelis observed these top-level devices on a
Sparc V245:

  0000:02:00.0 PCI bridge to [bus 03-0d]    Switch Upstream Port
  0001:02:00.0 PCI bridge to [bus 03]       PCIe to PCI/PCI-X Bridge

These devices *look* like they have links going upstream, but there really
are no upstream devices.

In set_pcie_port_type(), we used the parent device to figure out which side
of a switch port has a link, so if the parent device did not exist, we
dereferenced a NULL parent pointer.

Check whether the parent device exists before dereferencing it.

Meelis observed this oops on Sparc V245 and T2000.  Ben Herrenschmidt says
this is also possible on IBM PowerVM guests on PowerPC.

[bhelgaas: changelog, comment]
Link: http://lkml.kernel.org/r/alpine.LRH.2.20.1508122118210.18637@math.ut.eeReported-by: default avatarMeelis Roos <mroos@linux.ee>
Tested-by: default avatarMeelis Roos <mroos@linux.ee>
Signed-off-by: default avatarYijing Wang <wangyijing@huawei.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c9ddbac9
...@@ -997,7 +997,12 @@ void set_pcie_port_type(struct pci_dev *pdev) ...@@ -997,7 +997,12 @@ void set_pcie_port_type(struct pci_dev *pdev)
else if (type == PCI_EXP_TYPE_UPSTREAM || else if (type == PCI_EXP_TYPE_UPSTREAM ||
type == PCI_EXP_TYPE_DOWNSTREAM) { type == PCI_EXP_TYPE_DOWNSTREAM) {
parent = pci_upstream_bridge(pdev); parent = pci_upstream_bridge(pdev);
if (!parent->has_secondary_link)
/*
* Usually there's an upstream device (Root Port or Switch
* Downstream Port), but we can't assume one exists.
*/
if (parent && !parent->has_secondary_link)
pdev->has_secondary_link = 1; pdev->has_secondary_link = 1;
} }
} }
......
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